TWI527252B - Solar cell and module comprising the same - Google Patents

Description

Solar cell and its module

The invention relates to a solar cell and a module thereof, in particular to a twin solar cell and a module thereof.

Referring to FIG. 1 , a known back contact solar cell includes a substrate 91 , a front surface 911 of the substrate 91 , and a doping concentration greater than a front surface electric field layer 913 of the substrate 91 . An anti-reflection layer 92 on the front surface electric field layer 913, an emitter region 914 on a back surface 912 of the substrate 91, a back surface electric field region 915, a passivation layer 93 on the back surface 912, and a A first electrode 94 that contacts the emitter region 914 through the passivation layer 93, and a second electrode 95 that contacts the back surface electric field region 915 through the passivation layer 93. The main feature of the back contact solar cell is that the first electrode 94 and the second electrode 95 are located on the back side 912 side of the substrate 91. The front surface 911 of the battery is not provided with an electrode, so that the light receiving area can be prevented from being blocked. Increase the amount of light entering the front of the battery.

The substrate 91 is typically a semiconductor germanium substrate. The emitter region 914 and the back surface electric field region 915 are germanium semiconductor materials. The first electrode 94 and the second electrode 95 are typically metal. Due to the improvement of the metal electrode material, And the effect of the passivation substrate 91 of the passivation layer 93, the photoelectric conversion efficiency of the battery is improved, but it is currently observed that between the first electrode 94 and the emitter region 914 interface, and the second electrode 95 and the Between the interface of the back surface electric field region 915, a carrier recombination phenomenon is easily generated, resulting in a decrease in battery conversion efficiency, and the problem remains to be improved.

Therefore, the object of the present invention is to provide a solar cell and a module thereof which are structurally innovative, can reduce carrier recombination, and can improve photoelectric conversion efficiency.

Therefore, the solar cell of the present invention comprises: a substrate having an opposite front surface and a back surface, a first doping region having a first conductivity type and located at the back surface, and a second conductivity type at the back surface a second doped region, a first dielectric layer, a first tunneling layer, a second tunneling layer, a first electrode, and a second electrode. The first dielectric layer is located on the back surface and has a first opening and a second opening respectively corresponding to the first doping region and the second doping region. The first tunneling layer is located at the first opening and contacts the first doped region. The second tunneling layer is located at the second opening and contacts the second doped region. The first electrode is located on the back surface and contacts the first tunneling layer via the first opening. The second electrode is located on the back surface and contacts the second tunneling layer via the second opening.

The solar cell module of the present invention comprises: a first plate and a second plate disposed oppositely, at least one solar cell disposed between the first plate and the second plate, and a first plate The package material of the solar cell is in contact with the second plate.

The effect of the present invention is that the first tunneling layer is disposed on the first doping region, and the second tunneling layer is disposed on the second doping region to passivate the back surface of the substrate and reduce the carrier on the back surface of the substrate The compounding rate, which improves the photoelectric conversion efficiency of the battery. Moreover, since the first tunneling layer and the second tunneling layer are thin films, the carrier can be tunneled through, so that the contact resistance can be maintained between the electrode and the doped region without affecting the doping region and the electrode. Carrier transfer between.

1‧‧‧ first plate

2‧‧‧Second plate

3‧‧‧Solar battery

30‧‧‧ Third dielectric layer

301‧‧‧ first floor

302‧‧‧Second floor

303‧‧‧ Third Floor

31‧‧‧Substrate

311‧‧‧ positive

312‧‧‧ back

313‧‧‧ front surface electric field layer

314‧‧‧Anti-reflective layer

32‧‧‧First doped area

33‧‧‧Second doped area

34‧‧‧First dielectric layer

341‧‧‧ first opening

342‧‧‧ second opening

35‧‧‧First tunneling layer

36‧‧‧Second tunneling

37‧‧‧Second dielectric layer

371‧‧‧First Floor

372‧‧‧Second floor

373‧‧‧ Third Floor

38‧‧‧First electrode

39‧‧‧Second electrode

4‧‧‧Package

5‧‧‧welding wire

Other features and effects of the present invention will be apparent from the following description of the drawings, wherein: FIG. 1 is a schematic cross-sectional view of a known solar cell; FIG. 2 is a first embodiment of the solar cell module of the present invention. 3 is a schematic cross-sectional view of a solar cell of the first preferred embodiment; and FIG. 4 is a cross-sectional view of a second preferred embodiment of the solar cell of the present invention.

Before the present invention is described in detail, it should be noted that in the following description, similar elements are denoted by the same reference numerals.

Referring to FIGS. 2 and 3, a first preferred embodiment of the solar cell module of the present invention comprises: a first plate 1 and a second plate 2 disposed opposite each other, and a plurality of arrays arranged on the first plate 1 and The second plate 2 a solar cell 3, at least one package 4 between the first plate 1 and the second plate 2 and contacting the plurality of solar cells 3, and a plurality of solder ribbons for connecting the plurality of solar cells 3 in series Wire 5 (ribbon).

The first plate 1 and the second plate 2 are not particularly limited in implementation, and a glass or plastic plate may be used, and the plate on one side of the light receiving surface of the battery must be permeable to light. The material of the encapsulant 4 is, for example, a light transmissive ethylene vinyl acetate copolymer (EVA), or other related materials that can be used for solar cell module packaging.

The structure of the plurality of solar cells 3 of the present embodiment may be the same, and only one of them will be described below as an example. Of course, the structure of the plurality of batteries in a module is not absolutely necessary.

The solar cell 3 includes a substrate 31, a first doped region 32, a second doped region 33, a first dielectric layer 34, a first tunneling layer 35, and a second tunneling layer 36. A second dielectric layer 37, a first electrode 38 and a second electrode 39.

The substrate 31 of the present embodiment is an n-type semiconductor germanium substrate 31 and has a front surface 311 and a back surface 312. The front surface 311 is a light incident surface and can be made into a rough surface to increase the amount of light incident. A front surface electric field layer 313 may be disposed in the front surface 311 of the substrate 31. The front surface electric field layer 313 may be formed into an n+ type semiconductor by a diffusion process or other doping method, and the doping concentration thereof is greater than the substrate 31. Internally, the front surface electric field (Front-Side Field, FSF for short) can reduce the surface recombination rate of a few carriers and increase the lateral transmission capacity of most carriers to improve the carrier collection efficiency, thereby improving the photoelectric conversion efficiency of the battery. . It should be noted that when the p-type semiconductor substrate 31 is used as the substrate 31, the front surface electric field layer 313 is a p ⁺ -type semiconductor having a doping concentration higher than that of the substrate 31. An anti-reflection layer 314 may be selectively disposed on the front surface electric field layer 313, such as tantalum nitride (SiN _x ), for increasing the incident amount of light and reducing the surface recombination velocity (Surface Recombination Velocity, referred to as SRV).

The first doped region 32 is of a first conductivity type and is located at the back surface 312. The first doping region 32 of the present embodiment is a p ⁺ -type semiconductor having a doping electrical property different from that of the substrate 31 to form a pn junction, which is a source of photoelectric effect. In practice, the first doping region 32 can be diffused into the back surface 312 by a diffusion process (for example, boron diffusion) or other doping methods, such as partial coating of aluminum glue, and then diffused into the back surface 312 to make the back surface 312 of the substrate 31. The interior partially forms a heavily doped p ⁺ -type semiconductor.

The second doping region 33 is of a second conductivity type and is located at the back surface 312, and the second doping region 33 is spaced apart from the first doping region 32 without contact. The second doping region 33 of the embodiment is an n ⁺⁺ type semiconductor, and the inside of the back surface 312 of the substrate 31 can be locally formed into a heavily doped second by a diffusion process (for example, phosphorus diffusion) or other doping manner. The doping region 33 has a doping concentration greater than a doping concentration of the substrate 31, thereby forming a Back-Side Field (BSF), which can improve carrier collection efficiency and photoelectric conversion efficiency.

The first conductivity type of the present embodiment refers to a p-type of a semiconductor conductivity type, and the second conductivity type is an n-type. Moreover, the substrate 31 and the front surface electric field layer 313 are also of a second conductivity type. However, it should be noted that, in the implementation of the present invention, the first conductivity type may also refer to an n-type, and the second conductive The sex is p type.

In this embodiment, the first dielectric layer 34 directly contacts the back surface 312 and is located on the back surface 312 and has a first opening 341 corresponding to the first doping region 32 and the second doping region 33, respectively. And a second opening 342. The material of the first dielectric layer 34 may be an oxide, a nitride or a combination of the above materials, and used to passivate and repair the surface of the substrate 31 to reduce the Dangling Bond and defects of the surface, thereby reducing the carrier. Trap and reduce the surface recombination rate of the carrier to improve the photoelectric conversion efficiency of the battery.

The first tunneling layer 35 is located at the first opening 341 and contacts the first doping region 32. The second tunneling layer 36 is located at the second opening 342 and contacts the second doping region 33. The material of the first tunneling layer 35 and the second tunneling layer 36 may be an oxide, a nitride or the like, such as yttrium oxide, aluminum oxide, tantalum nitride or the like, and has a function of passivating the surface of the substrate 31, thereby The carrier recombination rate on the surface of the substrate 31 can be lowered. Moreover, the carrier at the first doping region 32 can be tunneled through the first tunneling layer 35 to the first electrode 38, and the carrier at the second doping region 33 can be tunneled through the second The tunnel layer 36 is transmitted to the second electrode 39. Preferably, the thickness of the first tunneling layer 35 and the second tunneling layer 36 is less than 2 nm, so that the carrier tunneling effect is good.

The second dielectric layer 37 is located on the first dielectric layer 34 and simultaneously connects the first tunneling layer 35 and the second tunneling layer 36 to make the first tunneling layer 35 and the second tunneling layer The layers 36 can be connected via the second dielectric layer 37. The second dielectric layer 37 of the present embodiment has a first layer portion 371 connected to the first tunneling layer 35 and the second tunneling layer 36, and the first layer The first layer portion 371 is spaced apart and connected to the second layer portion 372 of the first tunneling layer 35, and a third layer portion 373 spaced apart from the first layer portion 371 and connected to the second tunneling layer 36. The second dielectric layer 37 can be partially located between the first electrode 38 and the first dielectric layer 34; or partially between the second electrode 39 and the first dielectric layer 34. The material of the second dielectric layer 37 may be an oxide, a nitride or the like, such as a material such as yttrium oxide, aluminum oxide or tantalum nitride, and has a function of helping to repair and passivate the surface of the substrate 31.

The second dielectric layer 37, the first tunneling layer 35 and the second tunneling layer 36 can be simultaneously formed, and can be fabricated by a vacuum coating method such as CVD or PVD. In this case, the second dielectric layer 37, The first tunneling layer 35 and the second tunneling layer 36 are made of the same material, and the three can be connected together; and further, the second dielectric layer 37, the first tunneling layer 35 and the The surface of the second tunneling layer 36 may also be coated with other passivation layer bodies having the effect of passivating the substrate 31, and the passivation layer body may be one or more layers. In practice, any one of the first tunneling layer 35 and the second tunneling layer 36 may be composed of a plurality of dielectric thin films; the first tunneling layer 35 and the second tunneling layer 36 Any of the layers is selected from the group consisting of dielectric materials such as yttrium oxide, aluminum oxide, tantalum nitride, etc., and the overall thickness of the multilayer dielectric film is preferably less than 2 nm. In actual implementation, the second dielectric layer 37, the first tunneling layer 35, and the second tunneling layer 36 may be separately formed, and the materials may be the same when formed separately. Only two of them may be the same, or the materials of the three may be different. Therefore, the materials of the first tunneling layer 35 and the second tunneling layer 36 of the present invention may be identical to each other or different from each other.

In practice, when the materials of the first tunneling layer 35 and the second tunneling layer 36 are different from each other, the first tunneling layer 35 may have a negatively charged film, and the second tunneling layer 36 may be It has a positively charged film. A negatively charged film such as Al ₂ O _{3 may be} used as the first tunneling layer 35 to passivate the first doping region 32, and a positively charged film such as Si ₃ N _{4 may be} used as the second tunneling layer. The second doping region 33 is passivated, thereby imparting passivation of different materials corresponding to different doping regions, so as to achieve better passivation effect and at the same time have the function of tunneling. Preferably, the thickness of the first tunneling layer 35 and the second tunneling layer 36 is less than 2 nm, so that the tunneling effect of the carrier is better.

In addition, the first tunneling layer 35 or/and the second tunneling layer 36 may be multi-layered in combination with the doping of the different conductivity types by applying different passivation to the doping regions of different conductivity types. The design of the dielectric film, wherein the dielectric film directly contacting the doped region adopts a film material with better passivation effect, and the dielectric film without contact doping region can adopt a film material with better conductivity, thereby making the whole passivation Optimized with the effect of conductivity. Of course, the overall thickness of the plurality of dielectric films is preferably less than 2 nm to maintain the overall electrical conduction effect.

The first electrode 38 is located on the back surface 312 and is located substantially on the surface of the first tunneling layer 35 and a portion of the second dielectric layer 37, and its position corresponds to the position of the first doping region 32. The first electrode 38 partially extends into the first opening 341, and then contacts the first tunneling layer 35 via the first opening 341, and the first electrode 38 and the first doping region 32 are separated by the first A tunneling layer 35 is separated. The first electrode 38 and the first embodiment of the present embodiment A doped region 32 is completely spaced apart, but in practice, the first electrode 38 may also partially pass through the first tunneling layer 35 to contact the first doped region 32.

The second electrode 39 is located on the back surface 312 and is located substantially on the surface of the second tunneling layer 36 and the partial surface of the second dielectric layer 37, and its position corresponds to the position of the second doping region 33. The second electrode 39 partially extends into the second opening 342, and then contacts the second tunneling layer 36 via the second opening 342, and the second electrode 39 and the second doping region 33 are separated by the first The two tunnel layers 36 are separated. The second electrode 39 of the present embodiment is completely separated from the second doping region 33. However, when implemented, the second electrode 39 may partially pass through the second tunneling layer 36 to contact the second doping. The region 33, for example, can thereby maintain the advantage of increasing the passivation area and allowing the second electrode 39 to partially pass through the second tunneling layer 36 in some cases to meet the possible needs of the minority carrier for collection, thereby achieving The good carrier collects the effect to improve the efficiency of the battery.

It should be noted that, in this embodiment, although a first doping region 32 and a second doping region 33 are taken as an example, in practice, in a battery, the first doping region 32 and the second doping region 33 are The number can be more and form an interleaved configuration of pnpn and repeat the arrangement. Correspondingly, the arrangement positions and the number of the first electrodes 38 and the second electrodes 39 correspond to the positions and numbers of the first doping region 32 and the second doping region 33, respectively. The number of the first tunneling layers 35 may be the same as that of the first doping regions 32, or the first tunneling layer 35 may be disposed on only a few of the first doping regions 32; similarly, The number of second tunneling layers 36 may be the same as the second doping The regions 33 are identical and correspond one-to-one, or the second tunneling layer 36 may be disposed on only a few of the second doping regions 33.

The first tunneling layer 35 is disposed on the first doping region 32, and the second tunneling layer 36 is disposed on the second doping region 33 to increase the passivation area and passivation effect on the back surface 312. The carrier recombination rate on the surface of the substrate 31 is lowered, so that the photoelectric conversion efficiency of the battery can be improved. Moreover, since the first tunneling layer 35 and the second tunneling layer 36 are thin films, the carrier can be tunneled through, so that the contact resistance can be maintained between the electrode and the doped region without affecting the doping region. Carrier transfer between the electrodes. Therefore, the present invention has the effect of improving the photoelectric conversion efficiency while maintaining a good transmission effect of the carrier.

Referring to FIG. 4, the structure of a second preferred embodiment of the solar cell of the present invention is substantially the same as that of the first preferred embodiment. The difference is that the battery of the embodiment includes a back surface 312 and the first The third dielectric layer 30 between the dielectric layers 34 is connected between the first tunneling layer 35 and the second tunneling layer 36 by the third dielectric layer 30. In this embodiment, the third dielectric layer 30 includes a first layer portion 301 connected between the first tunneling layer 35 and the second tunneling layer 36, and is spaced apart from the first layer portion 301. And connecting the second layer portion 302 of the first tunneling layer 35, and a third layer portion 303 spaced apart from the first layer portion 301 and connected to the second tunneling layer 36. The material of the third dielectric layer 30 may be an oxide, a nitride or the like, such as a material such as yttrium oxide, aluminum oxide or tantalum nitride, and has a function of helping to repair and passivate the surface of the substrate 31.

The third dielectric layer 30, the first tunneling layer 35 and the second wearing layer The tunneling layer 36 can be formed at the same time, and can be formed by a vacuum coating method such as CVD or PVD. In this case, the third dielectric layer 30, the first tunneling layer 35 and the second tunneling layer 36 are made of the same material, and The three can be connected together. The third dielectric layer 30, the first tunneling layer 35 and the second tunneling layer 36 may be formed separately, and when formed separately, the materials may be the same or only two of them may be used. The same, or the materials of the three can be different. Wherein, when the materials are different, as described above, the positive doping and the negatively charged film respectively passivate the n-type second doping region 33 and the p-type first doping region 32 to achieve a better passivation effect. Thereby improving battery efficiency.

The first electrode 38 of the present embodiment is located substantially on the surface of the first tunneling layer 35 and a portion of the surface of the first dielectric layer 34. The second electrode 39 is substantially located on the surface of the second tunneling layer 36 and the first surface. On a partial surface of the dielectric layer 34.

The above is only the preferred embodiment of the present invention, and the scope of the present invention is not limited thereto, that is, the simple equivalent changes and modifications made by the patent application scope and patent specification content of the present invention, All remain within the scope of the invention patent.

3‧‧‧Solar battery

31‧‧‧Substrate

311‧‧‧ positive

312‧‧‧ back

313‧‧‧ front surface electric field layer

314‧‧‧Anti-reflective layer

32‧‧‧First doped area

33‧‧‧Second doped area

34‧‧‧First dielectric layer

341‧‧‧ first opening

342‧‧‧ second opening

35‧‧‧First tunneling layer

36‧‧‧Second tunneling

37‧‧‧Second dielectric layer

371‧‧‧First Floor

372‧‧‧Second floor

373‧‧‧ Third Floor

38‧‧‧First electrode

39‧‧‧Second electrode

Claims (10)

A solar cell comprising: a substrate having an opposite front surface and a back surface; a first doped region having a first conductivity type and located at the back surface; and a second doping region being a second conductivity type and located a first dielectric layer on the back surface and having a first opening and a second opening respectively corresponding to the first doped region and the second doped region; a first tunneling layer Located in the first opening and contacting the first doped region; a second tunneling layer is located in the second opening and contacting the second doping region; a first electrode is located on the back surface and passes through the first An opening contacts the first tunneling layer; and a second electrode is disposed on the back surface and contacts the second tunneling layer via the second opening. The solar cell of claim 1, comprising a second dielectric layer on the first dielectric layer, and the second dielectric layer between the first tunneling layer and the second tunneling layer connection. The solar cell of claim 2, wherein materials of the second dielectric layer, the first tunneling layer and the second tunneling layer are identical to each other. The solar cell of claim 1, comprising a third dielectric layer between the back surface and the first dielectric layer, and the first tunneling layer and the second tunneling layer are Three dielectric layers are connected. The solar cell of claim 1, wherein materials of the first tunneling layer and the second tunneling layer are the same or different from each other. The solar cell of claim 1, wherein the first tunneling layer has a negatively charged film, and the second tunneling layer has a positively charged film. The solar cell of claim 1, wherein any one of the first tunneling layer and the second tunneling layer is composed of a plurality of dielectric films. The solar cell of claim 1, wherein the first electrode and the first doped region are separated by the first tunneling layer. The solar cell of claim 1, wherein the second electrode and the second doped region are separated by the second tunneling layer. A solar cell module comprising: a first plate and a second plate disposed oppositely; at least one solar cell according to claim 1 disposed between the first plate and the second plate; and a packaging material Located between the first plate and the second plate and contacting the solar cell.