玖、發明說明： 【發明所屬之技術領域】 本發明係關於半導體貼合結合體及其製造方法、發光 元件及其製造方法。 【先前技術】 近年來，在半導體元件方面，隨著小型化及高性能化 的進展’係要求將複數個元件部彼此、或元件與基板透過 金屬層來貼合的技術。這種貼合，例士口，係在第一半導體 層及第一半導體層之貼合面全體分別蒸鐘結合金屬層，使 其等互相密合並藉由加溫來進行（以下’將如此般貼合而 成者稱作半導體貼合結合體）。就發光元件而言，例如以 in V私化合物半導體之A1GaInp混晶來形成發光層部（第 一半導體層)之發光元件，係利用AlGalnP混晶與GaAs間 之晶格匹配’而在—單結晶基板上以蟲晶方式成長出 AlGalnP /吧日日構成的發光層部。然而，構成發光層部之 AlGalnP混晶’由於其帶隙比以杬大，所發的光會被us 基板吸收而有#法獲得充分的光取出支丈帛之問豸。為解決 έ亥問題，以日本特開平2001 - 3391 00號公報為首之各種公 報係揭示出’將發光層部成長用的以虹基板予以除去，並 f補強用的元件基板（第二半導體層）透過反射層來貼合於 發光層部（第一半導體層）。 然而’上述半導體貼合結合豸，並I法充分確保貼合 強度可會產生剝離等的問題。X，為了提昇貼合強度 部產生不良影響而 而増咼貼合之熱處理溫度時，會對元件 造成問題。 良好貼八d、述貼。發光70件’除上述問題夕卜，當無法獲得 ^狀態時會使反射率降低，且為提昇貼合強度而增 熱處理溫度時’元件基板（特別是石夕基板）與反射 特別疋Au層)間之冶金性反應變明_，貼合所得之反射 狀態變差’…反射率進一步降低，因此存在 问題。 ,於是，本發明之課題在於，提供—種半導體貼合體， =將複數個半導體層透過結合金屬層所貼合而成者，其就 ^降低貼合熱處理溫度也能獲得充分的貼合強度，並提供 發光元件及其等之製造方法。 ’、 【發明内容】 為了解決上述課題，本發明之半導體貼合結合體，係 透過第一半導體層的貼合面上所形成之第一結合金屬層、 與第二半導體層的貼合面上所形成之第二結合金屬層，進 行結合而構成者，其特徵在於： 在第一半導體的貼合面上’形成比第二結合金屬層硬 的第一凸部，以在第一結合金屬層與第二結合金屬層之結 合界面上，產生順沿該第一凸部之起伏。 以下將本發明稱作「第一發明」。 依據第一發明’藉由在第一半導體的貼合面上，形成 比第二結合金屬層硬的第一凸部’以在第一結合金屬層與 1323041 第二結合金屬層之結合界面上，產生順沿該第一凸部之起 伏。藉此’由於結合金屬層之結合面積變大，故可提昇接 合強度。 其次’本發明之半導體貼合結合體，係透過第一半導 體層的貼合面上所形成之第一結合金屬層、與第二半導體 層的貼合面上所形成之第二結合金屬層，進行結合而構成 者，其特徵在於： 在第一半導體的貼合面上，形成比第二結合金屬層硬 的第一凸部；並在第二半導體的貼合面上，形成比第一結 合金屬層硬的第二凸部； 且第一凸部與第二凸部呈交錯配置。 以下將本發明稱作「第二發明」。 依據第二發明，由於第一凸部與第二凸部係呈交錯配 釁，故會透過第一結合金屬層及第二結合金屬層而形成嵌 合狀態。藉由以這種嵌合狀態來結合，將可提昇貼合強度 導體貼 驟： 為了製造第一發明之半導體貼合結合體，本發明之半 合結合體之製造方法’其特徵在於依序進行以下步 凸部形成步驟，在第-半導體的貼合面上，形成比第 結合金属層硬的第一&部； 第 結合金廣層形成步驟’在第-半導體的貼合面上形成 一結合金屬層’並在第二半導體的貼合面上形成第二結 及 合金屬層， 7 ^23041 έ士 合步驟，使第—結合今 ， 金屬層與第二結合金屬層密合 並將具有順沿第一凸部起 芯仇的第一結合金屬層，在第一 凸部的位置嵌入第二結合金眉 。。隹屬層而進行貼合。 又’為了製造第二發明之车道 r a炙牛導體貼合結合體，係在上 迹第一凸部外，在第二半導體 丄 亍等媸的貼合面上，以與第一凸部 :錯的方式來形成比第-結合金屬層硬的第二凸部；在結 5步驟’係將具有順沿第二凸部起伏的第二結合金屬層， 在第二凸部的位置嵌入第一結合金屬層。 依據本發明，係在第一半導體層及第二半導體層之至 方的貼口面上’形成比對向貼合面上所形成的結合 金屬層硬之凸部’並在結合步驟，將具有順沿凸部起伏的 、、·。合金屬層嵌入另一結合金屬層而進行結合。藉此，第一 結合金屬m二結合金屬層會以嵌合狀態互相結合，由 於結合面積變大’將可提昇貼合強度，且就算降低貼合熱 處理溫度也能獲得充分的貼合強度。 又，第一結合金屬層及第二結合金屬層？均能以Au作 為主成刀。這時，在結合步驟，第一結合金屬層及第二結 合金屬層之貼合可在高於18(rc〜36{rc的溫度範圍内進行 。由於Αυ系的金屬層彼此就算在較低溫下也容易一體化 ，就算降低貼合熱處理溫度也能獲得充分的貼合強度。 又’配置凸部的貼合面上所形成的結合金屬層厚度， 較佳為設定成’相對於凸部在貼合面上的形成高度在卜1〇 倍的範圍。為了使結合金屬層彼此形成良好的結合，結合 金屬層厚度較佳為凸部高度之1倍以上，又當超過1〇倍時 丄323041[Technical Field] The present invention relates to a semiconductor bonded composite, a method of manufacturing the same, a light-emitting device, and a method of manufacturing the same. [Prior Art] In recent years, in terms of miniaturization and high performance, semiconductor devices have been required to bond a plurality of element portions or a device and a substrate to a metal layer. In the case of the bonding, the bonding layer of the first semiconductor layer and the first semiconductor layer is respectively vapor-bonded and combined with the metal layer, so that they are densely combined with each other by heating (hereinafter 'will be so The laminated body is called a semiconductor bonding combination). In the case of a light-emitting element, for example, a light-emitting element in which a light-emitting layer portion (first semiconductor layer) is formed by a mixed crystal of an A1GaInp in a V compound semiconductor is formed by using a lattice matching between an AlGalnP mixed crystal and GaAs. On the substrate, a light-emitting layer portion composed of AlGalnP/day is grown by insect crystal. However, since the AlGalnP mixed crystal constituting the light-emitting layer portion has a large band gap ratio, the emitted light is absorbed by the us substrate, and the method obtains sufficient light extraction. In order to solve the έ 问题 , , 各种 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 元件 元件 元件 元件The light-emitting layer portion (first semiconductor layer) is bonded to the reflective layer. However, the above-mentioned semiconductor bonding is combined with yttrium, and the I method sufficiently ensures that the bonding strength may cause problems such as peeling. X, in order to improve the heat treatment temperature at which the bonding strength is adversely affected, the component may cause problems. Good post eight d, comment. In addition to the above-mentioned problems, when the state of the light is not obtained, the reflectance is lowered, and when the heat treatment temperature is increased to improve the bonding strength, the 'element substrate (especially the stone substrate) and the reflection layer are particularly 疋Au layer) The metallurgical reaction between the two becomes clear, and the reflection state obtained by the bonding deteriorates... The reflectance is further lowered, so that there is a problem. Therefore, an object of the present invention is to provide a semiconductor bonded body in which a plurality of semiconductor layers are bonded through a bonding metal layer, and a sufficient bonding strength can be obtained by lowering the bonding heat treatment temperature. A method of manufacturing a light-emitting element and the like is also provided. In order to solve the above problems, the semiconductor bonded assembly of the present invention is a first bonding metal layer formed on a bonding surface of the first semiconductor layer and a bonding surface with the second semiconductor layer. The formed second bonding metal layer is formed by bonding, and is characterized in that: a first convex portion harder than the second bonding metal layer is formed on the bonding surface of the first semiconductor to be in the first bonding metal layer At the bonding interface with the second bonding metal layer, undulations along the first convex portion are generated. Hereinafter, the present invention will be referred to as "first invention". According to the first invention, by forming a first convex portion that is harder than the second bonding metal layer on the bonding surface of the first semiconductor, at a bonding interface between the first bonding metal layer and the 1323041 second bonding metal layer, An undulation along the first protrusion is generated. Thereby, since the bonding area of the bonding metal layer becomes large, the bonding strength can be improved. Next, the semiconductor bonding assembly of the present invention is a first bonding metal layer formed on the bonding surface of the first semiconductor layer and a second bonding metal layer formed on the bonding surface of the second semiconductor layer. The bonding is performed by forming a first convex portion that is harder than the second bonding metal layer on the bonding surface of the first semiconductor, and forming a first bonding on the bonding surface of the second semiconductor. a second convex portion having a hard metal layer; and the first convex portion and the second convex portion are arranged in a staggered manner. Hereinafter, the present invention will be referred to as "second invention". According to the second aspect of the invention, since the first convex portion and the second convex portion are alternately arranged, the first bonding metal layer and the second bonding metal layer are formed to be in a fitted state. By bonding in such a fitting state, the bonding strength conductor can be lifted: In order to manufacture the semiconductor bonding combination of the first invention, the manufacturing method of the semi-bonded composite of the present invention is characterized in that it is sequentially performed In the following step, the convex portion forming step forms a first & portion which is harder than the first bonding metal layer on the bonding surface of the first semiconductor; and a first bonding gold plating layer forming step to form a bonding surface on the first semiconductor. Bonding the metal layer 'and forming a second junction and a metal layer on the bonding surface of the second semiconductor, 7 ^ 23,041, a gentleman bonding step, so that the first bonding, the metal layer and the second bonding metal layer are combined to have a smooth A first bonding metal layer is formed along the first convex portion, and a second bonding gold eyebrow is embedded at the position of the first convex portion. . The enamel layer is laminated. Further, in order to manufacture the second aspect of the invention, the lane ra yak conductor-bonding combination is attached to the first convex portion of the second semiconductor cymbal or the like, and the first convex portion is wrong. Means to form a second convex portion that is harder than the first-bonding metal layer; in the step 5, the second bonding metal layer having a undulation along the second convex portion, and the first bonding at the position of the second convex portion Metal layer. According to the present invention, the hard surface portion of the bonding metal layer formed on the opposing bonding surface is formed on the surface of the first semiconductor layer and the second semiconductor layer, and in the bonding step, Converging along the convex part, . The metal layer is embedded in another bonding metal layer for bonding. Thereby, the first bonding metal m-bonding metal layers are bonded to each other in a fitting state, and the bonding area becomes large, so that the bonding strength can be improved, and a sufficient bonding strength can be obtained even if the bonding heat treatment temperature is lowered. Also, the first bonding metal layer and the second bonding metal layer? All of them can be made into Au. At this time, in the bonding step, the bonding of the first bonding metal layer and the second bonding metal layer can be performed in a temperature range higher than 18 (rc~36{rc. Since the metal layers of the lanthanoid system are at a lower temperature, It is easy to integrate, and a sufficient bonding strength can be obtained even if the bonding heat treatment temperature is lowered. Further, the thickness of the bonding metal layer formed on the bonding surface on which the convex portion is disposed is preferably set to be 'fitted with respect to the convex portion The formation height on the surface is in the range of 1⁄2 times. In order to form a good bond between the bonding metal layers, the thickness of the bonding metal layer is preferably more than 1 times the height of the convex portion, and when it exceeds 1〇 times, 丄323041
，在結合金屬層將難以產生順沿Λ都沾L 貝/口凸。丨的起伏，可能會無法 嵌入另一方的結合金屬層而進行結合。 【實施方式】 以下’參照圖式說明本發明之半導體貼合結合體之最 佳實施形態。 圖1A、圖1B、圖2A及圖2B，係顯示本發明的半導體 貼合結合體100之第二實施形態及第—實施形態之概念圖 。半導體貼合結合體100，係將第一半導體層1〇4斑第-半導體層107透過結合金屬層5所結合而成。結合金屬層 5’係由第一半導體層104之貼合面A上所形成之第一結合 金屬層5a、及第二半導體層107之貼合面b上所形成之第 二結合金屬層5 b互相結合而成。 圖1A之半導體貼合結合體1〇〇，係在第一半導體層 104的貼合面A上’形成比第二結合金屬層5b硬的第一凸 部6a，以在第一結合金屬層5a與第二結合金屬層5b之結 合界面K上，產生順沿該第一凸部6a之起伏。藉由採這種 狀態來結合，結合金屬層5之結合面積會變大，而使貼合 強度變強固。 圖2A之半導體貼合結合體100，係將第一半導體層 104之貼合面A所配設之第一凸部6a、與第二半導體層 107之貼合面B所配設之第一凸部6b呈交錯配置，且使其 等透過結合金屬層5來形成嵌合狀態。又，在第一結合金 屬層5a與第二結合金屬層5b之結合界面K上，產生順沿 9 1323041 由採這種狀態來結 大’而使貼合強度 第一凸部6a及第二凸部6b之起伏。藉 合’結合金屬層5之結合面積會變得更 變得比圊1A的情形更強固。In the combination of the metal layer, it will be difficult to produce a slanting edge. The undulations of the ridge may not be able to be embedded in the other bonding metal layer for bonding. [Embodiment] Hereinafter, a preferred embodiment of the semiconductor bonded assembly of the present invention will be described with reference to the drawings. Figs. 1A, 1B, 2A and 2B are conceptual views showing a second embodiment and a first embodiment of the semiconductor bonded assembly 100 of the present invention. The semiconductor bonded bonded body 100 is formed by bonding the first semiconductor layer 1 〇 4 spot-semiconductor layer 107 through the bonded metal layer 5. The bonding metal layer 5' is a first bonding metal layer 5a formed on the bonding surface A of the first semiconductor layer 104, and a second bonding metal layer 5b formed on the bonding surface b of the second semiconductor layer 107. Made up of each other. The semiconductor bonding bonded body 1A of FIG. 1A is formed on the bonding surface A of the first semiconductor layer 104 to form a first convex portion 6a harder than the second bonding metal layer 5b to be in the first bonding metal layer 5a. On the bonding interface K with the second bonding metal layer 5b, undulations along the first convex portion 6a are generated. By combining this state, the bonding area of the bonding metal layer 5 becomes large, and the bonding strength becomes strong. The semiconductor bonded assembly 100 of FIG. 2A is a first convex portion in which the first convex portion 6a disposed on the bonding surface A of the first semiconductor layer 104 and the bonding surface B of the second semiconductor layer 107 are disposed. The portions 6b are arranged in a staggered manner, and are made to pass through the bonded metal layer 5 to form a fitted state. Further, at the bonding interface K of the first bonding metal layer 5a and the second bonding metal layer 5b, a slanting edge 9 1323041 is formed to be large in the state of the bonding state, and the bonding strength first convex portion 6a and the second convex portion are formed. The ups and downs of the part 6b. The bonding area of the bonded metal layer 5 becomes more strong than the case of 圊1A.
第一結合金屬層5a及第二結合全屈呙R α隹屬層5b，均以Au為 主成分，彼此會良好地結合而形成結合金屬層5。又，社 合金屬層5,如圖1B及圖2B所示般，係在第一半導體1〇^ 的貼合面A上形成第一結合金制5a、在第二半導體1〇7 的貼合面B上形成第二結合_ 5b，使其等互相密合並 貼合而製得。又，第一結合金屬^ 5a及第二結合金屬層 .’其Au含量均為95質量％以上，在高於18吖~36吖 進行貼合熱處理，將可空_具4士 έ士人 m 肘Γ今易地結合。因此，可簡單的獲得 充分的貼合強度〇結合全屈居V. 、=«鱼屬層5(第一結合金屬層5a及第 二結合金屬層5b，）之好暂， J之材質具體而δ可採用純Au(只要在 1質量％以内則亦可冬古·^订·迪A u 了3有不可避免的雜質），可使上述效果 更加提昇。The first bonding metal layer 5a and the second bonding total yttrium R α lanthanum layer 5b each have Au as a main component and are bonded to each other to form a bonding metal layer 5. Further, as shown in FIG. 1B and FIG. 2B, the bonding metal layer 5 is formed by bonding the first bonding gold 5a and the second semiconductor 1?7 to the bonding surface A of the first semiconductor 1? A second bond _ 5b is formed on the face B, and is made to be bonded to each other and bonded together. Further, the first bonding metal layer 5a and the second bonding metal layer have an Au content of 95% by mass or more, and are subjected to a lamination heat treatment at a temperature higher than 18 吖 to 36 ,, and are vacant _ with 4 gentlemen m The elbow is easy to combine today. Therefore, it is possible to easily obtain a sufficient bonding strength, and combine the full-fledged V., = «fish layer 5 (the first bonding metal layer 5a and the second bonding metal layer 5b), and the material of J is specific and δ Pure Au can be used (as long as it is within 1% by mass, it can also be used in winter, and it can also be inevitable impurities), and the above effects can be further improved.
s又有第一凸部6a夕目上么；A L 之貼σ面A上所形成之第一結合金屬 層5 a厚度Η 5 ’相對於笛 π ^ιτ ρ 对於第一凸部6a在貼合面Α上之形成高 度ΗΜ系設定在1 ~ 10 ^立认狄阁 ^ Μ。的辄圍。又，第—結合金屬層5a之 厚度H5，係第一結合今凰思Jjyyf 一 金屬層5a中第一凸部6a未形成區域 之高度。又，關於第-4士人 乐一、纟。合金屬層5b與第二凸部6b之厚 度關係，也是相同》 圖2A之半導體 第一凸部6a及第二 示形態之構成。又 貼合結合體1 〇〇中，互相呈交錯配置之 凸部6b ’例如可採用圖3A及圖3B所 ’各圖中’在側代表第一半導體層1 〇4 &面A，右側代表第二半導體層1〇7之貼合面b。在圖 3A，係在貼合面A及B上分別形成點狀之凸部h及6b ; =圖3B’係'在第—半導體層1Q4之貼合面a上形成點狀凸 6a，纟第二半導體層1〇7之貼合面B上形成格子狀巴部 又，藉由如此般使凸部6a及6b呈彼此交錯的結合狀 ^ 將'T k幵結合金屬層5a、5b間的結合強度。 圖1A、圖1B之半導體貼合結合體1〇〇中，第一 &部 &可構成位於第一半導體層104的貼合面a與第一結合 金屬層5a間之介在金屬層。又，圖2A及圖2β之半導體貼 合結合體100中，第一凸部6a及第二凸部6b之至少一方 ，可構成位在貼合面A或B、與該貼合面A或B上所形成 之結合金屬層5a或5b間之介在金屬層。這種凸部6a、讣 ，例如可藉由真空蒸鍍或濺鍍等來形成。又，關於介在金 屬層的材料，並沒有特別的限定。該介在金屬層，也能構 成用來減低半導體層與結合金屬層間的接觸阻抗之接合金 屬層。 圖1A、圖ΐβ之半導體貼合結合體1〇〇中，第一凸部 6a可刻設於第一半導體層104之貼合面A。又，圖2A、圖 2B之半導體貼合結合體i 〇〇中第一凸部6a及第二凸部 6b之至少一方，可刻設於貼合面a或b。這種凸部6a' 6b ’例如可對半導體層的主表面實施選擇性蝕刻等而形成出 。這時’可簡便地形成凸部6a、gb。 以上般之半導體貼合結合體1〇〇’ 一方的半導體層可 當作70件部、另一方的半導體層可當作基板部而構成半導 1323041 m το件，例如為可高速開關之GaAs元件與補強用之矽基板 所貼合而構之半導體元件；或兩方的半導體層分別當作不 同的元件部而構成半導體元件，例如GaAs元件與矽元件等 的元件彼此所貼合而構之複合半導體元件等等。 又半導體貼合結合體，也可以是3層以上的半導體 層所貼σ而成之結合體。例如，如圖4A、4B所示般，把半 導體貼合結合體1〇〇當作—半導體層，以其第二半導體層 1 07之貼合面β(或第一半導體層之貼合面Α)之相反側主表 面作為新貼合面C，在該貼合面C上形成第三凸部6c及第 三結合金屬層5c，又在第三半導體層lu之貼合面D上形 成第四凸部6d及第四結合金屬層5d，使其等密合後進行 貼合’即製得新的半導體貼合結合體丨〇〇，。 又’為謀求各半導體上所設之端子間的導通、或半導 體層間之選擇性地導通，如圖5A ' 5B所示般，以對應待導 通區域的方式’在第一半導體層1〇4之貼合面A及第二半 導體層107之貼合面β上，分別選擇性地形成第一結合金 屬層5a及第二結合金屬層5b，使其等密合後貼合。這時 ，係在半導體層之貼合面與結合金屬層間形成凸部6a，使 具有順沿該凸部6a的起伏之第一結合金屬層5a ,在該凸 部6a的位置嵌入第二結合金屬層5b而進行結合。又，當 半導體層上設有凸狀端子時，也能將該端子當作凸部6& 來使用。 以上之半導體貼合結合體，可適用於在第一半導體層 或第一半導體層具有發光部之發光元件。以下，參照圖式 12 來說明本發明的發光元件之實施形態。 圖6係顯示本發明一實施形態之發光元件丨之概念圖 。發光元件1，係在η型矽單結晶元件基板、即矽單結晶 =7(第二半導體層)之貼合面Β上’透過主成分為^之 結合金屬層5而貼合發光層部2(第一半導體層之化合物半 導體層4之一部分）。這種構造的發光元件卜來自發光層 2之光，係在光取出面側所直接放射之光上重疊結合金 屬層5之反射光’而以這種方式來取出。 發光層部2 ,例如係將無摻質（AlxGai x)yIni”p(其中 ，〇$?^0.55,〇‘45$丫$〇.55)混晶所構成之活性層21， 以第一導電型包覆層及第二導電型包覆層挾持而構成。該 第一導電型包覆層，在本實施形態為p yP(其中χ<ζ$ 1)所構成之p型包覆層23 ;該不同於第一導 電型包覆層之第二導電型包覆層，在本實施形態為η型 ⑷如卜2)yIni· yp(其中χ〈ζ$ 〇所構成之^型包覆層22。 依活性層21之組成，可將發光波長在綠色到紅色區域（峰 值發光波長55〇nm〜670nm)進行調整。發光元件1中，在金 屬電極11側配置p型A1GaInP包覆層23,在結合金屬層5 側配置η型AlGalnP層22。因此，在金屬電極11側之通 電極性為正。又，在此所指的「無摻質」，係代表「未積 極地添加摻質」，並未排除一般製程中無可避免會混入之 摻質成分（例如上限為l〇i3〜1〇iVcm3左右广又，相反地， 也能將P型包覆層23設於結合金屬層5側，將η型包覆層 22設於金屬電極11側。這時，通電極性變相反，其他元 13 件也成為相反的導電型。 在么光層部2之矽單結晶基板7側的相反側之主 表面上’形成有A1GaAs構成之電流擴散層3，在該主表面 之大致中A為了對發光層冑2施加發光驅動電愿，係以 被覆局部主表面的方式形成金屬電極（例# Au電極）1卜電 流擴散層3之主表面之金屬電極u的周圍區域，係構成發 光層部2之光取出區域。以下，將構成第一半導體層、即 發光層部2與電流擴散層3組成之層體，稱為化合物半導 體層4又’在Si單結晶基板7的背面，係形成被覆其整 體之金屬電極（背面電極，例如Au電極）12。在金屬電極 12與Si單結晶基板7之間插入AuSb接合金屬層92，以作 為基板側接合金屬層。又，取代AuSb接合金屬層92，使 用AuSn接合金屬層當作基板侧接合金屬層亦可。 構成第二半導體層之矽單結晶基板7,係將矽單結晶 棒切片、研磨而製造出者，其厚度例如為1〇〇〜5〇〇 Am。其 隔著結合金屬層5 .而和發光層部2貼合》 在具有發光層部2之第一半導體層、即化合物半導體 層4之貼合面a上，形成可反射發光層部2的發光光束之 第—結合金屬層5a，且在化合物半導體層4之貼合面a與 第一結合金屬層5a之間形成第一凸部6a(介在金屬層 又，第一凸部6a，為了降低第一半導體層之化合物半導體 層4、與第一結合金屬層5a間之接觸電阻，係以含有載子 源合金成分之接合金屬層來構成。具體而言第一凸部仏 係由AuGeNi接合金屬層（例如Ge : 15質量％、Ni : 1〇質量 1323041 接合金屬 硬，係分 面積率為 1%-25% %)構成’其有助於降低元件之串列電阻。域咖 層’其質地比主成分為Au之第二結合金屬層Μ 散形成於化合物半導體層4之貼合面A，其形成 又’在第二半導體層之石夕單姓曰旦此7 /早結晶基板7之貼合面B上 ，以與第一凸部63錯開的方式配置第二凸部6b。將第一 、。。金屬層5a與第一結合金屬層讥結合而構成金屬層5 ::這些凸部“係透過結合金屬層5而以嵌合狀態來 結合，因此貼合強度變得強固。 $ u又，在第一結合金屬層5a ”第二結合金屬層5b之結合界面上，係產生順沿凸部6a 、6b之起伏，故結合面積增大β 又’第-結合金屬層5a與第二結合金屬層5b，均以 Au為主成分。詳而言之，係由純Au或Au含有率^質量％ 2之Au合金所構成。又，在第二結合金屬層5b與_單 ••。曰曰基板7之間，&防止該石夕單結晶基板7之石夕成分往第 -結合金屬層5b擴散’係介設有擴散阻止層8 1擴散阻 止層8之主成分為Ti。又，取代n而以Ni或^為主成 分亦可。又，在擴散阻止層8與矽單結晶基板7之間，以 接觸矽單結晶基板7的方式’係形成有基板側接合金屬層 之AuSb接合金屬層91(例如Sb : 5質量％)。又，取代AuSb 接合金屬層91而使用AuSn接合金屬層亦可。 凸部6a、6b，係以圖3A、3B所例示的形態呈交錯配 置。例如，如圖3B所示般，在化合物半導體層4之貼合面 A上配置接合金屬層構成之點狀凸部6a，在另一方之；ς夕單 15 !323〇41 結晶基板7的貼合面Β上刻設格子狀的凸部扑。凸部6a、 6b之形成高度H6分別為例如5〇,〇nm，結合金屬層5a、 5b之厚度H5,相對於該形成高度邮係設定在H〇倍的範 圍。又，結合金屬層5之厚度(第—結合金屬層5a及第二 結合金屬《5b之合計厚度），為確保充分的反射效果，較 佳為8〇nm以上，其上限雖沒有特別的限制，但因反射效果 會飽和，因此可兼顧成本來做適當地決定（例如丨〆…以下 〇 上述半導體貼合結合體之製造方法，係適用於製作第 一半導體具有#光層冑2之發光元# } 1下作詳細的說 明。 首先，如圖7之步驟i所示般，在發光層成長用基板 之半導體單結晶基板、即GaAs單結晶基板3〇的主表面上 ，依序磊晶成長出：p型GaAs緩衝層31(例如〇. …、 AlAs剝離層32(例如0.5/zm)、p型A1GaAs電流擴散層3( 例如5 " m)。之後成長出發光層部2，亦即依序磊晶成長出 P型AlGalnP包覆層23(l/im)、AlGaInP活性層2i(無摻 質 ’ 〇.6/zm)、n 型 AlGalnP 包覆層 22(lem)» 接著，如步驟2所示般，在發光層部2之主表面上 分散形成出AuGeNi構成的第一凸部6a(凸部形成步驟） 在形成AuGeNi第一凸部6a後，於350〜550。(：的溫度範圍 進行合金化熱處理。之後，以覆蓋AuGeNi第一凸部6a的 方式來形成第一結合金屬層5a。這時，第一結合金屬居$ 係具有順沿AuGeNi第一凸部6a的起伏。又，尤欢 牡發光層部 16 2與AuGeNi第一凸部6a夕閂 B ，係藉由上述合金化熱處理 而形成合金化區域’故可大幅減低串列電阻。 另一方面，如步驟3 所不般，在另行準備出之一主表 上設有第二凸部6b之料結晶基板7(n型）的兩主表面 〜形成基板側接合金屬層之⑽接合金屬層 如 =般：可為AuSn接合金屬層），以跡峨之溫度範 :^于5金化處理。接著，在_接合金屬層以上，形 成分為Tl之擴散阻止層8(厚度例如編)。接著， :上方形成第二結合金屬層5b。在此，第二結合金屬層 形成糸步具驟有)順沿第二㈣化之起伏（以上為止屬結合金屬層 12二？，一接合金屬層92上形成背面電極層 ，==所構成者)。以上步驟之各金屬層的形成 係如用濺鍍或真空蒸鍍等來進行。 如上述般’在第一中 面一第一 +導體層之石夕單結晶基板7的貼合 〜3阶下進後’如步驟4所^般’在超過18(rc 側之第-处人A 评而吕之，係將矽單結晶基板7 金屬層—5°。·屬層5b,重疊於發光層部2上的第-結合 卢^制於超们8〇1默、例如_進行貼合熱 处 而製作出基板貼人⑲ ‘、’、 結合金屬…第:=(結合步驟)。這“ 金屬層—有順.!Γ 的界面，使第一結合 位置朝向第1结人2一凸部6a的起伏）在第一凸部“的 順沪第1 D、，屬層5b'使第二結合金屬層5b(具有 、凸部此的起幻在第二凸部此的位置朝向第一結 17 1323041 合金屬層,5a:彼此交錯嵌合而重叠。如此般，使硬單結曰 基板7透過第一結合全. •‘日日 。《金屬層5a與第二結合金屬層 合於發光層部2。又，第_ a人而貼 弟結合金屬層5a與第二結合金屬 層5b係藉由上述貼合埶虛 生屬 α熱處理而一體化成結合金屬層5。笛 一結合金屬層5a與第二結合 。隹屬層5b,由於均以不易童 化的Au為主體，上述貼合 行也毫無問題。 ”，、處理，就异例如在大氣中進 又’在第二結合金屬層5b與碎單結晶基板了（喊接 合金屬層91)之間插入主成分為Ti之擴散阻止層8。貼人 熱處理時，㈣單結晶基板7朝向第二結合金屬層5b之； 成分擴散會被擴散阻止@ 8所阻擋，而有效抑制朝第二社 合金屬層5b、甚至是朝經貼合而一體化之結合金屬… 之矽成分滲出。其結果’最終獲得之結合金屬I 5的反射 面，能防止Au-Si之共晶反應所造成之失序等不佳情形， 能實現出良好的反射率…藉由結合金屬層5,能使矽 單結晶基板7與化合物半導體層4之貼合強度維持在高水 準。 间 接著，進入步驟5,將上述基板貼合體5〇浸潰於例如 10 %氫氟酸水溶液構成的姓刻液，將緩衝層31與發光芦部 2間所形成的AlAs剝離層32實施選擇性蝕刻，而從化合 物半導體層4和與其接合之矽單結晶基板7之積層體5〇a 上，將GaAs單結晶基板30(對來自發光層部24的光呈不 透明）予以除去。又，也能取代A1 As剝離層32而使用 A11 nP蝕刻阻止層’使用對GaAs具有蝕刻選擇性之第一 # 18 丄叶丄 刻液(例如氨/過氧化氫混合液)將GaAS單結晶基板3"0 ·s has the first convex portion 6a; the first bonding metal layer 5a formed on the σ surface A of the AL has a thickness Η 5 ' with respect to the flute π ^ιτ ρ for the first convex portion 6a The height of the formation on the fascia is set at 1 ~ 10 ^ Li Di Di Ge ^ Μ. The circumference of the fence. Further, the thickness H5 of the first-bonding metal layer 5a is the height of the region where the first convex portion 6a is not formed in the first metal layer 5a of the first metal layer Jayyf. Also, regarding the 4th person, Le Yi, Yu. The thickness relationship between the metal-clad layer 5b and the second convex portion 6b is also the same as that of the semiconductor first convex portion 6a and the second embodiment of Fig. 2A. Further, in the bonded body 1 凸, the convex portions 6b' which are alternately arranged with each other can be, for example, shown in FIGS. 3A and 3B. 'In the respective drawings, the first semiconductor layer 1 〇4 & face A is represented on the side, and the right side represents The bonding surface b of the second semiconductor layer 1〇7. In Fig. 3A, point-like convex portions h and 6b are formed on the bonding faces A and B, respectively. = Fig. 3B' is a dot-like projection 6a formed on the bonding surface a of the first semiconductor layer 1Q4. A lattice-like portion is formed on the bonding surface B of the two semiconductor layers 1 to 7, and the convex portions 6a and 6b are interlaced with each other in such a manner that the combination of the metal layers 5a and 5b is combined with the 'T k幵. strength. In the semiconductor bonded combination 1A of FIG. 1A and FIG. 1B, the first &amplifier& can form a metal layer interposed between the bonding surface a of the first semiconductor layer 104 and the first bonding metal layer 5a. Further, in the semiconductor bonded combination 100 of FIGS. 2A and 2β, at least one of the first convex portion 6a and the second convex portion 6b may be formed on the bonding surface A or B and the bonding surface A or B. The metal layer 5a or 5b formed on the upper layer is interposed between the metal layers. Such convex portions 6a and 讣 can be formed, for example, by vacuum evaporation or sputtering. Further, the material to be interposed in the metal layer is not particularly limited. The metal layer can also form a bonding metal layer for reducing the contact resistance between the semiconductor layer and the bonding metal layer. In the semiconductor bonded joint 1A of Fig. 1A and Fig. ,, the first convex portion 6a can be formed on the bonding surface A of the first semiconductor layer 104. Further, at least one of the first convex portion 6a and the second convex portion 6b in the semiconductor bonded assembly i of Figs. 2A and 2B can be engraved on the bonding surface a or b. Such a convex portion 6a' 6b ' can be formed, for example, by selective etching or the like on the main surface of the semiconductor layer. At this time, the convex portions 6a and gb can be easily formed. In the above semiconductor bonding assembly, one semiconductor layer can be regarded as 70 parts, and the other semiconductor layer can be used as a substrate portion to form a semiconductor 1330441 m τ, for example, a GaAs device capable of high-speed switching. a semiconductor element that is bonded to a substrate for reinforcement, or a semiconductor element that is formed as a different element portion to form a semiconductor element. For example, a device such as a GaAs element and a germanium element is bonded to each other. Semiconductor components and the like. Further, the semiconductor bonded combination may be a combination of three or more semiconductor layers attached to σ. For example, as shown in FIGS. 4A and 4B, the semiconductor bonding bonded body 1 is regarded as a semiconductor layer, and the bonding surface β of the second semiconductor layer 107 (or the bonding surface of the first semiconductor layer) The opposite side main surface serves as a new bonding surface C, and the third convex portion 6c and the third bonding metal layer 5c are formed on the bonding surface C, and a fourth surface is formed on the bonding surface D of the third semiconductor layer lu. The convex portion 6d and the fourth bonding metal layer 5d are bonded to each other and then bonded together to obtain a new semiconductor bonding bonded body. Further, in order to achieve conduction between terminals provided in the respective semiconductors or selective conduction between the semiconductor layers, as shown in FIGS. 5A to 5B, the first semiconductor layer 1 is in a manner corresponding to the region to be conductive. The first bonding metal layer 5a and the second bonding metal layer 5b are selectively formed on the bonding surface β of the bonding surface A and the second semiconductor layer 107, and are bonded to each other after bonding. At this time, the convex portion 6a is formed between the bonding surface of the semiconductor layer and the bonding metal layer, so that the first bonding metal layer 5a having the undulation along the convex portion 6a is embedded, and the second bonding metal layer is embedded at the position of the convex portion 6a. Combine with 5b. Further, when a bump is provided on the semiconductor layer, the terminal can be used as the convex portion 6 & The above semiconductor bonded combination can be applied to a light-emitting element having a light-emitting portion in the first semiconductor layer or the first semiconductor layer. Hereinafter, an embodiment of a light-emitting element of the present invention will be described with reference to FIG. Fig. 6 is a conceptual view showing a light-emitting element 一 according to an embodiment of the present invention. The light-emitting element 1 is bonded to the light-emitting layer portion 2 on the bonding surface of the n-type single crystal element substrate, that is, the bonding surface of the single crystal = 7 (second semiconductor layer) through the bonding metal layer 5 having the main component (a portion of the compound semiconductor layer 4 of the first semiconductor layer). The light-emitting element of such a structure is obtained by extracting the light from the light-emitting layer 2 by superimposing the reflected light of the metal layer 5 on the light directly radiated from the side of the light extraction surface. The luminescent layer portion 2 is, for example, an active layer 21 composed of a mixed crystal of no dopant (AlxGai x) yIni"p (where 〇$?^0.55, 〇'45$丫$〇.55), with the first conductive The cladding layer and the second conductivity type cladding layer are sandwiched. The first conductivity type cladding layer is a p-type cladding layer 23 composed of p yP (where χ < ζ $ 1) in the present embodiment; The second conductive type cladding layer different from the first conductive type cladding layer is n-type (4) as in 2) yIni· yp (wherein the cladding layer 22 is formed by χ ζ 〇 〇 22 Depending on the composition of the active layer 21, the emission wavelength can be adjusted in the green to red region (peak emission wavelength 55 〇 nm to 670 nm). In the light-emitting element 1, the p-type A1GaInP cladding layer 23 is disposed on the metal electrode 11 side. The n-type AlGalnP layer 22 is disposed on the side of the metal layer 5. Therefore, the polarity of the current on the side of the metal electrode 11 is positive. Further, the term "no dopant" as used herein means "the dopant is not actively added". The inclusion components that are inevitably mixed in the general process are not excluded (for example, the upper limit is l〇i3~1〇iVcm3 or so, and conversely, the P-type cladding layer 23 can also be used. On the side of the bonding metal layer 5, the n-type cladding layer 22 is provided on the side of the metal electrode 11. At this time, the polarity of the electrification is reversed, and the other elements 13 are also opposite conductivity types. On the main surface on the opposite side of the substrate 7 side, a current diffusion layer 3 made of A1GaAs is formed, and in the main surface, A is formed by coating a local main surface in order to apply a light-emission drive to the light-emitting layer 胄2. The metal electrode (Example # Au electrode) 1 is a region around the metal electrode u on the main surface of the current diffusion layer 3, and constitutes a light extraction region of the light-emitting layer portion 2. Hereinafter, the first semiconductor layer, that is, the light-emitting layer portion 2 is formed. The layer body composed of the current diffusion layer 3, which is called the compound semiconductor layer 4, is formed on the back surface of the Si single crystal substrate 7, and a metal electrode (back surface electrode, for example, an Au electrode) 12 covering the entire body is formed. The AuSb bonding metal layer 92 is interposed between the Si single crystal substrates 7 as a substrate side bonding metal layer. Further, instead of the AuSb bonding metal layer 92, an AuSn bonding metal layer may be used as the substrate side bonding metal layer. The single crystal substrate 7 of the conductor layer is produced by slicing and polishing a single crystal rod, and the thickness thereof is, for example, 1 〇〇 to 5 〇〇 Am. The light-emitting layer portion 2 is interposed therebetween. The bonding-forming metal layer 5a which can reflect the light-emitting beam of the light-emitting layer portion 2 is formed on the bonding surface a of the first semiconductor layer having the light-emitting layer portion 2, that is, the compound semiconductor layer 4, and is in the compound semiconductor layer. a first convex portion 6a is formed between the bonding surface a of the fourth bonding layer a and the first bonding metal layer 5a (in addition to the metal layer, the first convex portion 6a, in order to lower the compound semiconductor layer 4 of the first semiconductor layer, and the first bonding metal) The contact resistance between the layers 5a is constituted by a bonding metal layer containing a carrier component alloy component. Specifically, the first convex portion is composed of an AuGeNi bonding metal layer (for example, Ge: 15% by mass, Ni: 1 〇 mass 1323041, bonding metal hard, and the area ratio is 1% to 25% by weight). Reduce the string resistance of the component. The domain coffee layer has a texture which is formed on the bonding surface A of the compound semiconductor layer 4 than the second bonding metal layer whose main component is Au, and which forms a 'in the second semiconductor layer. The second convex portion 6b is disposed on the bonding surface B of the crystal substrate 7 so as to be shifted from the first convex portion 63. Will be the first. . The metal layer 5a is bonded to the first bonding metal layer 而 to form the metal layer 5 :: these convex portions are bonded in a fitted state through the bonding metal layer 5, so that the bonding strength becomes strong. A bonding interface of the bonding metal layer 5a" and the second bonding metal layer 5b produces undulations along the convex portions 6a, 6b, so that the bonding area is increased by β and the first-bonding metal layer 5a and the second bonding metal layer 5b They are all based on Au. Specifically, it is composed of an Au alloy having an Au content or an Au content of 2% by mass. Also, in the second bonding metal layer 5b and _ single ••. Between the ruthenium substrates 7, <preventing the diffusion of the slabs of the singular single crystal substrate 7 to the first bonding metal layer 5b, the diffusion preventing layer 8 is provided, and the main component of the diffusion preventing layer 8 is Ti. Further, in place of n, Ni or ^ may be used as a main component. Further, an AuSb bonding metal layer 91 (for example, Sb: 5 mass%) having a substrate-side bonding metal layer is formed between the diffusion preventing layer 8 and the single crystal substrate 7 so as to be in contact with the single crystal substrate 7. Further, instead of the AuSb bonding metal layer 91, an AuSn bonding metal layer may be used. The convex portions 6a and 6b are alternately arranged in the form illustrated in Figs. 3A and 3B. For example, as shown in FIG. 3B, a dot-like convex portion 6a made of a bonding metal layer is disposed on the bonding surface A of the compound semiconductor layer 4, and the other is placed on the bonding surface of the crystal substrate 7 of the ς夕单15!323〇41 A lattice-shaped convex portion is engraved on the joint surface. The formation heights H6 of the convex portions 6a, 6b are, for example, 5 〇, 〇 nm, and the thickness H5 of the bonding metal layers 5a, 5b are set to be within a range of H 〇 with respect to the formation height. In addition, the thickness of the metal layer 5 (the total thickness of the first bonding metal layer 5a and the second bonding metal "5b") is preferably 8 〇 nm or more in order to secure a sufficient reflection effect, and the upper limit is not particularly limited. However, since the reflection effect is saturated, it can be appropriately determined in consideration of cost (for example, the manufacturing method of the above-described semiconductor bonding combination is suitable for producing the first semiconductor having the light layer of #光层胄2# First, as shown in step i of Fig. 7, on the main surface of the semiconductor single crystal substrate of the substrate for emitting a light-emitting layer, that is, the main surface of the GaAs single crystal substrate, the epitaxial growth is sequentially performed. : p-type GaAs buffer layer 31 (for example, ..., AlAs release layer 32 (for example, 0.5 / zm), p-type A1 GaAs current diffusion layer 3 (for example, 5 " m). Then, the light-emitting layer portion 2 is grown, that is, The epitaxial epitaxial growth of the P-type AlGalnP cladding layer 23 (l / im), AlGaInP active layer 2i (no dopant ' 〇. 6 / zm), n-type AlGalnP cladding layer 22 (lem) » Next, as in step 2 As shown, a first convex portion 6 made of AuGeNi is dispersedly formed on the main surface of the light-emitting layer portion 2. a (protrusion portion forming step) After the AuGeNi first convex portion 6a is formed, an alloying heat treatment is performed at a temperature range of 350 to 550. The first bonding metal is formed to cover the AuGeNi first convex portion 6a. Layer 5a. At this time, the first bonding metal has a undulation along the first convex portion 6a of the AuGeNi. Further, the Eucalyptus luminescent layer portion 16 2 and the AuGeNi first convex portion 6a are latched by the above alloy. By heat-treating to form an alloyed region, the tandem resistance can be greatly reduced. On the other hand, as in step 3, a material crystal substrate 7 having a second convex portion 6b is provided on one of the main tables. The two main surfaces of the type - forming the substrate side bonding metal layer (10) bonding metal layer, such as: can be AuSn bonding metal layer), with a temperature range of the trace: ^ 5 gold processing. Then, in the _ joint metal Above the layer, a diffusion preventing layer 8 (thickness such as braided) is formed into T1. Next, a second bonding metal layer 5b is formed over the top layer. Here, the second bonding metal layer is formed to have a step (step) The undulations (the above is the combination of the metal layer 12?? A back electrode layer is formed on the layer 92, and == is formed.) The formation of each metal layer in the above step is performed by sputtering or vacuum evaporation, etc. As described above, the first + conductor in the first middle surface The bonding of the layer of the stone single crystal substrate 7 is reduced to the next step after the 3rd step, as in the case of step 4, in the case of more than 18 (the side of the rc side - the person A is evaluated by Lu Zhi, the single crystal substrate 7 metal Layer - 5 °. genus layer 5b, the first-bonding layer superimposed on the luminescent layer portion 2 is super 8 〇 1 默, for example, _ affixing heat to create a substrate affixing 19 ', ', Combine metal...第:=(combination step). This "metal layer - having an interface of 顺.! , such that the first bonding position faces the undulation of the first node 2 and the convex portion 6a) is made in the first convex portion "Shunhu 1 D, genus layer 5b" The second bonding metal layer 5b (having a convex portion of the convex portion at the position of the second convex portion toward the first junction 17 1323041 and the metal layer, 5a: are interlaced and overlapped with each other. Thus, the hard single crucible The substrate 7 is transmitted through the first bonding. • 'Day. The metal layer 5a and the second bonding metal are laminated to the light-emitting layer portion 2. Further, the third layer is bonded to the metal layer 5a and the second bonding metal layer 5b. It is integrated into the bonded metal layer 5 by heat treatment of the above-mentioned bonded 埶 生 α α. The flute-bonding metal layer 5a is bonded to the second layer. The eucalyptus layer 5b is mainly composed of Au which is not easily catered, and the above-mentioned bonding There is no problem in the line. ",, processing, for example, in the atmosphere, and in the second bonding metal layer 5b and the single crystal substrate (called the bonding metal layer 91), the diffusion of the main component is Ti is prevented. Layer 8. When the heat treatment is applied, (4) the single crystal substrate 7 faces the second bonding metal layer 5b; the component diffusion is diffused Preventing the blockage of @8, and effectively suppressing the bleed out of the bismuth component toward the second commissure metal layer 5b, or even the bonded metal which is integrated with the bonding. As a result, the resulting surface of the bonding metal I 5 is finally obtained. It is possible to prevent a disorder caused by the eutectic reaction of Au-Si, and to achieve a good reflectance. By bonding the metal layer 5, the bonding strength between the single crystal substrate 7 and the compound semiconductor layer 4 can be maintained. In a high level, the process proceeds to step 5, and the substrate bonding body 5 is impregnated with, for example, a 10% hydrofluoric acid aqueous solution, and the AlAs peeling layer 32 formed between the buffer layer 31 and the luminescent reed 2 is formed. By performing selective etching, the GaAs single crystal substrate 30 (which is opaque to light from the light-emitting layer portion 24) is removed from the compound semiconductor layer 4 and the laminated body 5〇a of the tantalum single crystal substrate 7 bonded thereto. It is also possible to replace the A1 As release layer 32 and use the A11 nP etch stop layer to use the first # 18 丄 丄 etching solution (for example, ammonia/hydrogen peroxide mixed solution) having etch selectivity to GaAs to place the GaAS single crystal substrate 3" ;0 ·
GaAs緩衝層31 一起蝕刻除去，然後使用對A·具有蝕 刻選擇性之第二蝕刻液(例如鹽酸’或為除去ai氧化層而 添加氫氟酸亦可）將蝕刻阻止層予以蝕刻除去。 然後’如步驟6所示般，在經除去_單結晶基板 3〇而露出的電流擴散層3主表面的一部分上，形成打線用 電極11 (接合墊）。以下，依通常的方法切割成半導體晶片 ’將其固接於支持體而進行引線的打線等後，實施樹脂封 裝而製得最終的發光元件。 鲁 又上述貫施形態中，係在貼合面A、β上分別配置凸 4 6 a 6 b，但例如圖8所示般，僅在化合物半導體層4 (第 -半導體層)之貼合面A形成第一凸部6a而構成發光元件 K半導體貼合結合體）亦可。 【圖式簡單說明】 (一）圖式部分 圖1A係概略顯示本發明的半導體貼合結合體之第二實 籲 施形態之第一圖式。 圖1B係概略顯示本發明的半導體貼合結合體之第二實 施形態之第二圖式。 圖2A係概略顯示本發明的半導體貼合結合體之第一實 施形態之第一圖式。 圖2B係概略顯示本發明的半導體貼合結合體之第一實 施形態之第二圖式。 19 1323041 圖3A係顯示圖2A、圖2B的半導體貼合結合體之凸部 配置形態之第一圖式。 圖3B係顯示圖2A、圖2B的半導體貼合結合體之凸部 配置形態之第二圖式。 圖4A係概略顯示3層構造的半導體貼合結合體之第一 圖式。 圖4B係概略顯示3層構造的半導體貼合結合體之第二 圖式。 圖5A係概略顯示選擇性地形成結合金屬層之半導體貼 合結合體之第一圖式。 圖5B係概略顯示選擇性地形成結合金屬層之半導體貼 合結合體之第二圖式。 圖6係概略顯示本發明的發光元件之第一實施形態。 圖7係顯示圖6的發光元件之製造步驟。 圖8係概略顯示本發明的發光元件之第二實施形態。 (二）元件代表符號 A、B、C、D…貼合面 K…結合界面 2…發光層部 3…電流擴散層 4…化合物半導體層 5…結合金屬層 5a...第一結合金屬層 20 5b. ••第二結合金屬層 5c. ••第三結合金屬層 5d· ••第四結合金屬層 6a. ••第一凸部 6b. ••第二凸部 6c· ••第三凸部 6d. .•第四凸部 7… 碎早結晶基板 8… 擴散阻止層 1323041 11、12…金屬電極 21…活性層 2 2…η型包覆層 23…ρ型包覆層 30…GaAs單結晶基板 31…缓衝層 32…剝離層 50…基板貼合體 50a···積層體 91、92…AuSb接合金屬層 100 ' 100’…半導體貼合結合體 104···第一半導體層 107···第二半導體層The GaAs buffer layer 31 is removed by etching, and then the etching stopper layer is removed by etching using a second etching liquid (e.g., hydrochloric acid ' having an etching selectivity or a hydrofluoric acid to remove the ai oxide layer). Then, as shown in the step 6, a wire bonding electrode 11 (bonding pad) is formed on a part of the main surface of the current diffusion layer 3 which is exposed by removing the single crystal substrate. In the following, the semiconductor wafer is cut by a usual method. After the wire is fixed to the support and the wire is bonded, the resin is sealed to obtain a final light-emitting device. In the above-described embodiment, the convex portions 4 6 a 6 b are disposed on the bonding surfaces A and β, respectively. However, as shown in FIG. 8 , only the bonding surface of the compound semiconductor layer 4 (the first semiconductor layer) is used. A may form the first convex portion 6a to constitute the light-emitting element K semiconductor bonded joint). BRIEF DESCRIPTION OF THE DRAWINGS (1) Schematic portion Fig. 1A is a view schematically showing a first embodiment of a second embodiment of the semiconductor bonded assembly of the present invention. Fig. 1B is a view schematically showing a second embodiment of the second embodiment of the semiconductor bonded assembly of the present invention. Fig. 2A is a view schematically showing a first embodiment of the first embodiment of the semiconductor bonded assembly of the present invention. Fig. 2B is a view schematically showing a second embodiment of the first embodiment of the semiconductor bonded assembly of the present invention. 19 1323041 Fig. 3A is a first view showing a configuration of a convex portion of the semiconductor bonded combination of Figs. 2A and 2B. Fig. 3B is a second view showing a configuration of a convex portion of the semiconductor bonded combination of Figs. 2A and 2B. Fig. 4A is a view schematically showing a first embodiment of a semiconductor bonded combination of a three-layer structure. Fig. 4B is a view schematically showing a second embodiment of a semiconductor bonded combination of a three-layer structure. Fig. 5A is a view schematically showing a first embodiment of a semiconductor bonding bonded body in which a bonding metal layer is selectively formed. Fig. 5B is a view schematically showing a second pattern of a semiconductor bonding bonded body in which a bonding metal layer is selectively formed. Fig. 6 is a view schematically showing a first embodiment of a light-emitting element of the present invention. Fig. 7 is a view showing the manufacturing steps of the light-emitting element of Fig. 6. Fig. 8 is a view schematically showing a second embodiment of the light-emitting element of the present invention. (2) Component Representation Symbols A, B, C, D... Bonding Surface K... Bonding Interface 2... Light Emitting Layer 3... Current Diffusion Layer 4... Compound Semiconductor Layer 5... Bonding Metal Layer 5a... First Bonding Metal Layer 20 5b. ••Second bonding metal layer 5c. ••3rd bonding metal layer 5d·••4nd bonding metal layer 6a. ••1st convex part 6b.••2nd convex part 6c·••third Convex portion 6d.. 4th convex portion 7... Broken early crystal substrate 8... Diffusion preventing layer 1330441 11、12... Metal electrode 21...Active layer 2 2...N-type cladding layer 23...P-type cladding layer 30...GaAs Single crystal substrate 31...buffer layer 32...release layer 50...substrate bonding body 50a···layered body 91,92...AuSb bonding metal layer 100 '100'...semiconductor bonding bonded body 104···first semiconductor layer 107 ···Second semiconductor layer