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TWI368165B - Processor and method for recovering global history shift register and return address stack thereof - Google Patents

Processor and method for recovering global history shift register and return address stack thereof

Info

Publication number
TWI368165B
TWI368165B TW097132798A TW97132798A TWI368165B TW I368165 B TWI368165 B TW I368165B TW 097132798 A TW097132798 A TW 097132798A TW 97132798 A TW97132798 A TW 97132798A TW I368165 B TWI368165 B TW I368165B
Authority
TW
Taiwan
Prior art keywords
processor
shift register
return address
global history
address stack
Prior art date
Application number
TW097132798A
Other languages
Chinese (zh)
Other versions
TW201007559A (en
Inventor
Guan Ying Chiou
Yuan Jung Kuo
Hui Chin Yang
Tzu Min Chou
Shun Chieh Chang
Chung Ping Chung
Original Assignee
Faraday Tech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Faraday Tech Corp filed Critical Faraday Tech Corp
Priority to TW097132798A priority Critical patent/TWI368165B/en
Publication of TW201007559A publication Critical patent/TW201007559A/en
Application granted granted Critical
Publication of TWI368165B publication Critical patent/TWI368165B/en

Links

TW097132798A 2008-08-13 2008-08-27 Processor and method for recovering global history shift register and return address stack thereof TWI368165B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW097132798A TWI368165B (en) 2008-08-13 2008-08-27 Processor and method for recovering global history shift register and return address stack thereof

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
TW97130873 2008-08-13
TW097132798A TWI368165B (en) 2008-08-13 2008-08-27 Processor and method for recovering global history shift register and return address stack thereof

Publications (2)

Publication Number Publication Date
TW201007559A TW201007559A (en) 2010-02-16
TWI368165B true TWI368165B (en) 2012-07-11

Family

ID=44827122

Family Applications (1)

Application Number Title Priority Date Filing Date
TW097132798A TWI368165B (en) 2008-08-13 2008-08-27 Processor and method for recovering global history shift register and return address stack thereof

Country Status (1)

Country Link
TW (1) TWI368165B (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9436476B2 (en) 2013-03-15 2016-09-06 Soft Machines Inc. Method and apparatus for sorting elements in hardware structures
US9582322B2 (en) 2013-03-15 2017-02-28 Soft Machines Inc. Method and apparatus to avoid deadlock during instruction scheduling using dynamic port remapping
US9627038B2 (en) 2013-03-15 2017-04-18 Intel Corporation Multiport memory cell having improved density area
US9891915B2 (en) 2013-03-15 2018-02-13 Intel Corporation Method and apparatus to increase the speed of the load access and data return speed path using early lower address bits
US9946538B2 (en) 2014-05-12 2018-04-17 Intel Corporation Method and apparatus for providing hardware support for self-modifying code

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2478733B (en) * 2010-03-15 2013-08-14 Advanced Risc Mach Ltd Apparatus and method for handling exception events

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9436476B2 (en) 2013-03-15 2016-09-06 Soft Machines Inc. Method and apparatus for sorting elements in hardware structures
US9582322B2 (en) 2013-03-15 2017-02-28 Soft Machines Inc. Method and apparatus to avoid deadlock during instruction scheduling using dynamic port remapping
US9627038B2 (en) 2013-03-15 2017-04-18 Intel Corporation Multiport memory cell having improved density area
US9753734B2 (en) 2013-03-15 2017-09-05 Intel Corporation Method and apparatus for sorting elements in hardware structures
US9891915B2 (en) 2013-03-15 2018-02-13 Intel Corporation Method and apparatus to increase the speed of the load access and data return speed path using early lower address bits
US10180856B2 (en) 2013-03-15 2019-01-15 Intel Corporation Method and apparatus to avoid deadlock during instruction scheduling using dynamic port remapping
US10289419B2 (en) 2013-03-15 2019-05-14 Intel Corporation Method and apparatus for sorting elements in hardware structures
US9946538B2 (en) 2014-05-12 2018-04-17 Intel Corporation Method and apparatus for providing hardware support for self-modifying code

Also Published As

Publication number Publication date
TW201007559A (en) 2010-02-16

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