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案號 92135019 五、發明說明(1) 【發明所屬之技術領域 本發明提供一種記憶體儲存方法,、匕 像處理效率之記憶體儲存方法。尤指一種能夠提昇影 【先前技術】 隨著電子電路運算速度的提昇,命 曰、 理遂成為眾所矚目的議題。使用:大1運算之影音處 行動晝專家團體(MPEG' Moving 面在進 ^ 、 11 g Picture ExpertsCase No. 92135019 V. Description of the invention (1) [Technical field to which the invention belongs] The present invention provides a memory storage method and a memory storage method for dagger image processing efficiency. Especially the one that can improve the shadow. [Previous technology] With the increase of the speed of the electronic circuit, life and management have become the subject of much attention. Use: Video and Audio Department of Big 1 Operation Day Expert Group (MPEG 'Moving ^, 11 g Picture Experts
Group)規格或其它需要做動作補償( compensation)運真之影像處理過程中,經常要對一記 憶體(如動態隨機存取記憶體——DRAM、Dy:amiC access Memory)進行不同動作向量(m〇ti〇ri vector) 的區塊影像(b 1 o c k b a s e d i m a g e)之讀取。然而當該記 憶體一列(row)所對應的畫面寬度小於一高解析度晝面 (如前述之HDTV規格)之寬度時,上述影像處理過程中 就必須對該記憶體進行跨列讀取,以取得所需之動作向 量。例如一 DRAM每列具有2 5 6字元(word),其對應之畫 面寬度為1 0 2 4畫素,則欲於1 9 2 0 * 1 0 8 8畫素之解析度下進 行MPEG相關運算就會產生跨列讀取。而該等跨列讀取所 對應的RAS/ CAS等控制訊號所產生之延遲會降低影像處 1236849 — 案號92135019__年月日_______________________ 五、發明說明(2) 理效率。 【發明内容】 因此本發明之主要目的在於提供一種能夠提昇影像處理 效率之記憶體儲存方法,以解決上述問題。(Group) specifications or other image processing processes that require motion compensation, often need to perform different motion vectors (m) on a memory (such as dynamic random access memory-DRAM, Dy: amiC access Memory) 〇ti〇ri vector) block image (b 1 ockbased image) read. However, when the width of the picture corresponding to one row of the memory is smaller than the width of a high-resolution daylight (such as the HDTV specifications mentioned above), the memory must be read across the columns during the image processing process to Get the required action vector. For example, each row of a DRAM has 256 words, and the corresponding screen width is 10 2 4 pixels. You want to perform MPEG-related operations at a resolution of 1 2 0 * 1 0 8 8 pixels. A cross-column read will result. And the delay caused by the RAS / CAS and other control signals corresponding to these inter-column readings will reduce the image processing. 1236849 — Case No. 92135019__year month day_______________________ V. Description of the invention (2) The processing efficiency SUMMARY OF THE INVENTION Therefore, a main object of the present invention is to provide a memory storage method capable of improving image processing efficiency, so as to solve the above problems.
本發明提供一種記憶體儲存方法,用來提昇影像處理之 效率,該方法具有:於一記憶體之第一儲存區域儲存對 應於一畫面之第一晝面區域之複數個第一區塊;於該記 憶體之第二儲存區域儲存對應於該畫面之第二畫面區域 之複數個第二區塊;以及於該第一儲存區域儲存對應於 該第二畫面區域與該第一畫面區域相鄰的部分之至少一 第二區塊。 當該記憶體一列所對應的晝面寬度小於一高解析度晝面 之寬度時,不須對該記憶體進行跨列讀取,就得以取得 如動作補償(motion compensation)等運算所需之動作 向量(motion vector)。因此本發明之方法能夠提昇影 像處理效率。The invention provides a memory storage method for improving the efficiency of image processing. The method includes: storing a plurality of first blocks corresponding to a first diurnal area of a frame in a first storage area of a memory; and The second storage area of the memory stores a plurality of second blocks corresponding to the second screen area of the screen; and stores in the first storage area corresponding to the second screen area adjacent to the first screen area. Part of at least one second block. When the width of the diurnal plane corresponding to one row of the memory is smaller than the width of a high-resolution diurnal plane, it is not necessary to read the memory across the rows to obtain the actions required for operations such as motion compensation. Motion vector. Therefore, the method of the present invention can improve the efficiency of image processing.
【實施方式】 請同時參考圖一、圖二、與圖三,圖一為本發明能夠提[Embodiment] Please refer to FIG. 1, FIG. 2 and FIG. 3 at the same time. FIG.
第7頁 1236849 ————^^________魅 五、發明說明(3) 昇影像處理效率之a己丨思體儲存方法之流程示意圖,圖— 為圖一之方法之畫面之示意圖,圖三為圖一之方法^ 了 存區域之示意圖。本發明提供一種記憶體儲存方法,= 來提昇影像處理之效率。以下步驟之順序並非限定太 明之範圍,該方法說明如下。 非丨『疋本發 步驟1 0 :於一記憶體3 0 0 (於本實施例係為動態隨機存 記憶體一DRAM、Dynamic Random Access Memory)之第取 一儲存區域3 1 0儲存對應於一晝面2 〇 〇之第一畫面區域2工〇 之複數個第^一 塊(1,1)、(1,2)、......、(68 60); 步驟2 0 ··於記憶體3 0 0之第二儲存區域3 2 〇儲存對應於畫 面2 0 0之第二畫面區域2 2 0之複數個第二區塊〇, 6^)、 ( 1,6 2 )........ ( 6 8,1 2 0 );以及 ’ 步驟30:於第一儲存區域310儲存對應於該第二畫面區域 與該第一畫面區域相鄰的部分2 2 2之至少一第二^塊 (1,61)、 (2,61)、 ...... 、 (68,61)。 於本實施例中,該等區塊(即圖二與圖三所示之區塊Page 7 1236849 ———— ^^ ________ Charm 5. Description of the invention (3) A schematic diagram of the method of thinking body storage for improving image processing efficiency, Figure — is a schematic diagram of the method of Figure 1, Figure 3 Schematic diagram of the storage area for the method in Figure 1. The present invention provides a memory storage method to improve the efficiency of image processing. The order of the following steps is not limited to the scope of Taiming, and the method is explained as follows. Non- 『疋 This step 10: in a memory 3 0 0 (in this embodiment, it is a dynamic random access memory-DRAM, Dynamic Random Access Memory) the first fetch storage area 3 1 0 storage corresponds to a The first picture area of the day and night 2000 is a plurality of first pieces (1, 1), (1, 2), ..., (68 60); Step 2 0 ··· In memory The second storage area 3 2 0 of the body 3 0 stores a plurality of second blocks 0, 6 ^), (1, 6 2) corresponding to the second screen area 2 2 0 of the screen 200 .... .... (6 8, 1 2 0); and 'Step 30: storing at least one second of the portion 2 2 2 corresponding to the second picture area and the first picture area in the first storage area 310 ^ Blocks (1, 61), (2, 61), ..., (68, 61). In this embodiment, the blocks (that is, the blocks shown in Figs. 2 and 3)
(!,1)、(1,2)、......、(68,120))係為符合 MPEG (Moving Picture Experts Group --動晝專家團體)規 格之巨集區塊(macroblock),其中每一區塊係對應於 晝面2 0 0之16 (橫向)*16 (縱向)個畫素(pixel,未顯 示於相關圖示)。而本實施例之畫面2 〇 〇係為η D T V (High-Definition Television--高解像力電視)畫 面’其解析度係為1 92 0 (橫向)*1 088 (縱向)個畫素, 因此畫面2 0 0具有120 (橫向)*68 (縱向)個區塊。其中 1236849 年 案號 92135019 五、發明說明(4) 儲存於第一儲存區域310之第一區塊(丨,ι)、 .......(68,60)與第二區塊(1,61)、(2 61) ’ (6 8,6 1 )的排列順序係對應於晝面2 〇 〇之對應區塊"' AUoZ (68,61)的排列順序。另外儲存 存&域 3 2 0之苐二區塊........... . ......... ( 68 1 2ΓΠ 的排列順序係對應於晝面2 0 0之對應區塊(丨,6丨)、’ (1,62)........ (68, 120)的排列順序。 , 當讀取該巨集區塊(例如是丨6*丨6畫素)時,皆不合 生對該記憶體進行跨列的讀取,如此,就二^ 跨列讀取所對應的RAS/ CAS等控制訊號所產生之延遲等 21:畫面20 0之寬度(即120個區塊,對應於 旦/、 大於5己憶體3 0 0每一列(r〇w)之寬度L 0 (m區塊’對應於1 024個畫素)。而第一儲^區域 :u之寬度L 1 (即6丨個區塊,對應於9 7 6個畫素)與第二 $存區域3 2 0之寬度L2 (即6〇個區塊,對應於96〇個晝 θ )一係卞於,等於記憶體3 0 0每一列之寬度L 0。如圖三與 ,二所示,第一儲存區域310之寬度L1係為第一晝面區^ 1 〇之寬度(即6 0個區塊,對應於9 6 〇個畫素)加上該等 區塊(即區塊(1,1)、(1,2 )........ ( 68,1 2 0 ))中之一 =鬼(如區塊(1,61)、(2,61)、......、或(68,61))之寬 度(對應於1 6個晝素)。 §该記憶體一列所對應的畫面寬度小於一高解析度畫面 之寬度時’不須對該記憶體進行跨列讀取,就得以取得 1236849 — ______案號92135019___年月________a_____________修正 五、發明說明(5) 如動作補償(motion compensation)等運算所需之動作 向量(motion vector)。因此本發明之方法能夠提昇影 像處理效率。 以上所述僅為本發明之較佳實施例,凡依本發明申請專 利範圍所做之均等變化與修飾,皆應屬本發明專利的涵 蓋範圍。 1236849 修正 _____________案號 92135019_______年 月_Θ__ 圖式簡單說明 圖式之簡單說明 隐體儲存方法 圖一為本發明能夠提昇影像處理效率之記· 之流程不意圖。 圖二為圖一之方法之晝面之示意圖。 圖三為圖一之方法之儲存區域之不意圖。 圖式之符號說明 2 0 0 畫面 210, 220, 222 晝面區域 3 0 0 記憶體 310,320儲存區域 (1,1 )、( 1,2 )........ ( 68, 1 2 0 )區塊 L0, LI, L2 寬度(!, 1), (1, 2), ..., (68, 120)) are macroblocks that conform to the MPEG (Moving Picture Experts Group) specifications. Each of these blocks corresponds to 16 (horizontal) * 16 (vertical) pixels (pixels, not shown in the relevant illustration) on the daytime surface. The picture 200 in this embodiment is a η DTV (High-Definition Television) picture, and its resolution is 1 92 0 (horizontal) * 1 088 (vertical) pixels, so picture 2 0 0 has 120 (horizontal) * 68 (vertical) blocks. Among them 1236849 case number 92135019 V. Description of the invention (4) The first block (丨, ι), ... (68, 60) and the second block (1) stored in the first storage area 310 (61), (2 61) '(6 8, 6 1) The arrangement order corresponds to the arrangement order of the corresponding block "' AUoZ (68, 61) on the daytime surface 2000. In addition, the second block of the storage & domain 3 2 0 .................... (68 1 2ΓΠ is arranged in the order corresponding to the day surface 2 0 0 The order of the corresponding blocks (丨, 6 丨), '(1, 62) ..... (68, 120). When reading the macro block (for example, 丨 6 * 丨6 pixels), it is unsuitable to read the memory across the columns. In this way, the delay caused by the control signals such as RAS / CAS corresponding to the two-column reading is 21: the width of the screen 20 0 (That is, 120 blocks, corresponding to the width L 0 of each column (r0w) greater than 5 times memory 300 (m block 'corresponds to 1 024 pixels). And the first storage ^ Area: the width L 1 of u (that is, 6 blocks, corresponding to 976 pixels) and the width L 2 of the second $ storage area 3 2 0 (that is, 60 blocks, corresponding to 9 60 days) θ) is equal to the width L 0 of each column of the memory 300. As shown in FIGS. 3 and 2, the width L1 of the first storage area 310 is the width of the first diurnal area ^ 1 〇 ( That is, 60 blocks, corresponding to 960 pixels, plus these blocks (that is, blocks (1, 1), (1,2)) ..... (68,1 2 0) One of the =) the width of the ghost (such as block (1, 61), (2, 61), ..., or (68, 61)) (corresponding to 16 day elements). §This When the width of the picture corresponding to one column of memory is less than the width of a high-resolution picture, you do not need to read the memory across columns to obtain 1236849 — ______ Case No. 92135019 Explanation (5) Motion vectors required for operations such as motion compensation. Therefore, the method of the present invention can improve the efficiency of image processing. The above is only a preferred embodiment of the present invention. The equal changes and modifications made in the scope of the patent application for invention shall all be covered by the invention patent. 1236849 Amendment _____________ Case No. 92135019 It is not intended that the process of the present invention can improve the efficiency of image processing. Figure 2 is a schematic diagram of the day surface of the method of Figure 1. Figure 3 is a schematic diagram of the storage area of the method of Figure 1. Explanation of symbols in the drawing 0 Surface 210, 220, 222 Daytime area 3 0 0 Memory 310, 320 Storage area (1, 1), (1,2) ..... (68, 1 2 0) Block L0, LI , L2 width