TW583666B - A method of writing to a scalable magnetoresistance random access memory element - Google Patents
A method of writing to a scalable magnetoresistance random access memory element Download PDFInfo
- Publication number
- TW583666B TW583666B TW091123192A TW91123192A TW583666B TW 583666 B TW583666 B TW 583666B TW 091123192 A TW091123192 A TW 091123192A TW 91123192 A TW91123192 A TW 91123192A TW 583666 B TW583666 B TW 583666B
- Authority
- TW
- Taiwan
- Prior art keywords
- magnetoresistive memory
- memory device
- magnetic
- current
- converting
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 56
- 230000005291 magnetic effect Effects 0.000 claims abstract description 181
- 239000013598 vector Substances 0.000 claims abstract description 82
- 230000005294 ferromagnetic effect Effects 0.000 claims abstract description 50
- 239000004020 conductor Substances 0.000 claims description 24
- 230000004888 barrier function Effects 0.000 claims description 22
- 230000008878 coupling Effects 0.000 claims description 21
- 238000010168 coupling process Methods 0.000 claims description 21
- 238000005859 coupling reaction Methods 0.000 claims description 21
- 230000005641 tunneling Effects 0.000 claims description 16
- 239000000463 material Substances 0.000 claims description 9
- 238000006243 chemical reaction Methods 0.000 claims description 8
- 239000002131 composite material Substances 0.000 claims description 7
- 230000007704 transition Effects 0.000 claims description 7
- 230000001960 triggered effect Effects 0.000 claims description 7
- 239000003302 ferromagnetic material Substances 0.000 claims description 6
- 229910052742 iron Inorganic materials 0.000 claims description 2
- 229910052748 manganese Inorganic materials 0.000 claims description 2
- 229910052759 nickel Inorganic materials 0.000 claims description 2
- 229910052702 rhenium Inorganic materials 0.000 claims description 2
- 229910052703 rhodium Inorganic materials 0.000 claims description 2
- 229910052804 chromium Inorganic materials 0.000 claims 1
- 150000001875 compounds Chemical class 0.000 claims 1
- 239000000696 magnetic material Substances 0.000 claims 1
- 229910052762 osmium Inorganic materials 0.000 claims 1
- 229910052707 ruthenium Inorganic materials 0.000 claims 1
- 230000008859 change Effects 0.000 abstract description 5
- 230000004907 flux Effects 0.000 abstract description 2
- 239000010410 layer Substances 0.000 description 62
- 238000001208 nuclear magnetic resonance pulse sequence Methods 0.000 description 14
- 125000006850 spacer group Chemical group 0.000 description 10
- 238000010586 diagram Methods 0.000 description 9
- 230000008901 benefit Effects 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- 230000006399 behavior Effects 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 230000005415 magnetization Effects 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 229910052797 bismuth Inorganic materials 0.000 description 2
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 230000014759 maintenance of location Effects 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- 230000003068 static effect Effects 0.000 description 2
- 206010044565 Tremor Diseases 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000002860 competitive effect Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000001568 sexual effect Effects 0.000 description 1
- 238000002560 therapeutic procedure Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/14—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements
- G11C11/15—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements using multiple magnetic layers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/161—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1675—Writing or programming circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Mram Or Spin Memory Techniques (AREA)
- Semiconductor Memories (AREA)
- Hall/Mr Elements (AREA)
Description
(-1) (-1)583666 玖、發明說明 (發明說明應敘明··發明所屬之技術領域、先前技術 '内容、實施方式及圖式簡單說明) 該案已於2001年10月16曰於美國申請,申請號為 09/978859 。 發明領域 本發明係關於半導體記憶體裝置。 具體而言,本發明係關於使用一磁場的半導體隨機存取 記憶體裝置。 發明背景 非揮發性記憶體裝置在電子系統是一極其重要的組件 。快閃記憶體是如今使用的主要非揮發性記憶體裝置。典 型的非揮發性記憶體裝置使用一懸浮氧化物層中捕獲的 電荷來儲存資訊。快閃記憶體的缺點包括高電壓要求及缓 慢的程式和抹除時間。此外,快閃記憶體的寫入持久性差 ,在記憶體故障前為1〇4至1〇ό個週期。另外,為維持合理的 資料保持,閘極氧化物的縮放受限於電子遇到的穿隧位障 。因此,快閃記憶體受限於其可縮放的尺寸。 為克服這些缺點,人們正在評估磁性記憶體裝置。一種 這樣的裝置是磁阻隨機存取記憶體(以下稱為「MRAM」) 。但要應用於商業,MRAM必須具有可比目前記憶體科技 的記憶體密度、適應未來世代的可縮放性、低電壓下操作 、低電源消耗以及具有競爭力的讀/寫速度。 非揮發性記憶體狀態的穩定性、讀/寫週期的可重複性 以及記憶體元件對元件轉換場的一致性是MRAM裝置設計 特性三個最重要的方面。MRAM中的記憶體狀態不是由電 583666 (〇) 發明戣铒續頁 源維持’而是由磁矩向量的方向%垃 -.. 準持。儲存資料係藉由施 加磁場,並在MRAM裝置中導致一磁抖铋社j 域〖生材枓磁化為兩種可 能記憶體狀態的任何一種來實現。喚 兴u貝枓係错由感測 MRAM裝置中兩種狀態之間的電阻差來實現。建立用來寫 入的磁場係藉由傳遞電流穿過該磁性結構外部的帶線或 穿過該磁性結構本身來實現。 MRAM裝置的橫向尺寸減小時,會發生三個問題。首先 ’轉換場增加為某一形狀及膜厚度,這需要一更大磁場來 進行轉換。其次,總轉換量減少,使得反轉的能量障礙減 小。該能量障礙指將磁矩向量從一種狀態轉換為另一種狀 態所需能量的數量。能量障礙決定MR AM裝置的資料保持 及錯誤率,如果障礙太小,會因為熱波動(超磁)發生無意 的反轉。小能篁障礙的一主要問題就是在一陣列中選擇性 地轉換一 MRAM裝置變得極其困難。可選擇性允許在轉換 時不會無意間轉換其它MRAM裝置。最後,由於轉換場係 由形狀產生,當MR AM裝置尺寸減小時,轉換場對形狀的 變化變得更敏感。由於在更小尺寸時微影#刻縮放變得更 困難,MR AM裝置要維持緊密的轉換分配相當困難。 因此,修正以上及其它先前技藝固有的缺點將是非常有 利的。 因此,本發明的一個目標係提供一新改進之方法用來寫 人礤阻隨機存取記憶體裝置。 本發明的一個目標係提供一新改進之方法用來寫入磁 随隨機存取記憶體裝置,該方法具有高度可選擇性。 583666 (i) 發明說明續頁 本發明的另一個目標係提供一新改進之方法用來寫入 磁阻隨機存取記憶體裝置,該方法具有一改進的錯誤率。 本發明的另一個目標係提供一新改進之方法用來寫入 磁阻隨機存取記憶體裝置,該方法具有一更少依靠形狀的 轉換場。 發明概要 為達到以上說明的目標、益處及其它,本發明揭示一種 寫入可縮放磁阻記憶體陣列的方法。該記憶體陣列包括若 干可縮放磁阻記憶體裝置。為簡單起見,我們著眼於如何 將該寫入方法應用於單個MR AM裝置,但應明白,該寫入 方法可應用於任何數量的MR AM裝置。 用來說明該寫入方法的MRAM裝置包括一字元線及一 數位線,它們位於臨近一磁阻記憶體元件處。該磁阻記憶 體元件包括臨近該數位線的一固定磁區。一穿隧位障位於 該固定磁區上。而一自由磁區位於該穿隧位障上並臨近該 字元線。在較佳具體實施例中,該固定磁區具有一合成磁 矩向量,其固定在一較佳方向。此外,在較佳具體實施例 中,該自由磁區包括合成非強磁性(以下稱為SAF)層材料 。該合成非強磁性層材料包括一強磁性材料的N個非強 磁性耦合層,其中N為大於或等於二的一整數。該N層定 義一磁性轉換量,其可藉由改變N進行調整。在較佳具體 實施例中,該N強磁性層的非強磁性係藉由在每個臨近強 磁性層之間夾一非強磁性耦合間隔層進行耦合。此外,每 個N層具有一調整力矩以提供一最佳化寫入模式。 583666 (2) 在較佳具體實施例中,N等於二,使得該合成非強磁性 層材料為一強磁性層/非強磁性耦合間隔層/強磁性層的 一個三層結構。該三層結構中的兩個強磁性層各自具有磁 矩向量M i及Μ 2,並且磁矩向量通常藉由非強磁性搞合間 隔層的耦合定位為反平行。非強磁性耦合也可藉由MR A Μ 結構中的層的靜磁場產生。因此,間隔層除了消除兩個磁 層之間的強磁性耦合外,不必提供任何附加的非強磁性耦 合。關於用來說明該寫入方法的MR AM裝置的更多資訊可 在一共同待審美國專利申請案中找到,其標題為「改進可 縮放性的磁阻隨機存取記憶體」(Magnetoresistance Random Access Memory for Improved Scalability),同此日期歸樓, 並以提及方式併入本文中。 MRAM裝置中兩個強磁性層中的磁矩向量可以為不同 厚度或材料,以提供一合成磁矩向量,其由ΔΜ =(M2-M|) 及一子層力矩摩擦平衡率設定,Mbr = 。三層
Mtotal 結構的合成磁矩向量可在一施加磁場自由旋轉。在零場, 該合成磁矩向量在一個方向穩定,由磁性各向異性決定, 該方向相對於固定參考層的合成磁矩向量平行或反平行 。應明白,術.語「合成磁矩向量」只是用於本說明之目的 及完全平衡力矩的情況,合成磁矩向量在無磁場時可為零 。如下所述,只有臨近穿隧位障的子層磁矩向量決定記憶 體的狀態。 穿過MR AM裝置的電流依靠於穿隧磁阻,其由直接臨近 穿隧位障的自由層及固定層的磁矩向量的相對方位控制 583666 (3) 發喊藏發讀頁 。如果磁 壓偏移將 。如果磁 施加電壓 「0」。應 該範例中 中,資料4 量定位為 向的任一 寫入可 三層結構 語「接近 0^K|<0.1 ,其係藉 於施加場 於施加場 ,引起總 一般而 兩種截然 一觸發寫 時序脈衝 小的選擇 每種寫 需要決定 矩向量平行,則MR AM裝置電阻較低,並且一電 引起一更大電流穿過裝置。該狀態定義為「1」 矩向量反平行,則MR AM裝置電阻較高,並且一 偏移將引起一更小電流穿過裝置。該狀態定義為 明白這些定義是任意的,並且可以反過來,但在 的使用是為了說明之目的。這樣,在磁阻記憶體 绪存係藉由施加磁場導致MRAM裝置中的磁矩向 相對於固定參考層中磁矩向量平行及反平行方 種來實現。 縮放MRAM裝置的方法依賴於一接近平衡SAF 的「旋轉-翻轉」(spin-flop)現象。這裏,定義術 平衡」指子層力矩摩擦平衡率的大小係在範圍 。該旋轉-翻轉現象降低一施加場中的總磁能量 由旋轉強磁性層的磁矩向量,使得它們標稱垂直 方向但仍主要是相互反平行。旋轉、或翻轉與處 方向的每個強磁性磁矩向量的一小偏轉相結合 磁能量的減少。 言,使用翻轉現象及一時序脈衝序列,可以使用 不同的模式寫入MR AM裝置:一直接寫入模式或 入模式。這些模式的實現係使用將要說明的相同 序列,但在施加磁場的磁性子層力矩及極性及大 上有所不同。 入方法都有其益處。例如,使用直接寫入模式不 MRAM的初始狀態,因為只有在寫入狀態與儲存
-10- 583666 (4) 發明說明續頁 狀態不同時才轉換狀態。儘管直接寫入方法不需要在寫入 順序開始前知道MRAM裝置的狀態,它需要依據所要求的 狀態改變子元線及數位線兩者的極彳生。 使用觸發寫入方法需要在寫入前決定“化八“裝置的初 始狀態,因為每次相同極性脈衝序列從字元線及數位線產 生時,狀態都會轉換。這樣’觸發寫入模式係藉由讀取儲 存記憶體狀態,並將該狀態與要宜> 女舄入的新狀態進行比較來 運作的。比較後,只有儲存狀態與 >、新狀恶不同時,才寫入 MRAM裝置。 MRAM裝置的構造使得磁性久 向異性軸相對於字元線 及數位線的理想角度為45。。因,士 u此,在一時間tQ,磁矩向 量A及A定位的一較佳方向為相 α相對於字元線及數位線方 向的4 5 °角。作為該寫入方法的_ 個乾例,要使用一直接 或觸發寫入來轉換MRAM裝置的# < 的狀恕,會使用以下電流脈 衝序列。在一時間ti,字元電流择 9 σ,而%及m2依據該字 元電流的方向開始以順時鐘或逆睡拉 吁知方向旋轉,由於旋轉 -翻轉效果使付自身與場方向標稱希* · 直對準。在一時間h ,數位電流接通。數位電流在某— 、 万向流動,使得Μ1及 Μ。進一步在相同方向旋轉,而該斿絲丄 方疋轉由數位線磁場引起 〇在該時點,子兀線電流及數位飨φ + ^ ^ . 線電流都接通了 ,而& 及M2標稱垂直於淨磁場方向,其A知1 ^馬相對於電户结 。 當只有一個電流接通時,磁場會 歇、’·、 I辱致化及M標摇對举 於與字元線或數位線平行的一方向 了解這一點4戸舌要。 但兩個電流都接通時’ M i及Μ 2將;(;》# ·· 币稱垂直對準於該字元 583666 (5) 線及數位線呈4 5 °角。 在一時間t3,字元線電流被切斷,使得M i及M2只是由於 數位線磁場而旋轉。此時,M i及M2 —般已經旋轉過了它 們的硬軸不穩定點。在一時間t4,數位線電流被切斷,使 得M i及M2順著較佳各向異性轴對準。此時,M i及M2已經 旋轉180°,而MR AM裝置已經轉換。這樣,藉著有順序地 接通及切斷字元電流及數位電流,MR AM裝置的及M2 可以旋轉180°從而轉換該裝置的狀態。 圖式簡單說明 以下對本發明的一較佳具體實施例的詳細說明連同圖 示,將使得本發明的前述及進一步更具體目標及益處對於 熟悉本技藝者非常明顯: 圖1是一磁阻隨機存取記憶體裝置的簡單斷面圖; 圖2是一帶有字元線及數位線的磁阻隨機存取記憶體裝 置的簡單平面圖; 圖3是一圖示,用來說明在磁阻隨機存取記憶體裝置中 產生直接或觸發寫入模式的磁場振幅組合的一模擬; 圖4是一圖示,用來說明字元電流及數位電流都接通時 的時序圖, 圖5是一圖示,用來說明在觸發寫入模式下,將「1」寫 到「0」時,一磁阻隨機存取記憶體裝置的磁矩向量的旋 轉; 圖6是一圖示,用來說明在觸發寫入模式下,將「0」寫 到「1」時,一磁阻隨機存取記憶體裝置的磁矩向量的旋 -12- 583666 (6) 發明說明續頁 轉; 圖7是一圖示,用來說明在直接寫入模式下,將「1」寫 到「0」時,一磁阻隨機存取記憶體裝置的磁矩向量的旋 轉; 圖8是一圖示,用來說明在直接寫入模式下,將「0」寫 到已經為「0」的狀態時,一磁阻隨機存取記憶體裝置的 磁矩向量的旋轉; 圖9是一圖示,用來說明只有數位電流接通時字元電流 及數位電流的時序圖;及 圖1 0是一圖示,用來說明只有數位電流接通時,一磁阻 隨機存取記憶體裝置的磁矩向量的旋轉。 較佳具體實施例詳細說明 現在請看圖1,其說明依據本發明的一 MR AM陣列3的簡 化斷面圖。在該說明中,只顯示一單一磁阻記憶體裝置1 0 ,但應明白MR AM陣列3係由若干MR AM裝置10組成,而 我們只顯示一個這樣的裝置是為了簡化對該寫入方法的 說明。 MRAM裝置10夾在一字元線20及一數位線30之間。字元線 20及數位線30包含導電材料使得電流可以從中通過。在該 說明中,字元線20位於MRAM裝置10的頂部而數位線30位於 MRAM裝置10的底部,並且其方向為相對於字元線20的90° 角(請看圖2)。 MRAM裝置10包括一第一磁區15、一穿隧位障16及一第二 磁區17,其中穿隧七l障16夾在第一磁區15與第二磁區17之 -13- (7) (7)583666 間。在較佳具體實施例中,磁區15包括一二 —層結構18,复 具有夾在兩個強磁性層45與55之間的一非強磁 ,、
私乙_ 性轉合間P 層。非強磁性耦合間隔層65具有一厚度86, ⑺ 而強磁柯思 45及55各自具有厚度41及51。此外,磁區17具 —_ 9 、 二層結構 19’其具有夾在兩個強磁性層46與56之間的_非^ 邪強磁性耦 合間隔層66。非強磁性耦合間隔層66具有一 予哎87,而強 磁性層46及56各自具有厚度42及52。 _ 一般而言,非強磁性耦合間隔層65及66包括 〜件Ru、Qs 、Re、Cl:、Rh、Cu的至少一種或其組合。此夕卜, 強螆性層45 、55、46及56包括元件Ni、Fe、Mn、Co的至少一種弋廿 !次具組合。 而且應該明白,磁區15及17可包括不同於三μ处扭 3、、、°構的合成 非強磁性層材料結構,而在該具體實施例中使用二 ⑺二層結構 只是為了說明之目的。例如,一種這樣的合成非 人外5¾磁性居 材料結構可包括一五層堆豎’其為一強磁性;/ 增/非強磁性 搞合間隔層/強磁性層/非強磁性輕合間隔層/強 域性層的 結構。 強磁性層45及55各自具有一磁矩向量57及53,苴一 '、稭由非強 磁性耦合間隔層65的耦合通常保,持反平行。此 、 ^ I ,區 i5 具有一合成磁矩向量40而磁區17具有一合成磁铝 祀向量50。 合成磁矩向量40及50順著一各向異性易磁化轴 &位於一方 向,其與字元線20與數位線30呈一角度,較佳主 & 4 4 5 Q ' (請看 圖2)。此外,磁區15是一自由磁區,意味著合成磁矩向日
40在一施加磁場存在的情況下可自由旋轉。磁F 匕口是一針 強磁性區,意味著合成磁矩向量50在一適度施加 θ 域場存在 -14- 583666 的情況 雖然 磁性耦 性耦合 減小到 耦合。 在較 為一非 明一圓 置ίο為ϋ ,而且 尺寸更 如正方 為了簡 此外 30 、 55 、 半導體 蝕刻等 供一磁 向異性 異性軸 角,現 現在 單平面 (8) 下不能自由旋轉,而用作參考層。 在每個三層結構1 8的兩個強磁性層之間顯示非強 合層,但應明白強磁性層可以藉由其它方式非強磁 ’例如靜磁場或其它形態。例如,一單元的縱橫比 五或更小時’由於靜磁通量關閉,強磁性層反平行 佳具體實施例中,MRAM裝置1〇具有三層結構18,其 圓形平面’長/免*比的範圍在1到5之間。但我們說 形平面(請看圖2)。在較佳具體實施例中,“RAM裝 ϋ形’以將形狀各向異性對轉換場的影響減到最小 還因為使用微影钱刻處理使縮放裝置至更小橫向 容易。但應明白,MRAM裝置1〇可以有其它形狀,例 形、橢圓形、長方形或菱形’但在此顯示為圓形是 化及改進之性能。 ,在MRAM陣列3的構成過程中,每個隨後的層(即 65等)依沉積或形成,而每個MRAM裝置10可以任何 工業所知的技術,由選擇性沉積、微影蝕刻處理、 來定義。在至少強磁性層45及55的沉積過程中,提 場來為這對強磁性層設置一較佳易磁化轴(感應各 )。該提供的磁場建立磁矩向量53及57的一較佳各向 。該較佳轴選擇在字元線20與數位線30之間呈45。 在論述如下。 請看圖2,其說明依據本發明的一 MRAM陣列3的簡 圖。為簡化對MRAM裝置1〇的說明,所有方向將參考 -15· (9) (9)583666 明說:吸續頁 鉍:、: 顯示的X及厂座彳示糸統100以及一順時鐘旋轉方向94及 逆% |里旋轉方向9 6。為進_步簡化說明,再次假設N等 於二,使得MRAM裝置1〇包括一三層結構,其在具有磁矩向 量53及57及合成磁矩向量4〇的區域。中。此外,只說明區 域15的磁矩向量,因為只有它們將被轉換。 為說明寫入方法如何運作,假設磁矩向量53及57的一較 佳各向異性軸的方向為相對於負X及負丫方向的4 5。角,及 相對於正X及正y方向的4 5。角。作為一範例,圖2顯示磁矩 向量53的方向為相對於負X及負y方向的45。角。由於磁矩 向量57—般定位為與磁矩向量53反平行,它的方向為相對 於正X及正y方向的45。角。該初始方位將用來顯示寫入方 法的範例,現在論述如下。 在較佳具體實施例中,一字元電流60定義為在一正X方 向流動時為正,而一數位電流7 0定義為在一正y方向流動 時為正。字元線20及數位線30的目的是在MRAM裝置10内建 立一磁場。一正字元電流60將引起一周圍字元磁場Hw 80 ’而一正數位電流70將引起一周圍數位磁場HD 90。由於 字元線20在MRAM裝置10的上面,在元件平面内,對於一正 字元電流60,Hw 80將以正y方向施加到MRAM裝置10。同樣 ’由於數位線30在MRAM裝置1〇的下面,·在元件平面内,對 於一正數位電流70,HD 90將以正x方向施加到MRAM裝置10 。應明白對正負電流的定義是任意的,在此的定義是為了 說明之目的。反轉電流的效果係改變在MRAM裝置1 〇内引起 的磁場的方向。熟悉本技藝者應熟知一電流引起磁場的行 -16- 583666 (ίο) 為,在此就不再作詳細描述。 現在請看圖3,其說明一 SAF三層結構的模擬轉換行為 。該模擬由兩個單一域磁層組成,它們接近於與一内在各 向異性相同的力矩(一接近平衡SAF),為非強磁性耦合, 而其磁動力學由Landau_Lifshitz方程式說明。X軸是批如 中的字兀線磁場振幅,而y軸是〇ersteds中的數位線磁場振 幅。如圖4所示,磁場施加在一脈衝序列1〇〇中,其中脈衝 序列100包括字元電流60及數位電流7〇作為時間的函數。 圖3中說明三個區的操作。區92中沒有轉換。對於區域 95中的MRAM操作,直接寫入方法有效。使用直接寫入方 法時’不需要決定MRAM的初始狀態,因為只有在寫入狀 悲與儲存狀態不同時才轉換狀態。寫入狀態的選擇由字元 線20及數位線3〇中的電流方向決定。例如,如果要寫入 「1」’則兩線中電流的方向都為正。如果r 1」已經儲存 在元件中,而又寫入一個「1」,則MRAM裝置的最後狀態 繼續為「1」。此外,如果儲存的是「〇」,而「1」以正電 流寫入,則MRAM裝置的最後狀態為「1」。使用字元線及 數饭線中的負電流寫入「〇」可獲得類似結果。因此,可 設計程式以使用電流脈衝的適當極性將狀態設置為想要 的「1」或「0」,而不論其初始狀態。貫穿本揭示,區域 95中的操作將定義為「直接寫入模式」。 斜於區域97中的MRAM操作,觸發寫入方法有效。使用 觸發寫入方法時,在寫入前需要決定MRAM裝置的初始狀 ® ’因為每次寫入MR AM裝置時狀態都會轉換,不論電流 -17· (ii) (ii)583666 發明說畦續頁 的方向’只要對字元線2〇及數位線30選擇相同極性的電流 脈衝。例如,如果初始儲存的是「1」,則在一正電流脈衝 序列流過字元線及數位線後,裝置的狀態轉換為「〇」。在 儲存的「0」狀態上,重複正電流脈衝序列使其回到「i 」。這樣,為了能夠將記憶體元件寫入想要的狀態,必須 首先碩取MR AM裝置1〇的初始狀態,並與要寫入的狀態相 比較。讀取及比較可能需要附加的邏輯電路,包括儲存資 Λ的緩衝器及比較記憶體狀態的比較器。只有在儲存狀態 與要寫入狀態不同時,才寫入MRAM裝置1〇。該方法的益處 之一就是降低消耗的電源,因為只轉換不同的位元。使用 觸發寫入方法的另一個益處就是只需要單極電壓,因而可 使用更小的N通道電晶體來驅動mrAM裝置。貫穿本揭示 ,區域97中的操作將定義為「觸發寫入模式」。 兩種寫入方法都包括供應字元線20及數•位線30中的電 流,使得磁矩向量53及57可以定位為如前文所述的兩個較 佳方向之一。為了充分說明兩種轉換模式,現在給定具體 範例以說明磁矩向量53、57及40的時間發展。 現在請看圖5,其說明以觸發寫入模式,使用脈衝序列 〇將1」寫到「0」。在該說明的時間to,磁矩向量53及57 疋位為圖2所示的較佳方向。該方位將定義為「1」。 在時間h,一正字元電流60接通,其引起Hw 8〇定向在 y方向。正Hw 80的效果是導致接近平衡非對準mraM三 曰的、翻轉」,並且其定位變為與施加場方向大約呈9 0。 強磁性層45與55之間的有限非強磁性交換互動將使磁矩 -18- 583666 π2) 向量53及57現在向磁場方向偏轉一小角度,而合成磁矩向 量40將對向磁矩向量53及57之間的角度並且將與Hw 80對準 。因此,磁矩向量53以順時鐘方向94旋轉。由於合成磁矩 向量40是磁矩向量53及57的向量相加,磁矩向量57也以順 時鐘方向94旋轉。 在一時間t2,正數位電流7〇接通,引起正HD 90。從而合 成磁矩向量40同時被Hw 80定向在正Υ方向,被HD 90定向在 正X方向,其效果為導致有效磁矩向量40進一步以順時鐘 方向94旋轉,直到它大致定位於正X及正y方向之間的45。 角。因此,磁矩向量53及57也將進一步以順時鐘方向94旋 轉。 在一時間t3,字元電流60被切斷,使得現在只有HD 90指 引合成磁矩向量40的方向,讀向量現在將定位於正X方向 。磁矩向量53及57現在都將大致定向在某角度,其已經過 它們的各向異性硬軸不穩定點。 在一時間t4,數位電流70被切斷,使得磁場力不作用在 合成磁矩向量40上。從而磁矩向量53及57將定位於它們的 最接近較佳方向,以將各向異性能量減到最少。在本例中 ,磁矩向量53的較佳方向為相對於正X及正y方向的45。 角。該較佳方向也是與磁矩向量53在時間tG時的初始方向 呈180。’並定義為「〇」。這樣,MR AM裝置10轉換到「〇」 。應明白,也可藉由使用字元線2 0及數位線3 0中的負電流 ,使得磁矩向量53、57及40以逆時鐘方向96旋轉,從而轉 換MR AM裝置1〇,但此處的不同顯示是為了說明之目的。 583666 (13) 發明說鸪續頁 現在請看圖6,其說明以觸發寫入模式,使用脈衝序列 1 0 0將「0」寫到「1」。圖示說明的是前述的每個時間10 、q、t2、t3及t4的磁矩向量53及57以及合成磁矩向量40, 其顯示使用相同電路及磁場方向也能將MR AM裝置10的 狀態從「0」轉換到「1」。因此,使用觸發寫入模式寫入 MR AM裝置10的狀態,其對應於圖3中的區域97。
直接寫入模式中,假設磁矩向量53比磁矩向量57大,從 而磁矩向量40指向與磁矩向量53相同的方向,但在零場的 大小更小。該不平衡力矩提供雙極能量,其趨向於將總力 矩與施加場對準,並打破接近平衡SAF的對稱。因此,對 某一極性電流,轉換只能在一個方向發生。
現在請看圖7,其說明以直接寫入模式,使用脈衝序列 100將「1」寫到「0」的一個範例。再一次,矩狀態係一 初始的「1」,磁矩向量53相對於負X及負y方向呈45°,而磁 矩向量57相對於正X及正y方向呈45°。依據上述的正字元電 流60及正數位電流70的脈衝序列,寫入的方式與前述的觸 發寫入模式相似。請注意矩在一時間t i再次「翻轉」,但 結果角度由於不平衡力矩及各向異性從90°傾斜。時間t4 以後,合成磁矩向量40定位於理想的相對於正X及正y方向 的45°角,MR AM裝置10轉換至「0」狀態。將「0」寫到 「1」時獲得類似結果,但現在係使用負字元電流60及負 數位電流7 0。 現在請看圖8,其說明使用直接寫入方式寫入的一個範 例,其中新狀態與已經儲存的狀態相同。在該範例中, -20- 583666 (14) 杳明說明绫頁::
「0」已經儲存在MR AM裝置10中,而現在重複脈衝序列 100來儲存一個「0」。磁矩向量53及57嘗試在一時間q「翻 轉」,但由於不平衡磁矩必須逆著施加磁場運作,旋轉因 而減少。因此,要旋轉出該反轉狀態有一附加的能量障礙 。在時間t2,支配力矩53幾乎與正X軸對準,而相對於其 初始各向異性方向小於45°。在一時間t; ’磁場的方向為順 著正X軸。並非進一步順時鐘旋轉,系統現在藉由改變'相 對於施加場的SAF力矩對稱來降低系統能量。被動力矩5 7 穿過X軸,並且隨著支配力矩53回到接近其原方向,系統 穩走下來。因此,在一時間14磁場被移去時,MRAM裝置 10中儲存的狀態將保持為「0」。該順序說明了圖3中區域 95顯示的直接寫入模式機制。因此,.在該約定中,寫入 「〇」需要在字元線60及數位線70中都是正電流,相反, 寫入「1」需要在字元線6 0及數位線70中都是負電流。
如果施加更大的場,最終與翻轉及剪裁相關的能量減少 超過附加的能量障礙,該能量障礙由防止一觸發事件的不 平衡力矩的雙極能量建立。此時,將發生一觸發f件,該 轉換由區域9 7說明。 可擴充直接寫入模式所應用的區域95,即觸發模式區域 97可以移至更高磁場,如果時間13與t4相等或使其盡可能 接近相等。在本例中,字元電流6 0接通時,磁場方向從相 對於位元各向異性軸的45°開始,在數位電流70接通時,接 著移至與該位元各向異性軸平行。該範例與典型的磁場應 / 用順序相似。但現在字元電流60及數位電流70實質上同時 -21 - 583666 W▲二、 ,-1 (15) 釁明說興療頁 切斷,使得磁場方向不再進一步旋轉。因此,施加場應該 足夠大,使得在字元電流及數位電流接通時’合成磁 矩向量40已經移動通過了匕的硬轴不穩疋點。現在較少可 能發生觸發寫入模式事件’因為磁場方向現在只旋轉4 5。 ,而不是先前的90。。具有實質上同時下降時間13及t4的一 個益處就是現在對於場上升時間11及t2的順序沒有附加限 制。這樣,磁場可以任何順序接通或也可以實質上同時接 通。 前述的寫入方法具有高度選擇性,因為只有在時間t2 及時間t3之間字元電流60及數位電流70都接通時,MRAM 裝置才轉換狀態。圖9及圖10說明了該特徵。圖9說明當字 元電流60未接通而數位電流70接通時的脈衝序列1〇〇。圖1〇 說明MRAM裝置10狀態的對應行為。在一時間tQ,磁矩向 量53及57以及合成磁矩向量40如圖2說明的方式定位。在脈 衝序列100,數位電流70在一時間q接通。在這期間,HD 90 將使得合成磁矩向量40定向在正X方向。 由於字元電流60從未接通,合成磁矩向量53及57從未旋 轉通過它們的各向異性硬軸不穩定點。其結果為,當數位 電流70在一時間切斷時,磁矩向量53及57將重新定位自身 處於最接近較佳方向,其在本例中為時間%的初始方向。 因此’ MRAM裝置10的狀態未轉換。應明白,如果字元電流 60在上述相似時間接通而數位電流7〇未接通,將會發生相 同結果。該特徵確保在一陣列中只轉換一個mram裝置, 而其它裝置將保持其初始狀態。其結果為避免了無意的轉 -22- 583666 (16) 換,並使位元錯誤率最小化。 本文選擇的具體實施例是為了說明之目的,熟悉本技藝 者將很容易想到對這些具體實施例的各種變更及修改。只 要這些修改及變動不離開本發明的精神,它們將包括在本 發明範圍内,其只由對以下申請專利範圍的合理解釋進行 評價。 已經以如此清晰及簡明的方式充分說明了本發明,從而 使得熟悉本技藝者能夠理解及實踐相同的内容。
-23-
Claims (1)
- 583666 拾、申請專利範圍 1. 一種用於轉換一磁阻記憶體裝置之方法,包括以下步驟: 提供臨近一第一導體與一第二導體的一磁阻記憶體 元件,其中該磁阻記憶體元件包括一第一磁區與一第二 ‘ 磁區,由一穿隧位障分開,該第一及第二磁區的至少其 一包括N個強磁性材料層,其係非強磁性耦合,其中N ^ 為至少等於二的一整數,並且其中每層具有一調節磁矩 以提供一寫入模式,而且每個該第一及第二磁區具有一 · 臨近該穿隧位障的磁矩向量,其在一時間t〇定位於一較 佳方向; 在一時間t i接通穿過該第一導體的一第一電流; 在一時間12接通穿過該第二導體的一第二電流; 在一時間t3切斷穿過該第一導體的該第一電流;及 在一時間t4切斷穿過該第二導體的該第二電流,使得 臨近該穿隧位障的磁矩向量之一定位於一方向,其與在 時間to時的初始較佳方向不同。 2 .如申請專利範圍第1項轉換一磁阻記憶體裝置之方法, 其中該第一及第二磁區之一的一子層磁矩摩擦平衡率 的範圍為:0 S|Mb」0.1。 - 3 .如申請專利範圍第1項轉換一磁阻記憶體裝置之方法, 其中時間t〇、q、t2、t3及t4的大小順序為:。 4.如申請專利範圍第1項轉換一磁阻記憶體裝置之方法’ -24- 583666 申請專利旄園蟥頁 進一步包括步驟將該第一及第二導體定位為相對於對方 的90°角。 5 .如申請專利範圍第1項轉換一磁阻記憶體裝置之方法, 進一步包括步驟將時間的較佳方向設置為相對於該 第一及第二導體的非零角度。 6.如申請專利範圍第1項轉換一磁阻記憶體裝置之方法, 其中接通該第一及第二導體中各自的該第一及第二電 流的步驟包括:使用一足夠大的組合電流大小以導致該 磁阻記憶體元件的轉換。 7 .如申請專利範圍第1項轉換一磁阻記憶體裝置之方法, 其中該N層強磁性材料由一非強磁性耦合材料分開,以 提供該非強磁性耦合。 8. 如申請專利範圍第7項轉換一磁阻記憶體裝置之方法, 其中提供該磁阻記憶體元件的步驟包括:在該非強磁性 岸禺合材料中使用Ru、Os、Re、Cr、Rh及Cu的至少其中之一 或其組合與化合物。 9. 如申請專利範圍第7項轉換一磁阻記憶體裝置之方法, 其中該非強磁性耦合材料具有一厚度,範圍在4 A至30 A之間。 10. 如申請專利範圍第1項轉換一磁阻記憶體裝置之方法 ,其中提供該磁阻記憶體元件的步驟包括:在該強磁性 材料中使用Ni、Fe、Mn、Co之一以及其組合。 11. 如申請專利範圍第10項轉換一磁阻記憶體裝置之方法 ,其中提供該磁阻記憶體元件的步驟包括:為該N層強 583666 申諸專兩_讀頁 磁性材料的每一層提供一厚度,範圍在15 A至100 A之間。 12. 如申請專利範圍第1項轉換一磁阻記憶體裝置之方法 ,另外包括一步驟向該磁阻記憶體元件提供一實質上 圓形的橫截面。 , 13. 如申請專利範圍第1項轉換一磁阻記憶體裝置之方法 ,另外包括一步驟藉由增加N來縮放該量,使得該量實 質上保持不變或增加,並且該磁阻記憶體元件的橫向尺 寸縮到更小時,該第一及第二磁區之一的一磁矩摩擦平 衡率保持不變。 14. 如申請專利範圍第1項轉換一磁阻記憶體裝置之方法 ,另外包括一步驟調整該N層的磁矩,使得該裝置橫向 尺寸縮到更小時,所需用來轉換該磁矩向量的一磁場實 質上保持不變。 15. 如申請專利範圍第1項轉換一磁阻記憶體裝置之方法 ,其中提供該寫入模式的步驟包括調整該N層的每一 層的力矩以在一操作電流下提供一直接寫入模式,使得 每個該第一及第二導體中的電流受一正極性脈衝作用 而寫入一狀態,而該第一及第二導體兩者中的電流受一 負極性脈衝作用而反轉該狀態。 16. 如申請專利範圍第15項轉換一磁阻記憶體裝置之方法 ,其中該時間t3與t4近似相等,使得該磁阻記憶體裝置 在該操作電流下以該直接寫入模式操作。 17. 如申請專利範圍第16項轉換一磁阻記憶體裝置之方法 ,其中該時間t i與12近似相等,使得該磁阻記憶體裝置 -26- 583666 申請專利鉉職頁 在該操作電流下以該直接寫入模式操作。 18. 如申請專利範圍第1項轉換一磁阻記憶體裝置之方法 ,其中提供該寫入模式的步驟包括調整該N層的每一 ’ 層的力矩,以在一操作電流下提供一觸發寫入模式,使 v 得每個該第一及第二導體中的電流受一相同極性脈衝 作用而寫入一狀態,而該第一及第二導體兩者中的電流 都受該相同極性脈衝作用而反轉該狀態。 19. 如申請專利範圍第1 8項轉換一磁阻記憶體裝置之方法 φ ,另外包括一步驟讀取該磁阻記憶體裝置以獲得儲存 資訊,並在接通及切斷該第一及第二電流步驟之前,將 該儲存資訊與要寫入的程式資訊進行比較。 20. 如申請專利範圍第18項轉換磁阻記憶體裝置之方法,另 外包括一步驟使用單極方向電流提供該第一及第二電 流。 21. —種用於轉換一磁阻記憶體裝置之方法,包括以下步 驟: · 提供臨近一第一導體與一第二導體的一磁阻記憶體 元件,其中該磁阻記憶體元件包括一固定磁區與一自由 磁區,由一穿隧位障分開,該自由磁區包括一強磁性材 〜 料的N個非強磁性轉合層,其中N是大於或等於二的一 整數,並且其中該N層定義一量而該N層的每一層具有 一調節磁矩以提供一寫入模式’並且其中該第一及第二 磁區之一的一子層磁矩摩擦平衡率的範圍為0 < |A^| < 0.1,並且該自由磁區具有一臨近該穿隧位障的一磁矩 向量,其在時間t〇定位於一較佳方向;及 -27- 583666 爭:讀專趟挺_讀頁 在一時間t i對該第一及第二導體之一導體應用一字 元電流脈衝,並在一時間t3切斷該字元電流脈衝,同時 又在一時間t2對該第一及第二導體之另一導體應用一 數位線電流脈衝,並在一時間t4切斷該數位線電流脈衝 ,其中t0 < t2 < t3 < t4,使得臨近該穿隧位障的該自 由磁區的磁矩向量在時間14定位於一方向,與其在時間 t 〇的初始較佳方向不同。 22.—種用於轉換一磁阻裝置之方法,包括以下步驟: 提供臨近一第一導體與一第二導體的一磁阻裝置,其 中該磁阻裝置包括一自由磁區與一固定磁區,由一穿隧 位障分開,該自由磁區包括一 N層合成非強磁性結構, 其定義一個量,其中N是大於或等於二的一整數,該N 層合成非強磁性結構包括非強磁性耦合強磁性層,其具 有臨近該穿隧位障的一磁矩向量,在一時間tQ定位於一 較佳方向,並且該N層合成非強磁性結構受調整以提供 一.觸發寫入模式; 讀取該磁阻記憶體裝置的一初始狀態,並將該初始狀 態與要儲存在該磁阻記憶體裝置中的一新狀態進行比 較;及 只有在該初始狀態與要儲存的該新狀態不同時,在一 時間t i對該第一及第二導體之一導體應用一字元電流 脈衝,並在一時間t3切斷該字元電流脈衝,同時又在一 時間t2對該第一及第二導體之另一導體應用一數位線 電流脈衝,並在一時間t4切斷該數位線電流脈衝。 • 28 -
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/978,859 US6545906B1 (en) | 2001-10-16 | 2001-10-16 | Method of writing to scalable magnetoresistance random access memory element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW583666B true TW583666B (en) | 2004-04-11 |
Family
ID=25526458
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW091123192A TW583666B (en) | 2001-10-16 | 2002-10-08 | A method of writing to a scalable magnetoresistance random access memory element |
Country Status (8)
| Country | Link |
|---|---|
| US (2) | US6545906B1 (zh) |
| EP (1) | EP1474807A2 (zh) |
| JP (1) | JP4292239B2 (zh) |
| KR (1) | KR100898875B1 (zh) |
| CN (1) | CN1610949B (zh) |
| AU (1) | AU2002327059A1 (zh) |
| TW (1) | TW583666B (zh) |
| WO (1) | WO2003034437A2 (zh) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7508727B2 (en) | 2005-12-30 | 2009-03-24 | Industrial Technology Research Institute | Memory structure and data writing method thereof |
Families Citing this family (312)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6545906B1 (en) * | 2001-10-16 | 2003-04-08 | Motorola, Inc. | Method of writing to scalable magnetoresistance random access memory element |
| US7390584B2 (en) * | 2002-03-27 | 2008-06-24 | Nve Corporation | Spin dependent tunneling devices having reduced topological coupling |
| US6762952B2 (en) * | 2002-05-01 | 2004-07-13 | Hewlett-Packard Development Company, L.P. | Minimizing errors in a magnetoresistive solid-state storage device |
| US6826077B2 (en) * | 2002-05-15 | 2004-11-30 | Hewlett-Packard Development Company, L.P. | Magnetic random access memory with reduced parasitic currents |
| JP3808799B2 (ja) * | 2002-05-15 | 2006-08-16 | 株式会社東芝 | 磁気ランダムアクセスメモリ |
| US6633498B1 (en) * | 2002-06-18 | 2003-10-14 | Motorola, Inc. | Magnetoresistive random access memory with reduced switching field |
| US6816402B2 (en) * | 2002-06-21 | 2004-11-09 | Micron Technology, Inc. | Row and column line geometries for improving MRAM write operations |
| US6683815B1 (en) * | 2002-06-26 | 2004-01-27 | Silicon Magnetic Systems | Magnetic memory cell and method for assigning tunable writing currents |
| US7095646B2 (en) * | 2002-07-17 | 2006-08-22 | Freescale Semiconductor, Inc. | Multi-state magnetoresistance random access cell with improved memory storage density |
| US7067862B2 (en) * | 2002-08-02 | 2006-06-27 | Unity Semiconductor Corporation | Conductive memory device with conductive oxide electrodes |
| US6898112B2 (en) * | 2002-12-18 | 2005-05-24 | Freescale Semiconductor, Inc. | Synthetic antiferromagnetic structure for magnetoelectronic devices |
| US6909631B2 (en) * | 2003-10-02 | 2005-06-21 | Freescale Semiconductor, Inc. | MRAM and methods for reading the MRAM |
| US6888743B2 (en) * | 2002-12-27 | 2005-05-03 | Freescale Semiconductor, Inc. | MRAM architecture |
| US6714442B1 (en) * | 2003-01-17 | 2004-03-30 | Motorola, Inc. | MRAM architecture with a grounded write bit line and electrically isolated read bit line |
| US6952364B2 (en) * | 2003-03-03 | 2005-10-04 | Samsung Electronics Co., Ltd. | Magnetic tunnel junction structures and methods of fabrication |
| KR100615600B1 (ko) * | 2004-08-09 | 2006-08-25 | 삼성전자주식회사 | 고집적 자기램 소자 및 그 제조방법 |
| EP1609153B1 (en) | 2003-03-20 | 2007-01-10 | Koninklijke Philips Electronics N.V. | Simultaneous reading from and writing to different memory cells |
| US6667899B1 (en) * | 2003-03-27 | 2003-12-23 | Motorola, Inc. | Magnetic memory and method of bi-directional write current programming |
| US7648158B2 (en) | 2003-04-03 | 2010-01-19 | Takata Corporation | Twin airbag |
| US6714446B1 (en) * | 2003-05-13 | 2004-03-30 | Motorola, Inc. | Magnetoelectronics information device having a compound magnetic free layer |
| US6816431B1 (en) * | 2003-05-28 | 2004-11-09 | International Business Machines Corporation | Magnetic random access memory using memory cells with rotated magnetic storage elements |
| US6778429B1 (en) | 2003-06-02 | 2004-08-17 | International Business Machines Corporation | Write circuit for a magnetic random access memory |
| JP4863151B2 (ja) * | 2003-06-23 | 2012-01-25 | 日本電気株式会社 | 磁気ランダム・アクセス・メモリとその製造方法 |
| US8471263B2 (en) * | 2003-06-24 | 2013-06-25 | Sang-Yun Lee | Information storage system which includes a bonded semiconductor structure |
| US6956763B2 (en) * | 2003-06-27 | 2005-10-18 | Freescale Semiconductor, Inc. | MRAM element and methods for writing the MRAM element |
| EP1649468B1 (en) * | 2003-07-22 | 2007-11-14 | Nxp B.V. | Compensating a long read time of a memory device in data comparison and write operations |
| US7911832B2 (en) | 2003-08-19 | 2011-03-22 | New York University | High speed low power magnetic devices based on current induced spin-momentum transfer |
| US8755222B2 (en) | 2003-08-19 | 2014-06-17 | New York University | Bipolar spin-transfer switching |
| US6956764B2 (en) * | 2003-08-25 | 2005-10-18 | Freescale Semiconductor, Inc. | Method of writing to a multi-state magnetic random access memory cell |
| US6967366B2 (en) * | 2003-08-25 | 2005-11-22 | Freescale Semiconductor, Inc. | Magnetoresistive random access memory with reduced switching field variation |
| US6842365B1 (en) | 2003-09-05 | 2005-01-11 | Freescale Semiconductor, Inc. | Write driver for a magnetoresistive memory |
| US6859388B1 (en) | 2003-09-05 | 2005-02-22 | Freescale Semiconductor, Inc. | Circuit for write field disturbance cancellation in an MRAM and method of operation |
| JP4759911B2 (ja) * | 2003-09-09 | 2011-08-31 | ソニー株式会社 | 磁気記憶素子及び磁気メモリ |
| WO2005038812A1 (ja) * | 2003-09-16 | 2005-04-28 | Nec Corporation | 半導体記憶装置及び半導体記憶装置のデータ書き込み方法 |
| KR100568512B1 (ko) * | 2003-09-29 | 2006-04-07 | 삼성전자주식회사 | 열발생층을 갖는 자기열 램셀들 및 이를 구동시키는 방법들 |
| KR100835275B1 (ko) * | 2004-08-12 | 2008-06-05 | 삼성전자주식회사 | 스핀 주입 메카니즘을 사용하여 자기램 소자를 구동시키는방법들 |
| US7372722B2 (en) * | 2003-09-29 | 2008-05-13 | Samsung Electronics Co., Ltd. | Methods of operating magnetic random access memory devices including heat-generating structures |
| KR100615089B1 (ko) * | 2004-07-14 | 2006-08-23 | 삼성전자주식회사 | 낮은 구동 전류를 갖는 자기 램 |
| US7369428B2 (en) * | 2003-09-29 | 2008-05-06 | Samsung Electronics Co., Ltd. | Methods of operating a magnetic random access memory device and related devices and structures |
| JP2005129801A (ja) * | 2003-10-24 | 2005-05-19 | Sony Corp | 磁気記憶素子及び磁気メモリ |
| JP4631267B2 (ja) * | 2003-10-27 | 2011-02-16 | ソニー株式会社 | 磁気記憶素子及び磁気メモリ |
| US7286421B2 (en) * | 2003-10-28 | 2007-10-23 | International Business Machines Corporation | Active compensation for operating point drift in MRAM write operation |
| US7045838B2 (en) * | 2003-10-31 | 2006-05-16 | International Business Machines Corporation | Techniques for coupling in semiconductor devices and magnetic device using these techniques |
| JP4765248B2 (ja) * | 2003-11-10 | 2011-09-07 | ソニー株式会社 | 磁気メモリ |
| US7602000B2 (en) | 2003-11-19 | 2009-10-13 | International Business Machines Corporation | Spin-current switched magnetic memory element suitable for circuit integration and method of fabricating the memory element |
| US7088608B2 (en) * | 2003-12-16 | 2006-08-08 | Freescale Semiconductor, Inc. | Reducing power consumption during MRAM writes using multiple current levels |
| US7370260B2 (en) * | 2003-12-16 | 2008-05-06 | Freescale Semiconductor, Inc. | MRAM having error correction code circuitry and method therefor |
| US6946697B2 (en) * | 2003-12-18 | 2005-09-20 | Freescale Semiconductor, Inc. | Synthetic antiferromagnet structures for use in MTJs in MRAM technology |
| JP4581394B2 (ja) * | 2003-12-22 | 2010-11-17 | ソニー株式会社 | 磁気メモリ |
| JP3935150B2 (ja) * | 2004-01-20 | 2007-06-20 | 株式会社東芝 | 磁気ランダムアクセスメモリ |
| JP3809445B2 (ja) * | 2004-03-05 | 2006-08-16 | 株式会社東芝 | 磁気抵抗ランダムアクセスメモリおよびその駆動方法 |
| WO2005086170A1 (ja) * | 2004-03-05 | 2005-09-15 | Nec Corporation | トグル型磁気ランダムアクセスメモリ |
| US7109539B2 (en) * | 2004-03-09 | 2006-09-19 | International Business Machines Corporation | Multiple-bit magnetic random access memory cell employing adiabatic switching |
| JP3908746B2 (ja) * | 2004-03-12 | 2007-04-25 | 株式会社東芝 | 磁気ランダムアクセスメモリ |
| JP2005260175A (ja) * | 2004-03-15 | 2005-09-22 | Sony Corp | 磁気メモリ及びその記録方法 |
| US7266486B2 (en) * | 2004-03-23 | 2007-09-04 | Freescale Semiconductor, Inc. | Magnetoresistive random access memory simulation |
| WO2005098953A1 (ja) * | 2004-03-31 | 2005-10-20 | Nec Corporation | 磁化方向制御方法、及びそれを応用したmram |
| JP2005310840A (ja) * | 2004-04-16 | 2005-11-04 | Toshiba Corp | 磁気ランダムアクセスメモリ |
| US7274057B2 (en) * | 2004-04-26 | 2007-09-25 | International Business Machines Corporation | Techniques for spin-flop switching with offset field |
| FR2869445B1 (fr) * | 2004-04-26 | 2006-07-07 | St Microelectronics Sa | Element de memoire vive magnetique |
| US7154798B2 (en) * | 2004-04-27 | 2006-12-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | MRAM arrays and methods for writing and reading magnetic memory devices |
| CN101031977B (zh) * | 2004-05-18 | 2011-01-26 | Nxp股份有限公司 | 数字磁流感测器和逻辑 |
| US7502248B2 (en) * | 2004-05-21 | 2009-03-10 | Samsung Electronics Co., Ltd. | Multi-bit magnetic random access memory device |
| US7506236B2 (en) * | 2004-05-28 | 2009-03-17 | International Business Machines Corporation | Techniques for operating semiconductor devices |
| US7102916B2 (en) * | 2004-06-30 | 2006-09-05 | International Business Machines Corporation | Method and structure for selecting anisotropy axis angle of MRAM device for reduced power consumption |
| US7187576B2 (en) | 2004-07-19 | 2007-03-06 | Infineon Technologies Ag | Read out scheme for several bits in a single MRAM soft layer |
| JP4460965B2 (ja) * | 2004-07-22 | 2010-05-12 | 株式会社東芝 | 磁気ランダムアクセスメモリ |
| US7098495B2 (en) * | 2004-07-26 | 2006-08-29 | Freescale Semiconducor, Inc. | Magnetic tunnel junction element structures and methods for fabricating the same |
| US7576956B2 (en) * | 2004-07-26 | 2009-08-18 | Grandis Inc. | Magnetic tunnel junction having diffusion stop layer |
| KR100660539B1 (ko) * | 2004-07-29 | 2006-12-22 | 삼성전자주식회사 | 자기 기억 소자 및 그 형성 방법 |
| US7075807B2 (en) * | 2004-08-18 | 2006-07-11 | Infineon Technologies Ag | Magnetic memory with static magnetic offset field |
| JP4868198B2 (ja) | 2004-08-19 | 2012-02-01 | 日本電気株式会社 | 磁性メモリ |
| KR100568542B1 (ko) * | 2004-08-19 | 2006-04-07 | 삼성전자주식회사 | 자기 램 소자의 기록방법 |
| US7200032B2 (en) * | 2004-08-20 | 2007-04-03 | Infineon Technologies Ag | MRAM with vertical storage element and field sensor |
| US7088612B2 (en) * | 2004-08-20 | 2006-08-08 | Infineon Technologies Ag | MRAM with vertical storage element in two layer-arrangement and field sensor |
| US7092284B2 (en) * | 2004-08-20 | 2006-08-15 | Infineon Technologies Ag | MRAM with magnetic via for storage of information and field sensor |
| US7916520B2 (en) * | 2004-08-25 | 2011-03-29 | Nec Corporation | Memory cell and magnetic random access memory |
| WO2006022367A1 (ja) * | 2004-08-26 | 2006-03-02 | Nec Corporation | 磁気抵抗素子及び磁気ランダムアクセスメモリ |
| JP2006086362A (ja) * | 2004-09-16 | 2006-03-30 | Toshiba Corp | 磁気記憶装置 |
| JP3962048B2 (ja) * | 2004-09-28 | 2007-08-22 | 株式会社東芝 | 半導体メモリ |
| US8179711B2 (en) * | 2004-10-26 | 2012-05-15 | Samsung Electronics Co., Ltd. | Semiconductor memory device with stacked memory cell and method of manufacturing the stacked memory cell |
| JP3959417B2 (ja) * | 2004-10-29 | 2007-08-15 | 株式会社東芝 | 半導体メモリの読み出し回路 |
| US20060092688A1 (en) * | 2004-10-29 | 2006-05-04 | International Business Machines Corporation | Stacked magnetic devices |
| US6937497B1 (en) | 2004-11-18 | 2005-08-30 | Maglabs, Inc. | Magnetic random access memory with stacked toggle memory cells |
| US6992910B1 (en) * | 2004-11-18 | 2006-01-31 | Maglabs, Inc. | Magnetic random access memory with three or more stacked toggle memory cells and method for writing a selected cell |
| WO2006054469A1 (ja) * | 2004-11-22 | 2006-05-26 | Nec Corporation | 強磁性膜、磁気抵抗素子、及び磁気ランダムアクセスメモリ |
| US7129098B2 (en) * | 2004-11-24 | 2006-10-31 | Freescale Semiconductor, Inc. | Reduced power magnetoresistive random access memory elements |
| US7200033B2 (en) * | 2004-11-30 | 2007-04-03 | Altis Semiconductor | MRAM with coil for creating offset field |
| US7088611B2 (en) * | 2004-11-30 | 2006-08-08 | Infineon Technologies Ag | MRAM with switchable ferromagnetic offset layer |
| DE602005022398D1 (de) | 2004-11-30 | 2010-09-02 | Toshiba Kk | Anordnung der Schreiblinien in einer MRAM-Vorrichtung |
| JP4388008B2 (ja) * | 2004-11-30 | 2009-12-24 | 株式会社東芝 | 半導体記憶装置 |
| JP2006156844A (ja) | 2004-11-30 | 2006-06-15 | Toshiba Corp | 半導体記憶装置 |
| JP4891092B2 (ja) * | 2004-12-01 | 2012-03-07 | 日本電気株式会社 | 磁気ランダムアクセスメモリ、その動作方法及びその製造方法 |
| JP2006165327A (ja) * | 2004-12-08 | 2006-06-22 | Toshiba Corp | 磁気ランダムアクセスメモリ |
| WO2006062150A1 (ja) * | 2004-12-10 | 2006-06-15 | Nec Corporation | 磁気ランダムアクセスメモリ |
| JP4012196B2 (ja) * | 2004-12-22 | 2007-11-21 | 株式会社東芝 | 磁気ランダムアクセスメモリのデータ書き込み方法 |
| US7622784B2 (en) * | 2005-01-10 | 2009-11-24 | International Business Machines Corporation | MRAM device with improved stack structure and offset field for low-power toggle mode writing |
| US7133309B2 (en) * | 2005-01-10 | 2006-11-07 | International Business Machines Corporation | Method and structure for generating offset fields for use in MRAM devices |
| EP1684305B1 (en) * | 2005-01-14 | 2011-05-11 | Bundesrepublik Deutschland, vertr. durch das Bundesministerium f. Wirtschaft und Technologie, | Magnetic memory device and method of magnetization reversal of the magnetization of at least one magnetic memory element |
| US20060171197A1 (en) * | 2005-01-31 | 2006-08-03 | Ulrich Klostermann | Magnetoresistive memory element having a stacked structure |
| US7543211B2 (en) * | 2005-01-31 | 2009-06-02 | Everspin Technologies, Inc. | Toggle memory burst |
| US7154771B2 (en) * | 2005-02-09 | 2006-12-26 | Infineon Technologies Ag | Method of switching an MRAM cell comprising bidirectional current generation |
| WO2006085545A1 (ja) * | 2005-02-09 | 2006-08-17 | Nec Corporation | トグル型磁気ランダムアクセスメモリ及びトグル型磁気ランダムアクセスメモリの書き込み方法 |
| US7099186B1 (en) * | 2005-02-10 | 2006-08-29 | Infineon Technologies Ag | Double-decker MRAM cells with scissor-state angled reference layer magnetic anisotropy and method for fabricating |
| US7180113B2 (en) * | 2005-02-10 | 2007-02-20 | Infineon Technologies Ag | Double-decker MRAM cell with rotated reference layer magnetizations |
| JP5077802B2 (ja) * | 2005-02-16 | 2012-11-21 | 日本電気株式会社 | 積層強磁性構造体、及び、mtj素子 |
| US20080273381A1 (en) * | 2005-03-01 | 2008-11-06 | Siu-Tat Chui | Method for Switching Random Access Memory Elements and Magnetic Element Structures |
| US20070263430A1 (en) * | 2006-05-15 | 2007-11-15 | Siu-Tat Chui | Method for switching magnetic random access memory elements and magnetic element structures |
| US7102919B1 (en) * | 2005-03-11 | 2006-09-05 | Taiwan Semiconductor Manufacturing Co., Ltd. | Methods and devices for determining writing current for memory cells |
| US7298597B2 (en) * | 2005-03-29 | 2007-11-20 | Hitachi Global Storage Technologies Netherlands B.V. | Magnetoresistive sensor based on spin accumulation effect with free layer stabilized by in-stack orthogonal magnetic coupling |
| WO2006104002A1 (ja) * | 2005-03-29 | 2006-10-05 | Nec Corporation | 磁気ランダムアクセスメモリ |
| JP2006294179A (ja) * | 2005-04-14 | 2006-10-26 | Renesas Technology Corp | 不揮発性記憶装置 |
| US7205596B2 (en) * | 2005-04-29 | 2007-04-17 | Infineon Technologies, Ag | Adiabatic rotational switching memory element including a ferromagnetic decoupling layer |
| US7158407B2 (en) * | 2005-04-29 | 2007-01-02 | Freescale Semiconductor, Inc. | Triple pulse method for MRAM toggle bit characterization |
| JP4877575B2 (ja) * | 2005-05-19 | 2012-02-15 | 日本電気株式会社 | 磁気ランダムアクセスメモリ |
| US7453720B2 (en) * | 2005-05-26 | 2008-11-18 | Maglabs, Inc. | Magnetic random access memory with stacked toggle memory cells having oppositely-directed easy-axis biasing |
| JP5051538B2 (ja) * | 2005-06-03 | 2012-10-17 | 日本電気株式会社 | Mram |
| JP2006344653A (ja) | 2005-06-07 | 2006-12-21 | Toshiba Corp | 磁気ランダムアクセスメモリ |
| JP4911318B2 (ja) * | 2005-08-02 | 2012-04-04 | 日本電気株式会社 | 磁気ランダムアクセスメモリ及びその動作方法 |
| JP5050853B2 (ja) * | 2005-08-02 | 2012-10-17 | 日本電気株式会社 | Mram |
| US7420837B2 (en) * | 2005-08-03 | 2008-09-02 | Industrial Technology Research Institute | Method for switching magnetic moment in magnetoresistive random access memory with low current |
| KR100915975B1 (ko) * | 2005-08-03 | 2009-09-10 | 인더스트리얼 테크놀로지 리서치 인스티튜트 | 저전류로 자기저항 랜덤 액세스 메모리의 자기 모멘트를전환하는 방법 |
| WO2007020823A1 (ja) * | 2005-08-15 | 2007-02-22 | Nec Corporation | 磁気メモリセル、磁気ランダムアクセスメモリ、及び磁気ランダムアクセスメモリへのデータ読み書き方法 |
| US7224601B2 (en) | 2005-08-25 | 2007-05-29 | Grandis Inc. | Oscillating-field assisted spin torque switching of a magnetic tunnel junction memory element |
| WO2007032257A1 (ja) * | 2005-09-14 | 2007-03-22 | Nec Corporation | 磁気ランダムアクセスメモリの波形整形回路 |
| US7973349B2 (en) * | 2005-09-20 | 2011-07-05 | Grandis Inc. | Magnetic device having multilayered free ferromagnetic layer |
| US7859034B2 (en) * | 2005-09-20 | 2010-12-28 | Grandis Inc. | Magnetic devices having oxide antiferromagnetic layer next to free ferromagnetic layer |
| US7777261B2 (en) | 2005-09-20 | 2010-08-17 | Grandis Inc. | Magnetic device having stabilized free ferromagnetic layer |
| JP2007087524A (ja) * | 2005-09-22 | 2007-04-05 | Renesas Technology Corp | 不揮発性半導体記憶装置 |
| JP5046189B2 (ja) * | 2005-10-03 | 2012-10-10 | 日本電気株式会社 | 磁気ランダムアクセスメモリ |
| US8089803B2 (en) * | 2005-10-03 | 2012-01-03 | Nec Corporation | Magnetic random access memory and operating method of the same |
| US8281221B2 (en) * | 2005-10-18 | 2012-10-02 | Nec Corporation | Operation method of MRAM including correcting data for single-bit error and multi-bit error |
| JP4853735B2 (ja) * | 2005-10-18 | 2012-01-11 | 日本電気株式会社 | Mram、及びその動作方法 |
| US7352613B2 (en) * | 2005-10-21 | 2008-04-01 | Macronix International Co., Ltd. | Magnetic memory device and methods for making a magnetic memory device |
| US7301801B2 (en) * | 2005-10-28 | 2007-11-27 | International Business Machines Corporation | Tuned pinned layers for magnetic tunnel junctions with multicomponent free layers |
| WO2007053517A2 (en) * | 2005-10-28 | 2007-05-10 | The University Of Alabama | Enhanced toggle-mram memory device |
| US7352614B2 (en) * | 2005-11-17 | 2008-04-01 | Macronix International Co., Ltd. | Systems and methods for reading and writing a magnetic memory device |
| US7203089B1 (en) | 2005-11-17 | 2007-04-10 | Macronix International Co., Ltd. | Systems and methods for a magnetic memory device that includes two word line transistors |
| US7257019B2 (en) * | 2005-11-17 | 2007-08-14 | Macronix International Co., Ltd. | Systems and methods for a magnetic memory device that includes a single word line transistor |
| US7313043B2 (en) * | 2005-11-29 | 2007-12-25 | Altis Semiconductor Snc | Magnetic Memory Array |
| JP5068016B2 (ja) | 2005-11-30 | 2012-11-07 | ルネサスエレクトロニクス株式会社 | 不揮発性記憶装置 |
| US7206223B1 (en) | 2005-12-07 | 2007-04-17 | Freescale Semiconductor, Inc. | MRAM memory with residual write field reset |
| US7280388B2 (en) * | 2005-12-07 | 2007-10-09 | Nahas Joseph J | MRAM with a write driver and method therefor |
| US7430135B2 (en) * | 2005-12-23 | 2008-09-30 | Grandis Inc. | Current-switched spin-transfer magnetic devices with reduced spin-transfer switching current density |
| US7755153B2 (en) * | 2006-01-13 | 2010-07-13 | Macronix International Co. Ltd. | Structure and method for a magnetic memory device with proximity writing |
| US7577017B2 (en) * | 2006-01-20 | 2009-08-18 | Industrial Technology Research Institute | High-bandwidth magnetoresistive random access memory devices and methods of operation thereof |
| US7463510B2 (en) * | 2006-01-20 | 2008-12-09 | Industrial Technology Research Institute | High-bandwidth magnetoresistive random access memory devices |
| TWI312153B (en) * | 2006-01-20 | 2009-07-11 | Ind Tech Res Inst | Power source for magnetic random access memory and magnetic random access memory using the same |
| US7368301B2 (en) * | 2006-01-27 | 2008-05-06 | Magic Technologies, Inc. | Magnetic random access memory with selective toggle memory cells |
| US7280389B2 (en) * | 2006-02-08 | 2007-10-09 | Magic Technologies, Inc. | Synthetic anti-ferromagnetic structure with non-magnetic spacer for MRAM applications |
| US20070187785A1 (en) * | 2006-02-16 | 2007-08-16 | Chien-Chung Hung | Magnetic memory cell and manufacturing method thereof |
| TWI300224B (en) * | 2006-02-21 | 2008-08-21 | Ind Tech Res Inst | Structure of magnetic memory cell and magnetic memory device |
| WO2007099874A1 (ja) * | 2006-02-27 | 2007-09-07 | Nec Corporation | 磁気抵抗素子及び磁気ランダムアクセスメモリ |
| US20080055792A1 (en) * | 2006-03-07 | 2008-03-06 | Agency For Science, Technology And Research | Memory cells and devices having magnetoresistive tunnel junction with guided magnetic moment switching and method |
| JP4406407B2 (ja) * | 2006-03-13 | 2010-01-27 | 株式会社東芝 | 磁気ランダムアクセスメモリ |
| CN100593822C (zh) * | 2006-03-14 | 2010-03-10 | 财团法人工业技术研究院 | 磁性存储单元结构与磁性存储装置 |
| WO2007119446A1 (ja) | 2006-03-24 | 2007-10-25 | Nec Corporation | Mram、及びmramのデータ読み書き方法 |
| US20070246787A1 (en) * | 2006-03-29 | 2007-10-25 | Lien-Chang Wang | On-plug magnetic tunnel junction devices based on spin torque transfer switching |
| JP2007273523A (ja) * | 2006-03-30 | 2007-10-18 | Tdk Corp | 磁気メモリ及びスピン注入方法 |
| TWI320929B (en) * | 2006-04-18 | 2010-02-21 | Ind Tech Res Inst | Structure and access method for magnetic memory cell structure and circuit of magnetic memory |
| US7349243B2 (en) * | 2006-04-20 | 2008-03-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | 3-parameter switching technique for use in MRAM memory arrays |
| US20070247939A1 (en) * | 2006-04-21 | 2007-10-25 | Nahas Joseph J | Mram array with reference cell row and methof of operation |
| TWI300225B (en) * | 2006-04-28 | 2008-08-21 | Ind Tech Res Inst | Method for accessing data on magnetic memory |
| EP1863034B1 (en) * | 2006-05-04 | 2011-01-05 | Hitachi, Ltd. | Magnetic memory device |
| CN100565699C (zh) * | 2006-05-09 | 2009-12-02 | 财团法人工业技术研究院 | 磁性存储器的资料存取方法 |
| US7728384B2 (en) * | 2006-05-30 | 2010-06-01 | Macronix International Co., Ltd. | Magnetic random access memory using single crystal self-aligned diode |
| US8497538B2 (en) | 2006-05-31 | 2013-07-30 | Everspin Technologies, Inc. | MRAM synthetic antiferromagnet structure |
| US7535069B2 (en) * | 2006-06-14 | 2009-05-19 | International Business Machines Corporation | Magnetic tunnel junction with enhanced magnetic switching characteristics |
| JP4518049B2 (ja) * | 2006-07-03 | 2010-08-04 | ソニー株式会社 | 記憶装置 |
| US7433225B2 (en) * | 2006-07-06 | 2008-10-07 | International Business Machines Corporation | Scalable magnetic random access memory device |
| US7502249B1 (en) * | 2006-07-17 | 2009-03-10 | Grandis, Inc. | Method and system for using a pulsed field to assist spin transfer induced switching of magnetic memory elements |
| US8693238B2 (en) * | 2006-08-07 | 2014-04-08 | Nec Corporation | MRAM having variable word line drive potential |
| US7851840B2 (en) * | 2006-09-13 | 2010-12-14 | Grandis Inc. | Devices and circuits based on magnetic tunnel junctions utilizing a multilayer barrier |
| WO2008047536A1 (en) * | 2006-10-16 | 2008-04-24 | Nec Corporation | Magnetic memory cell and magnetic random access memory |
| JP2008117930A (ja) * | 2006-11-02 | 2008-05-22 | Sony Corp | 記憶素子、メモリ |
| JP5146836B2 (ja) * | 2006-12-06 | 2013-02-20 | 日本電気株式会社 | 磁気ランダムアクセスメモリ及びその製造方法 |
| US7453740B2 (en) | 2007-01-19 | 2008-11-18 | International Business Machines Corporation | Method and apparatus for initializing reference cells of a toggle switched MRAM device |
| TWI320930B (en) * | 2007-01-29 | 2010-02-21 | Ind Tech Res Inst | Direct writing method on magnetic memory cell and magetic memory cell structure |
| US7719882B2 (en) * | 2007-02-06 | 2010-05-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Advanced MRAM design |
| WO2008099626A1 (ja) | 2007-02-13 | 2008-08-21 | Nec Corporation | 磁気抵抗効果素子、および磁気ランダムアクセスメモリ |
| TWI324344B (en) * | 2007-02-16 | 2010-05-01 | Ind Tech Res Inst | Writing method on magnetic memory cell and magetic memory array structure |
| US8009466B2 (en) | 2007-02-21 | 2011-08-30 | Nec Corporation | Semiconductor storage device |
| JP4438806B2 (ja) * | 2007-02-21 | 2010-03-24 | ソニー株式会社 | メモリ |
| TWI333208B (en) * | 2007-03-26 | 2010-11-11 | Ind Tech Res Inst | Magnetic memory and method for manufacturing the same |
| US7599215B2 (en) * | 2007-03-30 | 2009-10-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Magnetoresistive random access memory device with small-angle toggle write lines |
| JP4905866B2 (ja) * | 2007-04-17 | 2012-03-28 | 日本電気株式会社 | 半導体記憶装置及びその動作方法 |
| US7539047B2 (en) * | 2007-05-08 | 2009-05-26 | Honeywell International, Inc. | MRAM cell with multiple storage elements |
| TWI333207B (en) * | 2007-05-30 | 2010-11-11 | Ind Tech Res Inst | Magnetic memory cell with multiple-bit in stacked structure and magnetic memory device |
| CN101689600B (zh) | 2007-06-25 | 2012-12-26 | 日本电气株式会社 | 磁阻效应元件及磁性随机存取存储器 |
| US7957179B2 (en) * | 2007-06-27 | 2011-06-07 | Grandis Inc. | Magnetic shielding in magnetic multilayer structures |
| US20090034321A1 (en) | 2007-08-01 | 2009-02-05 | Honeywell International Inc. | Magnetoresistive Element with a Biasing Layer |
| US8120127B2 (en) | 2007-08-03 | 2012-02-21 | Nec Corporation | Magnetic random access memory and method of manufacturing the same |
| JP5338666B2 (ja) * | 2007-08-03 | 2013-11-13 | 日本電気株式会社 | 磁壁ランダムアクセスメモリ |
| TWI415124B (zh) * | 2007-08-09 | 2013-11-11 | Ind Tech Res Inst | 磁性隨機存取記憶體 |
| TW200907964A (en) * | 2007-08-09 | 2009-02-16 | Ind Tech Res Inst | Structure of magnetic memory cell and magnetic memory device |
| US7982275B2 (en) | 2007-08-22 | 2011-07-19 | Grandis Inc. | Magnetic element having low saturation magnetization |
| JP5445133B2 (ja) * | 2007-09-19 | 2014-03-19 | 日本電気株式会社 | 磁気ランダムアクセスメモリ、その書き込み方法、及び磁気抵抗効果素子 |
| US9812184B2 (en) | 2007-10-31 | 2017-11-07 | New York University | Current induced spin-momentum transfer stack with dual insulating layers |
| US7596045B2 (en) * | 2007-10-31 | 2009-09-29 | International Business Machines Corporation | Design structure for initializing reference cells of a toggle switched MRAM device |
| KR101237005B1 (ko) | 2007-11-09 | 2013-02-26 | 삼성전자주식회사 | 저항체를 이용한 비휘발성 메모리 장치, 이를 포함하는메모리 시스템, 및 이의 구동 방법 |
| KR101291721B1 (ko) * | 2007-12-03 | 2013-07-31 | 삼성전자주식회사 | 저항체를 이용한 비휘발성 메모리 장치, 이를 포함하는메모리 시스템 |
| TWI343055B (en) * | 2007-12-10 | 2011-06-01 | Ind Tech Res Inst | Magnetic memory cell structure with thermal assistant and magnetic random access memory |
| KR101365683B1 (ko) * | 2007-12-27 | 2014-02-20 | 삼성전자주식회사 | 가변 저항 메모리 장치, 그것의 플렉서블 프로그램 방법,그리고 그것을 포함하는 메모리 시스템 |
| KR101424176B1 (ko) * | 2008-03-21 | 2014-07-31 | 삼성전자주식회사 | 저항체를 이용한 비휘발성 메모리 장치, 이를 포함하는메모리 시스템 |
| KR20090109345A (ko) * | 2008-04-15 | 2009-10-20 | 삼성전자주식회사 | 저항체를 이용한 비휘발성 메모리 장치, 이를 포함하는메모리 시스템 |
| US7894248B2 (en) * | 2008-09-12 | 2011-02-22 | Grandis Inc. | Programmable and redundant circuitry based on magnetic tunnel junction (MTJ) |
| US7880209B2 (en) * | 2008-10-09 | 2011-02-01 | Seagate Technology Llc | MRAM cells including coupled free ferromagnetic layers for stabilization |
| GB2465370A (en) * | 2008-11-13 | 2010-05-19 | Ingenia Holdings | Magnetic data storage comprising a synthetic anti-ferromagnetic stack arranged to maintain solitons |
| KR20100058825A (ko) * | 2008-11-25 | 2010-06-04 | 삼성전자주식회사 | 저항체를 이용한 반도체 장치, 이를 이용한 카드 또는 시스템 및 상기 반도체 장치의 구동 방법 |
| JP2010134986A (ja) * | 2008-12-03 | 2010-06-17 | Sony Corp | 抵抗変化型メモリデバイス |
| JP2010135512A (ja) * | 2008-12-03 | 2010-06-17 | Sony Corp | 抵抗変化型メモリデバイス |
| US8184476B2 (en) * | 2008-12-26 | 2012-05-22 | Everspin Technologies, Inc. | Random access memory architecture including midpoint reference |
| KR20100097407A (ko) * | 2009-02-26 | 2010-09-03 | 삼성전자주식회사 | 저항성 메모리 장치, 이를 포함하는 메모리 시스템 및 저항성 메모리 장치의 프로그램 방법 |
| KR20100107609A (ko) * | 2009-03-26 | 2010-10-06 | 삼성전자주식회사 | 저항성 메모리 장치, 이를 포함하는 메모리 시스템 및 저항성 메모리 장치의 기입 방법 |
| FR2946183B1 (fr) * | 2009-05-27 | 2011-12-23 | Commissariat Energie Atomique | Dispositif magnetique a polarisation de spin. |
| JP2011008849A (ja) * | 2009-06-24 | 2011-01-13 | Sony Corp | メモリ及び書き込み制御方法 |
| US8411493B2 (en) | 2009-10-30 | 2013-04-02 | Honeywell International Inc. | Selection device for a spin-torque transfer magnetic random access memory |
| JPWO2011065323A1 (ja) | 2009-11-27 | 2013-04-11 | 日本電気株式会社 | 磁気抵抗効果素子、および磁気ランダムアクセスメモリ |
| US8411497B2 (en) | 2010-05-05 | 2013-04-02 | Grandis, Inc. | Method and system for providing a magnetic field aligned spin transfer torque random access memory |
| GB201015497D0 (en) | 2010-09-16 | 2010-10-27 | Cambridge Entpr Ltd | Magnetic data storage |
| GB201020727D0 (en) | 2010-12-07 | 2011-01-19 | Cambridge Entpr Ltd | Magnetic structure |
| US8339843B2 (en) | 2010-12-17 | 2012-12-25 | Honeywell International Inc. | Generating a temperature-compensated write current for a magnetic memory cell |
| US8467234B2 (en) | 2011-02-08 | 2013-06-18 | Crocus Technology Inc. | Magnetic random access memory devices configured for self-referenced read operation |
| JP5686626B2 (ja) | 2011-02-22 | 2015-03-18 | ルネサスエレクトロニクス株式会社 | 磁気メモリ及びその製造方法 |
| US8576615B2 (en) | 2011-06-10 | 2013-11-05 | Crocus Technology Inc. | Magnetic random access memory devices including multi-bit cells |
| US8488372B2 (en) * | 2011-06-10 | 2013-07-16 | Crocus Technology Inc. | Magnetic random access memory devices including multi-bit cells |
| US8525709B2 (en) * | 2011-09-21 | 2013-09-03 | Qualcomm Incorporated | Systems and methods for designing ADC based on probabilistic switching of memories |
| US9082950B2 (en) | 2012-10-17 | 2015-07-14 | New York University | Increased magnetoresistance in an inverted orthogonal spin transfer layer stack |
| US9082888B2 (en) | 2012-10-17 | 2015-07-14 | New York University | Inverted orthogonal spin transfer layer stack |
| US8982613B2 (en) | 2013-06-17 | 2015-03-17 | New York University | Scalable orthogonal spin transfer magnetic random access memory devices with reduced write error rates |
| US9263667B1 (en) | 2014-07-25 | 2016-02-16 | Spin Transfer Technologies, Inc. | Method for manufacturing MTJ memory device |
| US9337412B2 (en) | 2014-09-22 | 2016-05-10 | Spin Transfer Technologies, Inc. | Magnetic tunnel junction structure for MRAM device |
| US9384827B1 (en) | 2015-03-05 | 2016-07-05 | Northrop Grumman Systems Corporation | Timing control in a quantum memory system |
| US10468590B2 (en) | 2015-04-21 | 2019-11-05 | Spin Memory, Inc. | High annealing temperature perpendicular magnetic anisotropy structure for magnetic random access memory |
| US9728712B2 (en) | 2015-04-21 | 2017-08-08 | Spin Transfer Technologies, Inc. | Spin transfer torque structure for MRAM devices having a spin current injection capping layer |
| WO2016198886A1 (en) | 2015-06-10 | 2016-12-15 | The University Of Nottingham | Magnetic storage devices and methods |
| US9853206B2 (en) | 2015-06-16 | 2017-12-26 | Spin Transfer Technologies, Inc. | Precessional spin current structure for MRAM |
| US9773974B2 (en) | 2015-07-30 | 2017-09-26 | Spin Transfer Technologies, Inc. | Polishing stop layer(s) for processing arrays of semiconductor elements |
| US10163479B2 (en) | 2015-08-14 | 2018-12-25 | Spin Transfer Technologies, Inc. | Method and apparatus for bipolar memory write-verify |
| US9721636B1 (en) | 2016-01-28 | 2017-08-01 | Western Digital Technologies, Inc. | Method for controlled switching of a MRAM device |
| US9741926B1 (en) | 2016-01-28 | 2017-08-22 | Spin Transfer Technologies, Inc. | Memory cell having magnetic tunnel junction and thermal stability enhancement layer |
| US10446210B2 (en) | 2016-09-27 | 2019-10-15 | Spin Memory, Inc. | Memory instruction pipeline with a pre-read stage for a write operation for reducing power consumption in a memory device that uses dynamic redundancy registers |
| US10360964B2 (en) | 2016-09-27 | 2019-07-23 | Spin Memory, Inc. | Method of writing contents in memory during a power up sequence using a dynamic redundancy register in a memory device |
| US10437723B2 (en) | 2016-09-27 | 2019-10-08 | Spin Memory, Inc. | Method of flushing the contents of a dynamic redundancy register to a secure storage area during a power down in a memory device |
| US11119910B2 (en) | 2016-09-27 | 2021-09-14 | Spin Memory, Inc. | Heuristics for selecting subsegments for entry in and entry out operations in an error cache system with coarse and fine grain segments |
| US10628316B2 (en) | 2016-09-27 | 2020-04-21 | Spin Memory, Inc. | Memory device with a plurality of memory banks where each memory bank is associated with a corresponding memory instruction pipeline and a dynamic redundancy register |
| US10991410B2 (en) | 2016-09-27 | 2021-04-27 | Spin Memory, Inc. | Bi-polar write scheme |
| US11119936B2 (en) | 2016-09-27 | 2021-09-14 | Spin Memory, Inc. | Error cache system with coarse and fine segments for power optimization |
| US10366774B2 (en) | 2016-09-27 | 2019-07-30 | Spin Memory, Inc. | Device with dynamic redundancy registers |
| US11151042B2 (en) | 2016-09-27 | 2021-10-19 | Integrated Silicon Solution, (Cayman) Inc. | Error cache segmentation for power reduction |
| US10546625B2 (en) | 2016-09-27 | 2020-01-28 | Spin Memory, Inc. | Method of optimizing write voltage based on error buffer occupancy |
| US10437491B2 (en) | 2016-09-27 | 2019-10-08 | Spin Memory, Inc. | Method of processing incomplete memory operations in a memory device during a power up sequence and a power down sequence using a dynamic redundancy register |
| US10460781B2 (en) | 2016-09-27 | 2019-10-29 | Spin Memory, Inc. | Memory device with a dual Y-multiplexer structure for performing two simultaneous operations on the same row of a memory bank |
| US10818331B2 (en) | 2016-09-27 | 2020-10-27 | Spin Memory, Inc. | Multi-chip module for MRAM devices with levels of dynamic redundancy registers |
| US10672976B2 (en) | 2017-02-28 | 2020-06-02 | Spin Memory, Inc. | Precessional spin current structure with high in-plane magnetization for MRAM |
| US10665777B2 (en) | 2017-02-28 | 2020-05-26 | Spin Memory, Inc. | Precessional spin current structure with non-magnetic insertion layer for MRAM |
| US10032978B1 (en) | 2017-06-27 | 2018-07-24 | Spin Transfer Technologies, Inc. | MRAM with reduced stray magnetic fields |
| US10529439B2 (en) | 2017-10-24 | 2020-01-07 | Spin Memory, Inc. | On-the-fly bit failure detection and bit redundancy remapping techniques to correct for fixed bit defects |
| US10656994B2 (en) | 2017-10-24 | 2020-05-19 | Spin Memory, Inc. | Over-voltage write operation of tunnel magnet-resistance (“TMR”) memory device and correcting failure bits therefrom by using on-the-fly bit failure detection and bit redundancy remapping techniques |
| US10489245B2 (en) | 2017-10-24 | 2019-11-26 | Spin Memory, Inc. | Forcing stuck bits, waterfall bits, shunt bits and low TMR bits to short during testing and using on-the-fly bit failure detection and bit redundancy remapping techniques to correct them |
| US10481976B2 (en) | 2017-10-24 | 2019-11-19 | Spin Memory, Inc. | Forcing bits as bad to widen the window between the distributions of acceptable high and low resistive bits thereby lowering the margin and increasing the speed of the sense amplifiers |
| US10679685B2 (en) | 2017-12-27 | 2020-06-09 | Spin Memory, Inc. | Shared bit line array architecture for magnetoresistive memory |
| US10891997B2 (en) | 2017-12-28 | 2021-01-12 | Spin Memory, Inc. | Memory array with horizontal source line and a virtual source line |
| US10395711B2 (en) | 2017-12-28 | 2019-08-27 | Spin Memory, Inc. | Perpendicular source and bit lines for an MRAM array |
| US10811594B2 (en) | 2017-12-28 | 2020-10-20 | Spin Memory, Inc. | Process for hard mask development for MRAM pillar formation using photolithography |
| US10360962B1 (en) | 2017-12-28 | 2019-07-23 | Spin Memory, Inc. | Memory array with individually trimmable sense amplifiers |
| US10395712B2 (en) | 2017-12-28 | 2019-08-27 | Spin Memory, Inc. | Memory array with horizontal source line and sacrificial bitline per virtual source |
| US10516094B2 (en) | 2017-12-28 | 2019-12-24 | Spin Memory, Inc. | Process for creating dense pillars using multiple exposures for MRAM fabrication |
| US10424726B2 (en) | 2017-12-28 | 2019-09-24 | Spin Memory, Inc. | Process for improving photoresist pillar adhesion during MRAM fabrication |
| US10360961B1 (en) | 2017-12-29 | 2019-07-23 | Spin Memory, Inc. | AC current pre-charge write-assist in orthogonal STT-MRAM |
| US10367139B2 (en) | 2017-12-29 | 2019-07-30 | Spin Memory, Inc. | Methods of manufacturing magnetic tunnel junction devices |
| US10840436B2 (en) | 2017-12-29 | 2020-11-17 | Spin Memory, Inc. | Perpendicular magnetic anisotropy interface tunnel junction devices and methods of manufacture |
| US10236048B1 (en) | 2017-12-29 | 2019-03-19 | Spin Memory, Inc. | AC current write-assist in orthogonal STT-MRAM |
| US10424723B2 (en) | 2017-12-29 | 2019-09-24 | Spin Memory, Inc. | Magnetic tunnel junction devices including an optimization layer |
| US10886330B2 (en) | 2017-12-29 | 2021-01-05 | Spin Memory, Inc. | Memory device having overlapping magnetic tunnel junctions in compliance with a reference pitch |
| US10784439B2 (en) | 2017-12-29 | 2020-09-22 | Spin Memory, Inc. | Precessional spin current magnetic tunnel junction devices and methods of manufacture |
| US10199083B1 (en) | 2017-12-29 | 2019-02-05 | Spin Transfer Technologies, Inc. | Three-terminal MRAM with ac write-assist for low read disturb |
| US10270027B1 (en) | 2017-12-29 | 2019-04-23 | Spin Memory, Inc. | Self-generating AC current assist in orthogonal STT-MRAM |
| US10236047B1 (en) | 2017-12-29 | 2019-03-19 | Spin Memory, Inc. | Shared oscillator (STNO) for MRAM array write-assist in orthogonal STT-MRAM |
| US10546624B2 (en) | 2017-12-29 | 2020-01-28 | Spin Memory, Inc. | Multi-port random access memory |
| US10840439B2 (en) | 2017-12-29 | 2020-11-17 | Spin Memory, Inc. | Magnetic tunnel junction (MTJ) fabrication methods and systems |
| US10319900B1 (en) | 2017-12-30 | 2019-06-11 | Spin Memory, Inc. | Perpendicular magnetic tunnel junction device with precessional spin current layer having a modulated moment density |
| US10236439B1 (en) | 2017-12-30 | 2019-03-19 | Spin Memory, Inc. | Switching and stability control for perpendicular magnetic tunnel junction device |
| US10339993B1 (en) | 2017-12-30 | 2019-07-02 | Spin Memory, Inc. | Perpendicular magnetic tunnel junction device with skyrmionic assist layers for free layer switching |
| US10229724B1 (en) | 2017-12-30 | 2019-03-12 | Spin Memory, Inc. | Microwave write-assist in series-interconnected orthogonal STT-MRAM devices |
| US10141499B1 (en) | 2017-12-30 | 2018-11-27 | Spin Transfer Technologies, Inc. | Perpendicular magnetic tunnel junction device with offset precessional spin current layer |
| US10255962B1 (en) | 2017-12-30 | 2019-04-09 | Spin Memory, Inc. | Microwave write-assist in orthogonal STT-MRAM |
| US10468588B2 (en) | 2018-01-05 | 2019-11-05 | Spin Memory, Inc. | Perpendicular magnetic tunnel junction device with skyrmionic enhancement layers for the precessional spin current magnetic layer |
| US10438996B2 (en) | 2018-01-08 | 2019-10-08 | Spin Memory, Inc. | Methods of fabricating magnetic tunnel junctions integrated with selectors |
| US10438995B2 (en) | 2018-01-08 | 2019-10-08 | Spin Memory, Inc. | Devices including magnetic tunnel junctions integrated with selectors |
| US10388861B1 (en) | 2018-03-08 | 2019-08-20 | Spin Memory, Inc. | Magnetic tunnel junction wafer adaptor used in magnetic annealing furnace and method of using the same |
| US10446744B2 (en) | 2018-03-08 | 2019-10-15 | Spin Memory, Inc. | Magnetic tunnel junction wafer adaptor used in magnetic annealing furnace and method of using the same |
| US20190296220A1 (en) | 2018-03-23 | 2019-09-26 | Spin Transfer Technologies, Inc. | Magnetic Tunnel Junction Devices Including an Annular Free Magnetic Layer and a Planar Reference Magnetic Layer |
| US10784437B2 (en) | 2018-03-23 | 2020-09-22 | Spin Memory, Inc. | Three-dimensional arrays with MTJ devices including a free magnetic trench layer and a planar reference magnetic layer |
| US11107974B2 (en) | 2018-03-23 | 2021-08-31 | Spin Memory, Inc. | Magnetic tunnel junction devices including a free magnetic trench layer and a planar reference magnetic layer |
| US11107978B2 (en) | 2018-03-23 | 2021-08-31 | Spin Memory, Inc. | Methods of manufacturing three-dimensional arrays with MTJ devices including a free magnetic trench layer and a planar reference magnetic layer |
| US10411185B1 (en) | 2018-05-30 | 2019-09-10 | Spin Memory, Inc. | Process for creating a high density magnetic tunnel junction array test platform |
| US10559338B2 (en) | 2018-07-06 | 2020-02-11 | Spin Memory, Inc. | Multi-bit cell read-out techniques |
| US10600478B2 (en) | 2018-07-06 | 2020-03-24 | Spin Memory, Inc. | Multi-bit cell read-out techniques for MRAM cells with mixed pinned magnetization orientations |
| US10593396B2 (en) | 2018-07-06 | 2020-03-17 | Spin Memory, Inc. | Multi-bit cell read-out techniques for MRAM cells with mixed pinned magnetization orientations |
| US10692569B2 (en) | 2018-07-06 | 2020-06-23 | Spin Memory, Inc. | Read-out techniques for multi-bit cells |
| US10447278B1 (en) | 2018-07-17 | 2019-10-15 | Northrop Grumman Systems Corporation | JTL-based superconducting logic arrays and FPGAs |
| US10650875B2 (en) | 2018-08-21 | 2020-05-12 | Spin Memory, Inc. | System for a wide temperature range nonvolatile memory |
| US10818346B2 (en) | 2018-09-17 | 2020-10-27 | Northrop Grumman Systems Corporation | Quantizing loop memory cell system |
| US10699761B2 (en) | 2018-09-18 | 2020-06-30 | Spin Memory, Inc. | Word line decoder memory architecture |
| US11621293B2 (en) | 2018-10-01 | 2023-04-04 | Integrated Silicon Solution, (Cayman) Inc. | Multi terminal device stack systems and methods |
| US10971680B2 (en) | 2018-10-01 | 2021-04-06 | Spin Memory, Inc. | Multi terminal device stack formation methods |
| US10580827B1 (en) | 2018-11-16 | 2020-03-03 | Spin Memory, Inc. | Adjustable stabilizer/polarizer method for MRAM with enhanced stability and efficient switching |
| US11107979B2 (en) | 2018-12-28 | 2021-08-31 | Spin Memory, Inc. | Patterned silicide structures and methods of manufacture |
| US11024791B1 (en) | 2020-01-27 | 2021-06-01 | Northrop Grumman Systems Corporation | Magnetically stabilized magnetic Josephson junction memory cell |
| US12080343B2 (en) * | 2021-10-28 | 2024-09-03 | William Robert Reohr | Read and write enhancements for arrays of superconducting magnetic memory cells |
| US12249393B2 (en) | 2021-11-24 | 2025-03-11 | William Robert Reohr | Superconducting distributed bidirectional current driver system |
Family Cites Families (297)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3163853A (en) | 1958-02-20 | 1964-12-29 | Sperry Rand Corp | Magnetic storage thin film |
| US3448438A (en) * | 1965-03-19 | 1969-06-03 | Hughes Aircraft Co | Thin film nondestructive memory |
| US3573760A (en) * | 1968-12-16 | 1971-04-06 | Ibm | High density thin film memory and method of operation |
| US3638199A (en) * | 1969-12-19 | 1972-01-25 | Ibm | Data-processing system with a storage having a plurality of simultaneously accessible locations |
| US3707706A (en) | 1970-11-04 | 1972-12-26 | Honeywell Inf Systems | Multiple state memory |
| US3913080A (en) | 1973-04-16 | 1975-10-14 | Electronic Memories & Magnetic | Multi-bit core storage |
| US4103315A (en) | 1977-06-24 | 1978-07-25 | International Business Machines Corporation | Antiferromagnetic-ferromagnetic exchange bias films |
| US4356523A (en) | 1980-06-09 | 1982-10-26 | Ampex Corporation | Narrow track magnetoresistive transducer assembly |
| US4351712A (en) | 1980-12-10 | 1982-09-28 | International Business Machines Corporation | Low energy ion beam oxidation process |
| CA1184532A (en) | 1981-06-19 | 1985-03-26 | Severin F. Sverre | Magnetic water conditioning device |
| JPS5845619A (ja) | 1981-09-09 | 1983-03-16 | Hitachi Ltd | 磁気抵抗効果型薄膜磁気ヘッド |
| JPS60500187A (ja) * | 1982-12-30 | 1985-02-07 | インタ−ナシヨナル・ビジネス・マシ−ンズ・コ−ポレ−シヨン | データ処理システム |
| US4455626A (en) * | 1983-03-21 | 1984-06-19 | Honeywell Inc. | Thin film memory with magnetoresistive read-out |
| US4663685A (en) * | 1985-08-15 | 1987-05-05 | International Business Machines | Magnetoresistive read transducer having patterned longitudinal bias |
| US4780848A (en) | 1986-06-03 | 1988-10-25 | Honeywell Inc. | Magnetoresistive memory with multi-layer storage cells having layers of limited thickness |
| US4731757A (en) * | 1986-06-27 | 1988-03-15 | Honeywell Inc. | Magnetoresistive memory including thin film storage cells having tapered ends |
| US4751677A (en) * | 1986-09-16 | 1988-06-14 | Honeywell Inc. | Differential arrangement magnetic memory cell |
| US4754431A (en) * | 1987-01-28 | 1988-06-28 | Honeywell Inc. | Vialess shorting bars for magnetoresistive devices |
| JPH0721848B2 (ja) | 1987-02-17 | 1995-03-08 | シーゲイト テクノロジー インターナショナル | 磁気抵抗センサ及びその製造方法 |
| US4825325A (en) * | 1987-10-30 | 1989-04-25 | International Business Machines Corporation | Magnetoresistive read transducer assembly |
| JPH01214077A (ja) | 1988-02-22 | 1989-08-28 | Nec Corp | 磁気抵抗効果素子 |
| DE68923573T2 (de) | 1988-03-31 | 1996-01-18 | Sony Corp | Eingangsschaltungen. |
| US4884235A (en) | 1988-07-19 | 1989-11-28 | Thiele Alfred A | Micromagnetic memory package |
| JPH02288209A (ja) | 1989-04-28 | 1990-11-28 | Amorufuasu Denshi Device Kenkyusho:Kk | 多層磁性薄膜 |
| US5039655A (en) | 1989-07-28 | 1991-08-13 | Ampex Corporation | Thin film memory device having superconductor keeper for eliminating magnetic domain creep |
| JPH0661293B2 (ja) | 1989-08-30 | 1994-08-17 | 豊田合成株式会社 | カーテンレールの製造方法 |
| US5075247A (en) | 1990-01-18 | 1991-12-24 | Microunity Systems Engineering, Inc. | Method of making hall effect semiconductor memory cell |
| US5173873A (en) | 1990-06-28 | 1992-12-22 | The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration | High speed magneto-resistive random access memory |
| JP3483895B2 (ja) | 1990-11-01 | 2004-01-06 | 株式会社東芝 | 磁気抵抗効果膜 |
| JP2601022B2 (ja) * | 1990-11-30 | 1997-04-16 | 日本電気株式会社 | 半導体装置の製造方法 |
| US5998040A (en) | 1990-12-10 | 1999-12-07 | Hitachi, Ltd. | Multilayer which shows magnetoresistive effect and magnetoresistive element using the same |
| US5159513A (en) | 1991-02-08 | 1992-10-27 | International Business Machines Corporation | Magnetoresistive sensor based on the spin valve effect |
| CA2060835A1 (en) | 1991-02-11 | 1992-08-12 | Romney R. Katti | Integrated, non-volatile, high-speed analog random access memory |
| US5284701A (en) * | 1991-02-11 | 1994-02-08 | Ashland Oil, Inc. | Carbon fiber reinforced coatings |
| EP0507451B1 (en) | 1991-03-06 | 1998-06-17 | Mitsubishi Denki Kabushiki Kaisha | Magnetic thin film memory device |
| KR930008856B1 (ko) | 1991-05-15 | 1993-09-16 | 금성일렉트론 주식회사 | 혼합용액의 일정비율 혼합장치 |
| JP3065736B2 (ja) | 1991-10-01 | 2000-07-17 | 松下電器産業株式会社 | 半導体記憶装置 |
| US5258884A (en) | 1991-10-17 | 1993-11-02 | International Business Machines Corporation | Magnetoresistive read transducer containing a titanium and tungsten alloy spacer layer |
| US5251170A (en) | 1991-11-04 | 1993-10-05 | Nonvolatile Electronics, Incorporated | Offset magnetoresistive memory structures |
| US5268806A (en) | 1992-01-21 | 1993-12-07 | International Business Machines Corporation | Magnetoresistive transducer having tantalum lead conductors |
| US5285339A (en) * | 1992-02-28 | 1994-02-08 | International Business Machines Corporation | Magnetoresistive read transducer having improved bias profile |
| US5398200A (en) * | 1992-03-02 | 1995-03-14 | Motorola, Inc. | Vertically formed semiconductor random access memory device |
| US5347485A (en) | 1992-03-03 | 1994-09-13 | Mitsubishi Denki Kabushiki Kaisha | Magnetic thin film memory |
| US5329486A (en) | 1992-04-24 | 1994-07-12 | Motorola, Inc. | Ferromagnetic memory device |
| US5448515A (en) | 1992-09-02 | 1995-09-05 | Mitsubishi Denki Kabushiki Kaisha | Magnetic thin film memory and recording/reproduction method therefor |
| US5420819A (en) * | 1992-09-24 | 1995-05-30 | Nonvolatile Electronics, Incorporated | Method for sensing data in a magnetoresistive memory using large fractions of memory cell films for data storage |
| US5617071A (en) * | 1992-11-16 | 1997-04-01 | Nonvolatile Electronics, Incorporated | Magnetoresistive structure comprising ferromagnetic thin films and intermediate alloy layer having magnetic concentrator and shielding permeable masses |
| US5301079A (en) * | 1992-11-17 | 1994-04-05 | International Business Machines Corporation | Current biased magnetoresistive spin valve sensor |
| US5348894A (en) | 1993-01-27 | 1994-09-20 | Texas Instruments Incorporated | Method of forming electrical connections to high dielectric constant materials |
| US5343422A (en) | 1993-02-23 | 1994-08-30 | International Business Machines Corporation | Nonvolatile magnetoresistive storage device using spin valve effect |
| US5396455A (en) * | 1993-04-30 | 1995-03-07 | International Business Machines Corporation | Magnetic non-volatile random access memory |
| JP3179937B2 (ja) | 1993-05-01 | 2001-06-25 | 株式会社東芝 | 半導体装置 |
| US5349302A (en) | 1993-05-13 | 1994-09-20 | Honeywell Inc. | Sense amplifier input stage for single array memory |
| JP2629583B2 (ja) | 1993-05-13 | 1997-07-09 | 日本電気株式会社 | 磁気抵抗効果膜およびその製造方法 |
| DE4327458C2 (de) | 1993-08-16 | 1996-09-05 | Inst Mikrostrukturtechnologie | Sensorchip zur hochauflösenden Messung der magnetischen Feldstärke |
| JPH0766033A (ja) | 1993-08-30 | 1995-03-10 | Mitsubishi Electric Corp | 磁気抵抗素子ならびにその磁気抵抗素子を用いた磁性薄膜メモリおよび磁気抵抗センサ |
| JP3223480B2 (ja) | 1993-09-10 | 2001-10-29 | 本田技研工業株式会社 | 内燃エンジンの蒸発燃料処理装置 |
| US5477482A (en) | 1993-10-01 | 1995-12-19 | The United States Of America As Represented By The Secretary Of The Navy | Ultra high density, non-volatile ferromagnetic random access memory |
| US5408377A (en) * | 1993-10-15 | 1995-04-18 | International Business Machines Corporation | Magnetoresistive sensor with improved ferromagnetic sensing layer and magnetic recording system using the sensor |
| US5832534A (en) | 1994-01-04 | 1998-11-03 | Intel Corporation | Method and apparatus for maintaining cache coherency using a single controller for multiple cache memories |
| US5841611A (en) | 1994-05-02 | 1998-11-24 | Matsushita Electric Industrial Co., Ltd. | Magnetoresistance effect device and magnetoresistance effect type head, memory device, and amplifying device using the same |
| US5442508A (en) | 1994-05-25 | 1995-08-15 | Eastman Kodak Company | Giant magnetoresistive reproduce head having dual magnetoresistive sensor |
| US5528440A (en) | 1994-07-26 | 1996-06-18 | International Business Machines Corporation | Spin valve magnetoresistive element with longitudinal exchange biasing of end regions abutting the free layer, and magnetic recording system using the element |
| US5452243A (en) | 1994-07-27 | 1995-09-19 | Cypress Semiconductor Corporation | Fully static CAM cells with low write power and methods of matching and writing to the same |
| JPH0896328A (ja) | 1994-09-22 | 1996-04-12 | Sumitomo Metal Ind Ltd | 磁気抵抗効果型薄膜磁気ヘッド及びその製造方法 |
| EP0731969B1 (en) | 1994-10-05 | 1999-12-01 | Koninklijke Philips Electronics N.V. | Magnetic multilayer device including a resonant-tunneling double-barrier structure |
| US6045671A (en) | 1994-10-18 | 2000-04-04 | Symyx Technologies, Inc. | Systems and methods for the combinatorial synthesis of novel materials |
| US5985356A (en) | 1994-10-18 | 1999-11-16 | The Regents Of The University Of California | Combinatorial synthesis of novel materials |
| US5567523A (en) | 1994-10-19 | 1996-10-22 | Kobe Steel Research Laboratories, Usa, Applied Electronics Center | Magnetic recording medium comprising a carbon substrate, a silicon or aluminum nitride sub layer, and a barium hexaferrite magnetic layer |
| JP3714696B2 (ja) | 1994-10-21 | 2005-11-09 | 富士通株式会社 | 半導体記憶装置 |
| US5696923A (en) * | 1994-12-15 | 1997-12-09 | Texas Instruments Incorporated | Graphics processor writing to shadow register at predetermined address simultaneously with writing to control register |
| US5496759A (en) * | 1994-12-29 | 1996-03-05 | Honeywell Inc. | Highly producible magnetoresistive RAM process |
| US5534793A (en) | 1995-01-24 | 1996-07-09 | Texas Instruments Incorporated | Parallel antifuse routing scheme (PARS) circuit and method for field programmable gate arrays |
| US6004654A (en) | 1995-02-01 | 1999-12-21 | Tdk Corporation | Magnetic multilayer film, magnetoresistance element, and method for preparing magnetoresistance element |
| US5587943A (en) | 1995-02-13 | 1996-12-24 | Integrated Microtransducer Electronics Corporation | Nonvolatile magnetoresistive memory with fully closed flux operation |
| US5541868A (en) | 1995-02-21 | 1996-07-30 | The United States Of America As Represented By The Secretary Of The Navy | Annular GMR-based memory element |
| JPH08287422A (ja) | 1995-04-07 | 1996-11-01 | Alps Electric Co Ltd | 磁気抵抗効果型ヘッド |
| US6169687B1 (en) * | 1995-04-21 | 2001-01-02 | Mark B. Johnson | High density and speed magneto-electronic memory for use in computing system |
| US5585986A (en) | 1995-05-15 | 1996-12-17 | International Business Machines Corporation | Digital magnetoresistive sensor based on the giant magnetoresistance effect |
| JPH08321739A (ja) | 1995-05-25 | 1996-12-03 | Matsushita Electric Ind Co Ltd | 弾性表面波フィルタ |
| JP2778626B2 (ja) | 1995-06-02 | 1998-07-23 | 日本電気株式会社 | 磁気抵抗効果膜及びその製造方法並びに磁気抵抗効果素子 |
| WO1996041379A1 (en) | 1995-06-07 | 1996-12-19 | The Trustees Of Columbia University In The City Of New York | Wafer-scale integrated-circuit systems and method of manufacture |
| JP3560266B2 (ja) | 1995-08-31 | 2004-09-02 | 株式会社ルネサステクノロジ | 半導体装置及び半導体データ装置 |
| EP0768672B1 (en) | 1995-09-29 | 2001-04-04 | STMicroelectronics S.r.l. | Hierarchic memory device |
| US5702831A (en) | 1995-11-06 | 1997-12-30 | Motorola | Ferromagnetic GMR material |
| JP3767930B2 (ja) | 1995-11-13 | 2006-04-19 | 沖電気工業株式会社 | 情報の記録・再生方法および情報記憶装置 |
| US5659499A (en) | 1995-11-24 | 1997-08-19 | Motorola | Magnetic memory and method therefor |
| US5828578A (en) | 1995-11-29 | 1998-10-27 | S3 Incorporated | Microprocessor with a large cache shared by redundant CPUs for increasing manufacturing yield |
| JP3293437B2 (ja) * | 1995-12-19 | 2002-06-17 | 松下電器産業株式会社 | 磁気抵抗効果素子、磁気抵抗効果型ヘッド及びメモリー素子 |
| US5569617A (en) | 1995-12-21 | 1996-10-29 | Honeywell Inc. | Method of making integrated spacer for magnetoresistive RAM |
| US5712612A (en) * | 1996-01-02 | 1998-01-27 | Hewlett-Packard Company | Tunneling ferrimagnetic magnetoresistive sensor |
| JPH09199769A (ja) | 1996-01-19 | 1997-07-31 | Fujitsu Ltd | 磁気抵抗効果素子及び磁気センサ |
| US5909345A (en) * | 1996-02-22 | 1999-06-01 | Matsushita Electric Industrial Co., Ltd. | Magnetoresistive device and magnetoresistive head |
| US5635765A (en) * | 1996-02-26 | 1997-06-03 | Cypress Semiconductor Corporation | Multi-layer gate structure |
| US5650958A (en) | 1996-03-18 | 1997-07-22 | International Business Machines Corporation | Magnetic tunnel junctions with controlled magnetic response |
| US5764567A (en) | 1996-11-27 | 1998-06-09 | International Business Machines Corporation | Magnetic tunnel junction device with nonferromagnetic interface layer for improved magnetic field response |
| US6590750B2 (en) | 1996-03-18 | 2003-07-08 | International Business Machines Corporation | Limiting magnetoresistive electrical interaction to a preferred portion of a magnetic region in magnetic devices |
| US5640343A (en) | 1996-03-18 | 1997-06-17 | International Business Machines Corporation | Magnetic memory array using magnetic tunnel junction devices in the memory cells |
| US5835314A (en) | 1996-04-17 | 1998-11-10 | Massachusetts Institute Of Technology | Tunnel junction device for storage and switching of signals |
| JP2924785B2 (ja) | 1996-04-25 | 1999-07-26 | 日本電気株式会社 | 磁気抵抗効果素子薄膜及びその製造方法 |
| TW367493B (en) | 1996-04-30 | 1999-08-21 | Toshiba Corp | Reluctance component |
| JPH09306159A (ja) | 1996-05-14 | 1997-11-28 | Nippon Telegr & Teleph Corp <Ntt> | 逐次読出しメモリ |
| JPH09306733A (ja) | 1996-05-14 | 1997-11-28 | Sumitomo Metal Ind Ltd | 磁気抵抗効果膜 |
| JP3076244B2 (ja) | 1996-06-04 | 2000-08-14 | 日本電気株式会社 | 多層配線の研磨方法 |
| JPH09325746A (ja) | 1996-06-07 | 1997-12-16 | Sharp Corp | 電子機器 |
| JP3137580B2 (ja) | 1996-06-14 | 2001-02-26 | ティーディーケイ株式会社 | 磁性多層膜、磁気抵抗効果素子および磁気変換素子 |
| US5732016A (en) * | 1996-07-02 | 1998-03-24 | Motorola | Memory cell structure in a magnetic random access memory and a method for fabricating thereof |
| JPH1041132A (ja) | 1996-07-18 | 1998-02-13 | Sanyo Electric Co Ltd | 磁気抵抗効果膜 |
| US5905996A (en) * | 1996-07-29 | 1999-05-18 | Micron Technology, Inc. | Combined cache tag and data memory architecture |
| JP2856165B2 (ja) | 1996-08-12 | 1999-02-10 | 日本電気株式会社 | 磁気抵抗効果素子及びその製造方法 |
| US5920500A (en) | 1996-08-23 | 1999-07-06 | Motorola, Inc. | Magnetic random access memory having stacked memory cells and fabrication method therefor |
| US5745408A (en) * | 1996-09-09 | 1998-04-28 | Motorola, Inc. | Multi-layer magnetic memory cell with low switching current |
| US5734605A (en) | 1996-09-10 | 1998-03-31 | Motorola, Inc. | Multi-layer magnetic tunneling junction memory cells |
| US6249406B1 (en) | 1996-09-23 | 2001-06-19 | International Business Machines Corporation | Magnetoresistive sensor with a soft adjacent layer having high magnetization, high resistivity, low intrinsic anisotropy and near zero magnetostriction |
| US5894447A (en) * | 1996-09-26 | 1999-04-13 | Kabushiki Kaisha Toshiba | Semiconductor memory device including a particular memory cell block structure |
| JP3450657B2 (ja) | 1997-07-16 | 2003-09-29 | 株式会社東芝 | 半導体記憶装置 |
| US5861328A (en) * | 1996-10-07 | 1999-01-19 | Motorola, Inc. | Method of fabricating GMR devices |
| US5699293A (en) | 1996-10-09 | 1997-12-16 | Motorola | Method of operating a random access memory device having a plurality of pairs of memory cells as the memory device |
| US5835406A (en) | 1996-10-24 | 1998-11-10 | Micron Quantum Devices, Inc. | Apparatus and method for selecting data bits read from a multistate memory |
| US5757056A (en) * | 1996-11-12 | 1998-05-26 | University Of Delaware | Multiple magnetic tunnel structures |
| US5801984A (en) | 1996-11-27 | 1998-09-01 | International Business Machines Corporation | Magnetic tunnel junction device with ferromagnetic multilayer having fixed magnetic moment |
| US5729410A (en) * | 1996-11-27 | 1998-03-17 | International Business Machines Corporation | Magnetic tunnel junction device with longitudinal biasing |
| JPH10162568A (ja) | 1996-12-02 | 1998-06-19 | Toshiba Corp | 半導体記憶装置 |
| US5748519A (en) * | 1996-12-13 | 1998-05-05 | Motorola, Inc. | Method of selecting a memory cell in a magnetic random access memory device |
| US5761110A (en) | 1996-12-23 | 1998-06-02 | Lsi Logic Corporation | Memory cell capable of storing more than two logic states by using programmable resistances |
| JP3325478B2 (ja) * | 1996-12-27 | 2002-09-17 | ワイケイケイ株式会社 | 磁気抵抗効果素子および磁気検出器並びにその使用方法 |
| US5902690A (en) * | 1997-02-25 | 1999-05-11 | Motorola, Inc. | Stray magnetic shielding for a non-volatile MRAM |
| US5804485A (en) | 1997-02-25 | 1998-09-08 | Miracle Technology Co Ltd | High density metal gate MOS fabrication process |
| EP0865079A3 (en) | 1997-03-13 | 1999-10-20 | Applied Materials, Inc. | A method for removing redeposited veils from etched platinum surfaces |
| JPH10270776A (ja) | 1997-03-25 | 1998-10-09 | Sanyo Electric Co Ltd | 磁気抵抗効果膜の製造方法 |
| JP2871670B1 (ja) | 1997-03-26 | 1999-03-17 | 富士通株式会社 | 強磁性トンネル接合磁気センサ、その製造方法、磁気ヘッド、および磁気記録/再生装置 |
| JP3735443B2 (ja) | 1997-04-03 | 2006-01-18 | 株式会社東芝 | 交換結合膜とそれを用いた磁気抵抗効果素子、磁気ヘッドおよび磁気記憶装置 |
| US5926414A (en) | 1997-04-04 | 1999-07-20 | Magnetic Semiconductors | High-efficiency miniature magnetic integrated circuit structures |
| US5768181A (en) | 1997-04-07 | 1998-06-16 | Motorola, Inc. | Magnetic device having multi-layer with insulating and conductive layers |
| US5898612A (en) * | 1997-05-22 | 1999-04-27 | Motorola, Inc. | Magnetic memory cell with increased GMR ratio |
| US5774394A (en) | 1997-05-22 | 1998-06-30 | Motorola, Inc. | Magnetic memory cell with increased GMR ratio |
| US5917749A (en) | 1997-05-23 | 1999-06-29 | Motorola, Inc. | MRAM cell requiring low switching field |
| JPH10334695A (ja) | 1997-05-27 | 1998-12-18 | Toshiba Corp | キャッシュメモリ及び情報処理システム |
| US5856008A (en) * | 1997-06-05 | 1999-01-05 | Lucent Technologies Inc. | Article comprising magnetoresistive material |
| US6134060A (en) | 1997-06-10 | 2000-10-17 | Stmicroelectronics, Inc. | Current bias, current sense for magneto-resistive preamplifier, preamplifying integrated circuit, and related methods |
| US5838608A (en) | 1997-06-16 | 1998-11-17 | Motorola, Inc. | Multi-layer magnetic random access memory and method for fabricating thereof |
| US5949696A (en) | 1997-06-30 | 1999-09-07 | Cypress Semiconductor Corporation | Differential dynamic content addressable memory and high speed network address filtering |
| US5804250A (en) | 1997-07-28 | 1998-09-08 | Eastman Kodak Company | Method for fabricating stable magnetoresistive sensors |
| JPH1168192A (ja) * | 1997-08-18 | 1999-03-09 | Hitachi Ltd | 多重トンネル接合、トンネル磁気抵抗効果素子、磁気センサおよび磁気記録センサヘッド |
| US6111784A (en) | 1997-09-18 | 2000-08-29 | Canon Kabushiki Kaisha | Magnetic thin film memory element utilizing GMR effect, and recording/reproduction method using such memory element |
| US5990011A (en) | 1997-09-18 | 1999-11-23 | Micron Technology, Inc. | Titanium aluminum alloy wetting layer for improved aluminum filling of damescene trenches |
| DE19744095A1 (de) | 1997-10-06 | 1999-04-15 | Siemens Ag | Speicherzellenanordnung |
| US5966012A (en) | 1997-10-07 | 1999-10-12 | International Business Machines Corporation | Magnetic tunnel junction device with improved fixed and free ferromagnetic layers |
| US5831920A (en) | 1997-10-14 | 1998-11-03 | Motorola, Inc. | GMR device having a sense amplifier protected by a circuit for dissipating electric charges |
| US5985365A (en) | 1997-10-17 | 1999-11-16 | Galvanizing Services Co., Inc. | Method and automated apparatus for galvanizing threaded rods |
| US6120842A (en) | 1997-10-21 | 2000-09-19 | Texas Instruments Incorporated | TiN+Al films and processes |
| JPH11134620A (ja) * | 1997-10-30 | 1999-05-21 | Nec Corp | 強磁性トンネル接合素子センサ及びその製造方法 |
| US6188549B1 (en) * | 1997-12-10 | 2001-02-13 | Read-Rite Corporation | Magnetoresistive read/write head with high-performance gap layers |
| US6048739A (en) * | 1997-12-18 | 2000-04-11 | Honeywell Inc. | Method of manufacturing a high density magnetic memory device |
| US5966323A (en) * | 1997-12-18 | 1999-10-12 | Motorola, Inc. | Low switching field magnetoresistive tunneling junction for high density arrays |
| US5959880A (en) | 1997-12-18 | 1999-09-28 | Motorola, Inc. | Low aspect ratio magnetoresistive tunneling junction |
| US5956267A (en) | 1997-12-18 | 1999-09-21 | Honeywell Inc | Self-aligned wordline keeper and method of manufacture therefor |
| US5852574A (en) | 1997-12-24 | 1998-12-22 | Motorola, Inc. | High density magnetoresistive random access memory device and operating method thereof |
| US6169303B1 (en) | 1998-01-06 | 2001-01-02 | Hewlett-Packard Company | Ferromagnetic tunnel junctions with enhanced magneto-resistance |
| US6072718A (en) | 1998-02-10 | 2000-06-06 | International Business Machines Corporation | Magnetic memory devices having multiple magnetic tunnel junctions therein |
| US5946228A (en) | 1998-02-10 | 1999-08-31 | International Business Machines Corporation | Limiting magnetic writing fields to a preferred portion of a changeable magnetic region in magnetic devices |
| US6180444B1 (en) * | 1998-02-18 | 2001-01-30 | International Business Machines Corporation | Semiconductor device having ultra-sharp P-N junction and method of manufacturing the same |
| US6069820A (en) * | 1998-02-20 | 2000-05-30 | Kabushiki Kaisha Toshiba | Spin dependent conduction device |
| US5943574A (en) | 1998-02-23 | 1999-08-24 | Motorola, Inc. | Method of fabricating 3D multilayer semiconductor circuits |
| US5930164A (en) | 1998-02-26 | 1999-07-27 | Motorola, Inc. | Magnetic memory unit having four states and operating method thereof |
| US5986925A (en) | 1998-04-07 | 1999-11-16 | Motorola, Inc. | Magnetoresistive random access memory device providing simultaneous reading of two cells and operating method |
| JPH11316913A (ja) | 1998-04-30 | 1999-11-16 | Sony Corp | 磁気抵抗効果型磁気ヘッド |
| US6738236B1 (en) | 1998-05-07 | 2004-05-18 | Seagate Technology Llc | Spin valve/GMR sensor using synthetic antiferromagnetic layer pinned by Mn-alloy having a high blocking temperature |
| EP0973169B1 (en) * | 1998-05-13 | 2005-01-26 | Sony Corporation | Element exploiting magnetic material and addressing method therefor |
| US6127045A (en) | 1998-05-13 | 2000-10-03 | International Business Machines Corporation | Magnetic tunnel junction device with optimized ferromagnetic layer |
| US6055179A (en) * | 1998-05-19 | 2000-04-25 | Canon Kk | Memory device utilizing giant magnetoresistance effect |
| US6175475B1 (en) * | 1998-05-27 | 2001-01-16 | International Business Machines Corporation | Fully-pinned, flux-closed spin valve |
| DE19823826A1 (de) * | 1998-05-28 | 1999-12-02 | Burkhard Hillebrands | MRAM-Speicher sowie Verfahren zum Lesen/Schreiben digitaler Information in einen derartigen Speicher |
| US6114719A (en) | 1998-05-29 | 2000-09-05 | International Business Machines Corporation | Magnetic tunnel junction memory cell with in-stack biasing of the free ferromagnetic layer and memory array using the cell |
| US6005753A (en) | 1998-05-29 | 1999-12-21 | International Business Machines Corporation | Magnetic tunnel junction magnetoresistive read head with longitudinal and transverse bias |
| US6023395A (en) * | 1998-05-29 | 2000-02-08 | International Business Machines Corporation | Magnetic tunnel junction magnetoresistive sensor with in-stack biasing |
| US6081446A (en) | 1998-06-03 | 2000-06-27 | Hewlett-Packard Company | Multiple bit magnetic memory cell |
| JP2000090418A (ja) | 1998-09-16 | 2000-03-31 | Toshiba Corp | 磁気抵抗効果素子および磁気記録装置 |
| JP3234814B2 (ja) * | 1998-06-30 | 2001-12-04 | 株式会社東芝 | 磁気抵抗効果素子、磁気ヘッド、磁気ヘッドアセンブリ及び磁気記録装置 |
| US6313973B1 (en) | 1998-06-30 | 2001-11-06 | Kabushiki Kaisha Toshiba | Laminated magnetorestrictive element of an exchange coupling film, an antiferromagnetic film and a ferromagnetic film and a magnetic disk drive using same |
| DE19830343C1 (de) | 1998-07-07 | 2000-04-06 | Siemens Ag | Verfahren zur Herstellung eines Schichtaufbaus umfassend ein AAF-System sowie magnetoresistive Sensorsysteme |
| EP0971424A3 (en) | 1998-07-10 | 2004-08-25 | Interuniversitair Microelektronica Centrum Vzw | Spin-valve structure and method for making spin-valve structures |
| WO2000004555A2 (de) * | 1998-07-15 | 2000-01-27 | Infineon Technologies Ag | Speicherzellenanordnung, bei der ein elektrischer widerstand eines speicherelements eine information darstellt und durch ein magnetfeld beeinflussbar ist, und verfahren zu deren herstellung |
| US6097625A (en) | 1998-07-16 | 2000-08-01 | International Business Machines Corporation | Magnetic random access memory (MRAM) array with magnetic tunnel junction (MTJ) cells and remote diodes |
| US6083764A (en) | 1998-07-20 | 2000-07-04 | Motorola, Inc. | Method of fabricating an MTJ with low areal resistance |
| US5946227A (en) | 1998-07-20 | 1999-08-31 | Motorola, Inc. | Magnetoresistive random access memory with shared word and digit lines |
| US5953248A (en) * | 1998-07-20 | 1999-09-14 | Motorola, Inc. | Low switching field magnetic tunneling junction for high density arrays |
| US6195240B1 (en) * | 1998-07-31 | 2001-02-27 | International Business Machines Corporation | Spin valve head with diffusion barrier |
| US6111781A (en) | 1998-08-03 | 2000-08-29 | Motorola, Inc. | Magnetic random access memory array divided into a plurality of memory banks |
| DE19836567C2 (de) | 1998-08-12 | 2000-12-07 | Siemens Ag | Speicherzellenanordnung mit Speicherelementen mit magnetoresistivem Effekt und Verfahren zu deren Herstellung |
| US5982660A (en) | 1998-08-27 | 1999-11-09 | Hewlett-Packard Company | Magnetic memory cell with off-axis reference layer orientation for improved response |
| US5940319A (en) | 1998-08-31 | 1999-08-17 | Motorola, Inc. | Magnetic random access memory and fabricating method thereof |
| US6072717A (en) * | 1998-09-04 | 2000-06-06 | Hewlett Packard | Stabilized magnetic memory cell |
| JP2000099923A (ja) | 1998-09-17 | 2000-04-07 | Sony Corp | 磁気トンネル素子及びその製造方法 |
| US6172903B1 (en) * | 1998-09-22 | 2001-01-09 | Canon Kabushiki Kaisha | Hybrid device, memory apparatus using such hybrid devices and information reading method |
| TW440835B (en) * | 1998-09-30 | 2001-06-16 | Siemens Ag | Magnetoresistive memory with raised interference security |
| US6016269A (en) * | 1998-09-30 | 2000-01-18 | Motorola, Inc. | Quantum random address memory with magnetic readout and/or nano-memory elements |
| US6330136B1 (en) | 1998-10-14 | 2001-12-11 | Read-Rite Corporation | Magnetic read sensor with SDT tri-layer and method for making same |
| JP2000132961A (ja) | 1998-10-23 | 2000-05-12 | Canon Inc | 磁気薄膜メモリ、磁気薄膜メモリの読出し方法、及び磁気薄膜メモリの書込み方法 |
| US6178074B1 (en) * | 1998-11-19 | 2001-01-23 | International Business Machines Corporation | Double tunnel junction with magnetoresistance enhancement layer |
| US6055178A (en) * | 1998-12-18 | 2000-04-25 | Motorola, Inc. | Magnetic random access memory with a reference memory array |
| US6175515B1 (en) * | 1998-12-31 | 2001-01-16 | Honeywell International Inc. | Vertically integrated magnetic memory |
| JP3773031B2 (ja) | 1999-01-13 | 2006-05-10 | インフィネオン テクノロジーズ アクチエンゲゼルシャフト | Mram用の読出/書込構造 |
| US6469878B1 (en) | 1999-02-11 | 2002-10-22 | Seagate Technology Llc | Data head and method using a single antiferromagnetic material to pin multiple magnetic layers with differing orientation |
| US6567246B1 (en) * | 1999-03-02 | 2003-05-20 | Matsushita Electric Industrial Co., Ltd. | Magnetoresistance effect element and method for producing the same, and magnetoresistance effect type head, magnetic recording apparatus, and magnetoresistance effect memory element |
| US6391483B1 (en) | 1999-03-30 | 2002-05-21 | Carnegie Mellon University | Magnetic device and method of forming same |
| JP3587439B2 (ja) | 1999-03-31 | 2004-11-10 | 株式会社東芝 | 磁性体トンネル接合素子 |
| US6191972B1 (en) * | 1999-04-30 | 2001-02-20 | Nec Corporation | Magnetic random access memory circuit |
| US6295225B1 (en) | 1999-05-14 | 2001-09-25 | U.S. Philips Corporation | Magnetic tunnel junction device having an intermediate layer |
| US6165803A (en) | 1999-05-17 | 2000-12-26 | Motorola, Inc. | Magnetic random access memory and fabricating method thereof |
| US6330137B1 (en) | 1999-06-11 | 2001-12-11 | Read-Rite Corporation | Magnetoresistive read sensor including a carbon barrier layer and method for making same |
| US6436526B1 (en) * | 1999-06-17 | 2002-08-20 | Matsushita Electric Industrial Co., Ltd. | Magneto-resistance effect element, magneto-resistance effect memory cell, MRAM and method for performing information write to or read from the magneto-resistance effect memory cell |
| JP2001007420A (ja) | 1999-06-17 | 2001-01-12 | Sony Corp | 磁気抵抗効果膜とこれを用いた磁気読取りセンサ |
| JP3592140B2 (ja) * | 1999-07-02 | 2004-11-24 | Tdk株式会社 | トンネル磁気抵抗効果型ヘッド |
| US6343032B1 (en) * | 1999-07-07 | 2002-01-29 | Iowa State University Research Foundation, Inc. | Non-volatile spin dependent tunnel junction circuit |
| US6292389B1 (en) | 1999-07-19 | 2001-09-18 | Motorola, Inc. | Magnetic element with improved field response and fabricating method thereof |
| US6275363B1 (en) | 1999-07-23 | 2001-08-14 | International Business Machines Corporation | Read head with dual tunnel junction sensor |
| US6383574B1 (en) * | 1999-07-23 | 2002-05-07 | Headway Technologies, Inc. | Ion implantation method for fabricating magnetoresistive (MR) sensor element |
| US6097626A (en) | 1999-07-28 | 2000-08-01 | Hewlett-Packard Company | MRAM device using magnetic field bias to suppress inadvertent switching of half-selected memory cells |
| US6134139A (en) | 1999-07-28 | 2000-10-17 | Hewlett-Packard | Magnetic memory structure with improved half-select margin |
| US6163477A (en) | 1999-08-06 | 2000-12-19 | Hewlett Packard Company | MRAM device using magnetic field bias to improve reproducibility of memory cell switching |
| JP2001068760A (ja) | 1999-08-31 | 2001-03-16 | Hitachi Ltd | 強磁性トンネル接合素子 |
| US6259586B1 (en) | 1999-09-02 | 2001-07-10 | International Business Machines Corporation | Magnetic tunnel junction sensor with AP-coupled free layer |
| US6166948A (en) | 1999-09-03 | 2000-12-26 | International Business Machines Corporation | Magnetic memory array with magnetic tunnel junction memory cells having flux-closed free layers |
| JP2001084756A (ja) | 1999-09-17 | 2001-03-30 | Sony Corp | 磁化駆動方法、磁気機能素子および磁気装置 |
| US6052302A (en) * | 1999-09-27 | 2000-04-18 | Motorola, Inc. | Bit-wise conditional write method and system for an MRAM |
| US6292336B1 (en) | 1999-09-30 | 2001-09-18 | Headway Technologies, Inc. | Giant magnetoresistive (GMR) sensor element with enhanced magnetoresistive (MR) coefficient |
| US6609174B1 (en) | 1999-10-19 | 2003-08-19 | Motorola, Inc. | Embedded MRAMs including dual read ports |
| US6205052B1 (en) | 1999-10-21 | 2001-03-20 | Motorola, Inc. | Magnetic element with improved field response and fabricating method thereof |
| US6169689B1 (en) * | 1999-12-08 | 2001-01-02 | Motorola, Inc. | MTJ stacked cell memory sensing method and apparatus |
| DE60026104T2 (de) | 1999-12-13 | 2006-09-28 | Konica Corp. | Elektrophotographischer Photorezeptor und elektrophotographisches Bildherstellungsverfahren, elektrophotographisches Bilderzeugungsverfahren und Arbeitseinheit |
| US6285581B1 (en) | 1999-12-13 | 2001-09-04 | Motorola, Inc. | MRAM having semiconductor device integrated therein |
| US6473336B2 (en) | 1999-12-16 | 2002-10-29 | Kabushiki Kaisha Toshiba | Magnetic memory device |
| US6233172B1 (en) | 1999-12-17 | 2001-05-15 | Motorola, Inc. | Magnetic element with dual magnetic states and fabrication method thereof |
| JP2001184870A (ja) * | 1999-12-27 | 2001-07-06 | Mitsubishi Electric Corp | 連想メモリ装置およびそれを用いた可変長符号復号装置 |
| US6322640B1 (en) | 2000-01-24 | 2001-11-27 | Headway Technologies, Inc. | Multiple thermal annealing method for forming antiferromagnetic exchange biased magnetoresistive (MR) sensor element |
| US6185143B1 (en) | 2000-02-04 | 2001-02-06 | Hewlett-Packard Company | Magnetic random access memory (MRAM) device including differential sense amplifiers |
| US6317299B1 (en) | 2000-02-17 | 2001-11-13 | International Business Machines Corporation | Seed layer for improving pinning field spin valve sensor |
| US6911710B2 (en) * | 2000-03-09 | 2005-06-28 | Hewlett-Packard Development Company, L.P. | Multi-bit magnetic memory cells |
| TW495745B (en) | 2000-03-09 | 2002-07-21 | Koninkl Philips Electronics Nv | Magnetic field element having a biasing magnetic layer structure |
| US6211090B1 (en) * | 2000-03-21 | 2001-04-03 | Motorola, Inc. | Method of fabricating flux concentrating layer for use with magnetoresistive random access memories |
| US6281538B1 (en) | 2000-03-22 | 2001-08-28 | Motorola, Inc. | Multi-layer tunneling device with a graded stoichiometry insulating layer |
| DE10113853B4 (de) * | 2000-03-23 | 2009-08-06 | Sharp K.K. | Magnetspeicherelement und Magnetspeicher |
| US6205073B1 (en) * | 2000-03-31 | 2001-03-20 | Motorola, Inc. | Current conveyor and method for readout of MTJ memories |
| US6331944B1 (en) | 2000-04-13 | 2001-12-18 | International Business Machines Corporation | Magnetic random access memory using a series tunnel element select mechanism |
| US6269018B1 (en) | 2000-04-13 | 2001-07-31 | International Business Machines Corporation | Magnetic random access memory using current through MTJ write mechanism |
| DE10020128A1 (de) | 2000-04-14 | 2001-10-18 | Infineon Technologies Ag | MRAM-Speicher |
| JP3800925B2 (ja) * | 2000-05-15 | 2006-07-26 | 日本電気株式会社 | 磁気ランダムアクセスメモリ回路 |
| US6317376B1 (en) | 2000-06-20 | 2001-11-13 | Hewlett-Packard Company | Reference signal generation for magnetic random access memory devices |
| US6269040B1 (en) | 2000-06-26 | 2001-07-31 | International Business Machines Corporation | Interconnection network for connecting memory cells to sense amplifiers |
| DE10032271C2 (de) | 2000-07-03 | 2002-08-01 | Infineon Technologies Ag | MRAM-Anordnung |
| DE10036140C1 (de) * | 2000-07-25 | 2001-12-20 | Infineon Technologies Ag | Verfahren und Anordnung zum zerstörungsfreien Auslesen von Speicherzellen eines MRAM-Speichers |
| JP4309075B2 (ja) * | 2000-07-27 | 2009-08-05 | 株式会社東芝 | 磁気記憶装置 |
| JP2002050011A (ja) | 2000-08-03 | 2002-02-15 | Nec Corp | 磁気抵抗効果素子、磁気抵抗効果ヘッド、磁気抵抗変換システム及び磁気記録システム |
| US6363007B1 (en) * | 2000-08-14 | 2002-03-26 | Micron Technology, Inc. | Magneto-resistive memory with shared wordline and sense line |
| US6392922B1 (en) * | 2000-08-14 | 2002-05-21 | Micron Technology, Inc. | Passivated magneto-resistive bit structure and passivation method therefor |
| US6493259B1 (en) | 2000-08-14 | 2002-12-10 | Micron Technology, Inc. | Pulse write techniques for magneto-resistive memories |
| US6538921B2 (en) * | 2000-08-17 | 2003-03-25 | Nve Corporation | Circuit selection of magnetic memory cells and related cell structures |
| DE10041378C1 (de) * | 2000-08-23 | 2002-05-16 | Infineon Technologies Ag | MRAM-Anordnung |
| JP3075807U (ja) * | 2000-08-23 | 2001-03-06 | 船井電機株式会社 | 磁気テープ装置 |
| US6331943B1 (en) | 2000-08-28 | 2001-12-18 | Motorola, Inc. | MTJ MRAM series-parallel architecture |
| DE10043440C2 (de) * | 2000-09-04 | 2002-08-29 | Infineon Technologies Ag | Magnetoresistiver Speicher und Verfahren zu seinem Auslesen |
| JP4693292B2 (ja) * | 2000-09-11 | 2011-06-01 | 株式会社東芝 | 強磁性トンネル接合素子およびその製造方法 |
| US6487110B2 (en) | 2000-09-27 | 2002-11-26 | Canon Kabushiki Kaisha | Nonvolatile solid-state memory device using magnetoresistive effect and recording and reproducing method of the same |
| US6314020B1 (en) | 2000-09-29 | 2001-11-06 | Motorola, Inc. | Analog functional module using magnetoresistive memory technology |
| US6272040B1 (en) | 2000-09-29 | 2001-08-07 | Motorola, Inc. | System and method for programming a magnetoresistive memory device |
| JP4726290B2 (ja) * | 2000-10-17 | 2011-07-20 | ルネサスエレクトロニクス株式会社 | 半導体集積回路 |
| JP2002141481A (ja) | 2000-11-01 | 2002-05-17 | Canon Inc | 強磁性体メモリおよびその動作方法 |
| US6538919B1 (en) * | 2000-11-08 | 2003-03-25 | International Business Machines Corporation | Magnetic tunnel junctions using ferrimagnetic materials |
| US6555858B1 (en) | 2000-11-15 | 2003-04-29 | Motorola, Inc. | Self-aligned magnetic clad write line and its method of formation |
| US6625057B2 (en) | 2000-11-17 | 2003-09-23 | Kabushiki Kaisha Toshiba | Magnetoresistive memory device |
| US6429497B1 (en) | 2000-11-18 | 2002-08-06 | Hewlett-Packard Company | Method for improving breakdown voltage in magnetic tunnel junctions |
| JP2002170374A (ja) | 2000-11-28 | 2002-06-14 | Canon Inc | 強磁性体不揮発性記憶素子およびその情報再生方法ならびにそれを用いたメモリチップおよび携帯型情報処理装置 |
| DE10062570C1 (de) | 2000-12-15 | 2002-06-13 | Infineon Technologies Ag | Schaltungsanordnung zur Steuerung von Schreib- und Lesevorgängen in einer magnetoresistiven Speicheranordnung (MRAM) |
| JP3920565B2 (ja) | 2000-12-26 | 2007-05-30 | 株式会社東芝 | 磁気ランダムアクセスメモリ |
| US6351409B1 (en) * | 2001-01-04 | 2002-02-26 | Motorola, Inc. | MRAM write apparatus and method |
| US6594176B2 (en) | 2001-01-24 | 2003-07-15 | Infineon Technologies Ag | Current source and drain arrangement for magnetoresistive memories (MRAMs) |
| US6426907B1 (en) | 2001-01-24 | 2002-07-30 | Infineon Technologies North America Corp. | Reference for MRAM cell |
| US6418046B1 (en) | 2001-01-30 | 2002-07-09 | Motorola, Inc. | MRAM architecture and system |
| US6385109B1 (en) * | 2001-01-30 | 2002-05-07 | Motorola, Inc. | Reference voltage generator for MRAM and method |
| US6515895B2 (en) * | 2001-01-31 | 2003-02-04 | Motorola, Inc. | Non-volatile magnetic register |
| US6358756B1 (en) * | 2001-02-07 | 2002-03-19 | Micron Technology, Inc. | Self-aligned, magnetoresistive random-access memory (MRAM) structure utilizing a spacer containment scheme |
| US6392923B1 (en) * | 2001-02-27 | 2002-05-21 | Motorola, Inc. | Magnetoresistive midpoint generator and method |
| US6475812B2 (en) | 2001-03-09 | 2002-11-05 | Hewlett Packard Company | Method for fabricating cladding layer in top conductor |
| JP3576111B2 (ja) | 2001-03-12 | 2004-10-13 | 株式会社東芝 | 磁気抵抗効果素子 |
| US6404674B1 (en) | 2001-04-02 | 2002-06-11 | Hewlett Packard Company Intellectual Property Administrator | Cladded read-write conductor for a pinned-on-the-fly soft reference layer |
| US6392924B1 (en) * | 2001-04-06 | 2002-05-21 | United Microelectronics Corp. | Array for forming magnetoresistive random access memory with pseudo spin valve |
| JP2002334585A (ja) | 2001-05-02 | 2002-11-22 | Sony Corp | 半導体記憶装置 |
| US6430084B1 (en) | 2001-08-27 | 2002-08-06 | Motorola, Inc. | Magnetic random access memory having digit lines and bit lines with a ferromagnetic cladding layer |
| US6445612B1 (en) | 2001-08-27 | 2002-09-03 | Motorola, Inc. | MRAM with midpoint generator reference and method for readout |
| EP1423861A1 (en) * | 2001-08-30 | 2004-06-02 | Koninklijke Philips Electronics N.V. | Magnetoresistive device and electronic device |
| US6576969B2 (en) | 2001-09-25 | 2003-06-10 | Hewlett-Packard Development Company, L.P. | Magneto-resistive device having soft reference layer |
| US6545906B1 (en) * | 2001-10-16 | 2003-04-08 | Motorola, Inc. | Method of writing to scalable magnetoresistance random access memory element |
| US6531723B1 (en) * | 2001-10-16 | 2003-03-11 | Motorola, Inc. | Magnetoresistance random access memory for improved scalability |
| US6720597B2 (en) * | 2001-11-13 | 2004-04-13 | Motorola, Inc. | Cladding of a conductive interconnect for programming a MRAM device using multiple magnetic layers |
| US6501144B1 (en) | 2001-11-13 | 2002-12-31 | Motorola, Inc. | Conductive line with multiple turns for programming a MRAM device |
| US6633498B1 (en) | 2002-06-18 | 2003-10-14 | Motorola, Inc. | Magnetoresistive random access memory with reduced switching field |
-
2001
- 2001-10-16 US US09/978,859 patent/US6545906B1/en not_active Expired - Lifetime
-
2002
- 2002-09-24 KR KR1020047006280A patent/KR100898875B1/ko not_active Expired - Lifetime
- 2002-09-24 EP EP02761824A patent/EP1474807A2/en not_active Withdrawn
- 2002-09-24 AU AU2002327059A patent/AU2002327059A1/en not_active Abandoned
- 2002-09-24 WO PCT/US2002/030437 patent/WO2003034437A2/en not_active Ceased
- 2002-09-24 CN CN028227050A patent/CN1610949B/zh not_active Expired - Lifetime
- 2002-09-24 JP JP2003537077A patent/JP4292239B2/ja not_active Expired - Lifetime
- 2002-10-08 TW TW091123192A patent/TW583666B/zh not_active IP Right Cessation
-
2003
- 2003-01-09 US US10/339,378 patent/US7184300B2/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7508727B2 (en) | 2005-12-30 | 2009-03-24 | Industrial Technology Research Institute | Memory structure and data writing method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2003034437A3 (en) | 2003-08-07 |
| JP2005505889A (ja) | 2005-02-24 |
| HK1075321A1 (zh) | 2005-12-09 |
| WO2003034437A2 (en) | 2003-04-24 |
| JP4292239B2 (ja) | 2009-07-08 |
| US6545906B1 (en) | 2003-04-08 |
| US20030072174A1 (en) | 2003-04-17 |
| EP1474807A2 (en) | 2004-11-10 |
| CN1610949B (zh) | 2010-06-09 |
| US7184300B2 (en) | 2007-02-27 |
| AU2002327059A1 (en) | 2003-04-28 |
| CN1610949A (zh) | 2005-04-27 |
| KR100898875B1 (ko) | 2009-05-25 |
| US20030128603A1 (en) | 2003-07-10 |
| KR20040058244A (ko) | 2004-07-03 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TW583666B (en) | A method of writing to a scalable magnetoresistance random access memory element | |
| US6633498B1 (en) | Magnetoresistive random access memory with reduced switching field | |
| TW574687B (en) | Magnetoresistance random access memory for improved scalability | |
| JP5414681B2 (ja) | 電流によって誘起されるスピン運動量移動に基づいた、高速かつ低電力な磁気デバイス | |
| CN101861622B (zh) | 具有减小的电流密度的磁性元件 | |
| CN100507591C (zh) | 用于磁电子器件的合成反铁磁结构 | |
| US6956764B2 (en) | Method of writing to a multi-state magnetic random access memory cell | |
| TW200410247A (en) | Magnetoresistance random access memory | |
| JP2001267523A (ja) | 対称的なスイッチング特性を有する磁気メモリセル | |
| US10296824B2 (en) | Fabrication methods of memory subsystem used in CNN based digital IC for AI | |
| JP2010135512A (ja) | 抵抗変化型メモリデバイス | |
| TWI274345B (en) | Memory | |
| TW202333387A (zh) | 磁阻元件及磁性記憶體 | |
| US12361996B1 (en) | System and method for spin orbit torque based memory device | |
| HK1075321B (zh) | 一種切換磁電阻存儲器件的方法和磁電阻陣列 | |
| JP2003503835A (ja) | 低スイッチング磁界で動作するmramセル |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MK4A | Expiration of patent term of an invention patent |