TW346669B - Method for improving the stability of SRAM memory unit - Google Patents
Method for improving the stability of SRAM memory unitInfo
- Publication number
- TW346669B TW346669B TW086117132A TW86117132A TW346669B TW 346669 B TW346669 B TW 346669B TW 086117132 A TW086117132 A TW 086117132A TW 86117132 A TW86117132 A TW 86117132A TW 346669 B TW346669 B TW 346669B
- Authority
- TW
- Taiwan
- Prior art keywords
- diffusion region
- gate
- type
- ion diffusion
- type light
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 2
- 150000002500 ions Chemical class 0.000 abstract 10
- 238000009792 diffusion process Methods 0.000 abstract 9
- 238000005468 ion implantation Methods 0.000 abstract 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 2
- 229920005591 polysilicon Polymers 0.000 abstract 2
- 239000004065 semiconductor Substances 0.000 abstract 2
- 239000000758 substrate Substances 0.000 abstract 2
- 238000005530 etching Methods 0.000 abstract 1
- 239000012212 insulator Substances 0.000 abstract 1
- 238000002955 isolation Methods 0.000 abstract 1
- 229920002120 photoresistant polymer Polymers 0.000 abstract 1
Landscapes
- Semiconductor Memories (AREA)
Abstract
A method for improving the stability of SRAM memory unit, which comprises the following steps: (a) forming a gate oxide layer on a P-type semiconductor substrate formed with an isolation region; (b) forming a polysilicon layer on the gate oxide layer; (c) selectively etching the polysilicon layer thereby separately forming a gate of an access transistor and a gate of a pull down transistor; (d) applying a light N-type ion implantation thereby forming a first N-type light ion diffusion region on the P-type semiconductor substrate on the both sides of the gate of the access transistor and the gate of the pull down transistor; (e) forming a photoresist thereby exposing a first N-type light ion diffusion region of the access transistor, and covering the gate and the first N-type light ion diffusion region of the pull-down transistor; (f) applying a P-type ion implantation step thereby adjusting the first N-type light ion diffusion region of the access transistor into a second N-type light ion diffusion region, in which the concentration of the second N-type light ion diffusion region is smaller than that of the first N-type light ion diffusion region; (g) forming a sidewall insulator on the sidewalls of the gate of the access transistor and the gate of the pull down transistor; and (h) applying a heavy N-type ion implantation thereby implanting a high concentration of N-type ions in the second N-type light ion diffusion region of the access transistor, and the first N-type light ion diffusion region of the pull down transistor, so as to form source/drain regions of the access transistor and the pull down transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW086117132A TW346669B (en) | 1997-11-17 | 1997-11-17 | Method for improving the stability of SRAM memory unit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW086117132A TW346669B (en) | 1997-11-17 | 1997-11-17 | Method for improving the stability of SRAM memory unit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW346669B true TW346669B (en) | 1998-12-01 |
Family
ID=58263924
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW086117132A TW346669B (en) | 1997-11-17 | 1997-11-17 | Method for improving the stability of SRAM memory unit |
Country Status (1)
| Country | Link |
|---|---|
| TW (1) | TW346669B (en) |
-
1997
- 1997-11-17 TW TW086117132A patent/TW346669B/en active
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