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TW346669B - Method for improving the stability of SRAM memory unit - Google Patents

Method for improving the stability of SRAM memory unit

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Publication number
TW346669B
TW346669B TW086117132A TW86117132A TW346669B TW 346669 B TW346669 B TW 346669B TW 086117132 A TW086117132 A TW 086117132A TW 86117132 A TW86117132 A TW 86117132A TW 346669 B TW346669 B TW 346669B
Authority
TW
Taiwan
Prior art keywords
diffusion region
gate
type
ion diffusion
type light
Prior art date
Application number
TW086117132A
Other languages
Chinese (zh)
Inventor
Jenn-Ming Hwang
Original Assignee
Taiwan Semiconductor Mfg Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiwan Semiconductor Mfg Co Ltd filed Critical Taiwan Semiconductor Mfg Co Ltd
Priority to TW086117132A priority Critical patent/TW346669B/en
Application granted granted Critical
Publication of TW346669B publication Critical patent/TW346669B/en

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Abstract

A method for improving the stability of SRAM memory unit, which comprises the following steps: (a) forming a gate oxide layer on a P-type semiconductor substrate formed with an isolation region; (b) forming a polysilicon layer on the gate oxide layer; (c) selectively etching the polysilicon layer thereby separately forming a gate of an access transistor and a gate of a pull down transistor; (d) applying a light N-type ion implantation thereby forming a first N-type light ion diffusion region on the P-type semiconductor substrate on the both sides of the gate of the access transistor and the gate of the pull down transistor; (e) forming a photoresist thereby exposing a first N-type light ion diffusion region of the access transistor, and covering the gate and the first N-type light ion diffusion region of the pull-down transistor; (f) applying a P-type ion implantation step thereby adjusting the first N-type light ion diffusion region of the access transistor into a second N-type light ion diffusion region, in which the concentration of the second N-type light ion diffusion region is smaller than that of the first N-type light ion diffusion region; (g) forming a sidewall insulator on the sidewalls of the gate of the access transistor and the gate of the pull down transistor; and (h) applying a heavy N-type ion implantation thereby implanting a high concentration of N-type ions in the second N-type light ion diffusion region of the access transistor, and the first N-type light ion diffusion region of the pull down transistor, so as to form source/drain regions of the access transistor and the pull down transistor.
TW086117132A 1997-11-17 1997-11-17 Method for improving the stability of SRAM memory unit TW346669B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW086117132A TW346669B (en) 1997-11-17 1997-11-17 Method for improving the stability of SRAM memory unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW086117132A TW346669B (en) 1997-11-17 1997-11-17 Method for improving the stability of SRAM memory unit

Publications (1)

Publication Number Publication Date
TW346669B true TW346669B (en) 1998-12-01

Family

ID=58263924

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086117132A TW346669B (en) 1997-11-17 1997-11-17 Method for improving the stability of SRAM memory unit

Country Status (1)

Country Link
TW (1) TW346669B (en)

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