TW202423200A - Circuit board manufacturing method - Google Patents

Abstract

A method for manufacturing a circuit substrate is provided, which has simple steps and has both high adhesion and excellent high-frequency characteristics. The method for manufacturing the circuit substrate comprises: (a) forming a first wiring layer on at least one side of a substrate to obtain a laminate; (b) performing surface treatment on the first wiring layer; (c) laminating a first insulating layer on the surface of the laminate including the first wiring layer in a manner that the surface-treated first wiring layer is embedded in the first insulating layer; and (d) laminating a second insulating layer on the surface of the first insulating layer opposite to the substrate. The first insulating layer does not include glass fiber, and a dielectric loss tangent of the first insulating layer is smaller than a dielectric loss tangent of the second insulating layer. The second insulating layer includes glass fiber.

Description

Method for manufacturing circuit board

The present invention relates to a method for manufacturing a circuit substrate.

Circuit boards are widely used in electronic equipment and communication equipment. In particular, as large-scale and industrial users, electronic equipment such as servers and supercomputers, and communication equipment such as routers and wireless base stations, the signals are moving towards high frequencies, which has led to the demand for circuit boards suitable for such high-frequency uses. In order to transmit high-frequency signals without deteriorating the quality of high-frequency signals, it is hoped that the transmission loss of the high-frequency circuit board will be low. A circuit board is composed of a copper foil layer (wiring layer) processed into a wiring pattern and an insulating resin substrate (resin layer or insulating layer). Transmission loss is mainly composed of conductor loss caused by copper foil and dielectric loss caused by insulating resin substrate.

Therefore, in copper-clad laminates for high-frequency applications, it is ideal to suppress the dielectric loss caused by the resin layer. To this end, the resin layer is required to have excellent dielectric properties, especially low dielectric loss tangent. However, the resin layer with low dielectric loss tangent usually has the problem of low adhesion to the copper foil.

On the other hand, conductor loss may increase due to the skinning effect of copper foil, which becomes more prominent as the frequency becomes higher. Therefore, in order to suppress transmission loss in high-frequency applications, the skinning effect of copper foil should be reduced, which requires the copper foil to be smoothed and the coarse particles to be refined. However, the smoother the copper foil becomes, the lower the adhesion with the resin layer.

In order to solve these problems, it has been proposed to use a copper foil with an adhesive layer (also called a primer layer) provided on the surface of the copper foil to manufacture a copper-clad laminate or circuit substrate. For example, Patent Document 1 (International Publication No. 2019/188087) discloses a copper-clad laminate, which has a copper foil, an adhesive layer and a resin layer in sequence, wherein the maximum height Sz on the surface of the adhesive layer side of the copper foil is made less than 6.8 μm, and the dielectric loss tangent value δa of the adhesive layer is made equal to or less than the dielectric loss tangent value δr of the resin layer. It is believed that the copper-clad laminate can ensure sufficient peeling strength between the copper foil and the resin layer and improve the transmission characteristics of the resin layer.

In addition, it is known that in order to improve the adhesion between the wiring layer and the resin layer, the circuit of the inner layer of the substrate is subjected to surface treatment. For example, Patent Document 2 (Japanese Patent Publication No. 2014-240474) discloses that after the surface of the inner layer circuit of the circuit substrate is subjected to surface treatment to improve the bonding strength, the prepreg and the metal foil for the outer layer circuit are laminated to form an integral body. In addition, Patent Document 3 (Japanese Patent Publication No. 2020-33568) discloses that after etching both sides of the copper-clad laminated board with the inner layer circuit formed to roughen the copper surface, the build-up method is used to laminate the bonding film on both sides of the inner layer circuit substrate. [Prior art literature] [Patent literature]

[Patent Document 1] International Publication No. 2019/188087 [Patent Document 2] Japanese Patent Publication No. 2014-240474 [Patent Document 3] Japanese Patent Publication No. 2020-33568

In recent years, the demand for higher frequencies, such as 5GHz and above, has gradually increased. Therefore, there is also a demand for further improvement in the high-frequency characteristics of circuit substrates. However, in the case of manufacturing circuit substrates with inner layer circuits, from the perspective of both high adhesion and excellent high-frequency characteristics, the previous manufacturing methods are not necessarily sufficient.

The inventors of the present invention have now reached the following discovery, that is, in a method for manufacturing a circuit substrate including embedding a surface-treated first wiring layer with a first insulating layer and then laminating a second insulating layer on the first insulating layer, by making the first insulating layer not including glass fiber and the second insulating layer including glass fiber satisfy a specified dielectric loss tangent relationship, a circuit substrate having both high adhesion and excellent high-frequency characteristics can be easily manufactured.

Therefore, the object of the present invention is to provide a method for manufacturing a circuit substrate, which has simple steps and has both high adhesion and excellent high-frequency characteristics.

According to the present invention, the following aspects are improved. [Aspect 1] A method for manufacturing a circuit board, comprising: (a) a step of forming a first wiring layer on at least one side of a substrate to obtain a laminate; (b) a step of performing surface treatment on the first wiring layer; (c) a step of laminating a first insulating layer on a surface of the laminate including the first wiring layer in a manner that the first wiring layer subjected to surface treatment is buried in the first insulating layer; and (d) a step of laminating a second insulating layer on the surface of the first insulating layer opposite to the substrate; The first insulating layer does not contain glass fiber, and the loss tangent of the first insulating layer is smaller than the loss tangent of the second insulating layer, and the second insulating layer contains glass fiber. [Aspect 2] The method for manufacturing a circuit substrate as described in Aspect 1, wherein the thickness of the second insulating layer is 20 μm or more. [Aspect 3] The method for manufacturing a circuit substrate as described in Aspect 1 or 2, wherein the ratio T ₀ /T 1 of the thickness T ₀ of the first insulating layer on the first wiring layer to the thickness T ₁ of the first wiring layer is _0.1 or more and 2.0 or less. [Aspect 4] A method for manufacturing a circuit substrate as described in any one of aspects 1 to 3, wherein the aforementioned step (a) includes interposing a third insulating layer between the aforementioned substrate and the aforementioned first wiring layer, the aforementioned third insulating layer does not include glass fiber, and the loss tangent of the aforementioned third insulating layer is smaller than the loss tangent of the aforementioned second insulating layer. [Aspect 5] A method for manufacturing a circuit substrate as described in any one of aspects 1 to 4, wherein the aforementioned step (c) is performed by laminating a laminate sheet comprising a copper support body and the aforementioned first insulating layer on the aforementioned laminate body in a manner such that the aforementioned first insulating layer is in contact with the aforementioned first wiring layer, and then removing the aforementioned copper support body from the aforementioned laminate sheet. [Aspect 6] A method for manufacturing a circuit substrate as described in any one of aspects 1 to 5, wherein the second insulating layer is composed of a semi-hardened resin and the glass fiber, and the method for manufacturing the circuit substrate further comprises: (e) laminating a copper-bonded laminate comprising a hardened resin layer and copper layers disposed on both sides thereof on the surface of the second insulating layer in such a manner that the copper layer is in contact with the second insulating layer; and, (f) A step of applying pressure to the laminated body on which the copper-bonded laminate is laminated, thereby bonding the first insulating layer, the second insulating layer, and the copper-bonded laminate at one time. [Aspect 7] A method for manufacturing a circuit substrate as described in any one of aspects 1 to 6, wherein the first wiring layer is a signal line for high-frequency transmission. [Aspect 8] A circuit substrate manufactured by the method as described in any one of aspects 1 to 7.

Method for manufacturing circuit board

The present invention relates to a method for manufacturing a circuit board. The circuit board in this specification can also be called a printed circuit board, and is defined as including: a printed wiring board with wiring applied on the surface and/or inside of an insulating resin substrate and before electronic components are mounted, and a printed circuit board with electronic components mounted on the printed wiring board.

The method of the present invention comprises the steps of: (1) forming a first wiring layer, (2) surface treatment of the first wiring layer, (3) lamination of a first insulating layer, (4) lamination of a second insulating layer, (5) lamination of a copper-clad laminate as desired, and (6) press treatment as desired. The following is a description of each step (1) to (6) with reference to the drawings.

(1) Formation of the first wiring layer An example of a method for manufacturing a circuit board formed by the present invention is shown in FIGS. 1 and 2. First, as shown in FIGS. 1(i) and (ii), a first wiring layer 16 is formed on at least one side of a substrate 12 to obtain a laminate 18. The first wiring layer 16 may be formed on only one side of the substrate 12 or on both sides of the substrate 12.

The substrate 12 can be a resin substrate generally used as a circuit board. The substrate 12 preferably includes an insulating resin, and more preferably includes an insulating resin and glass fiber. The substrate 12 can be made of a material different from the second insulating layer 26 described later, but preferably made of the same material as the second insulating layer 26. Therefore, the preferred embodiment of the second insulating layer 26 described later can be directly applied as the preferred embodiment of the substrate 12.

The first wiring layer 16 is a circuit having a specified pattern, and is embedded as an inner layer circuit by the first insulating layer 20 described later. Therefore, the first wiring layer 16 is preferably a signal line for high-frequency transmission. The formation of the first wiring layer 16 is preferably performed by preparing a copper-clad laminate 10 including a substrate 12 and copper foils 14 disposed on both sides thereof, as shown in FIG. 1(i), and performing patterning including etching on the copper foils 14. However, the formation method of the first wiring layer 16 is not particularly limited, and known methods such as a subtractive method, a SAP (semi-additive) method, and a MSAP (modified semi-additive) method can be used.

The first wiring layer 16 is typically made of copper. The thickness _T1 of the first wiring layer 16 is preferably 5 μm to 105 μm, more preferably 9 μm to 70 μm, and more preferably 12 μm to 35 μm. In addition, in the case of a plan view of the laminate 18, the area ratio (copper residue rate) of the first wiring layer 16 to the total area of the substrate 12 is preferably 20% to 80%, and more preferably 40% to 60%.

The step of forming the first wiring layer 16 preferably includes interposing the third insulating layer 13 between the substrate 12 and the first wiring layer 16. The third insulating layer 13 does not contain glass fiber. In addition, the dielectric loss tangent of the third insulating layer 13 is smaller than the dielectric loss tangent of the second insulating layer 26 (and preferably the substrate 12) described later. By interposing such a third insulating layer 13 between the substrate 12 and the first wiring layer 16, sufficient adhesion between the substrate 12 and the first wiring layer 16 can be ensured, and at the same time, the transmission loss can be further reduced. That is, the conductor loss due to the copper foil, which may increase due to the skinning effect of the copper foil, can be reduced, thereby achieving a further reduction in transmission loss. For example, as shown in Figures 3 (i) and (ii), by preparing a copper-clad laminate 10 having a third insulating layer 13 and a copper foil 14 on both sides of a substrate 12 in sequence, and patterning the copper foil 14, a laminate 18 having a third insulating layer 13 interposed between the substrate 12 and the first wiring layer 16 can be obtained.

The thickness of the third insulating layer 13 is preferably 20 μm or less, more preferably 0.5 μm to 15 μm or less, more preferably 0.5 μm to 12 μm or less, particularly preferably 1 μm to 8 μm or less, and most preferably 1 μm to 5 μm or less. In this way, the influence of reflection loss can be controlled to a minimum, and at the same time, the transmission loss can be reduced in a more balanced manner, and the adhesion between the substrate 12 and the first wiring layer 16 can be improved. The third insulating layer 13 can be made of a different material from the first insulating layer 20 described later, but it is preferably made of the same material as the first insulating layer 20. Therefore, the preferred embodiment of the first insulating layer 20 described below can be directly applied as the preferred embodiment of the third insulating layer 13. However, in order to ensure the circuit embeddability, the composition of the first insulating layer 20 can be adjusted to be different from that of the third insulating layer 13 and/or the fourth insulating layer 34 described below.

(2) Surface treatment of the first wiring layer The first wiring layer 16 is subjected to surface treatment (see FIG. 1(iii)). The surface treatment may be a variety of surface treatments performed to improve or even impart rust resistance or adhesion to the insulating layer on the surface of the first wiring layer 16, but preferably includes at least a treatment for improving adhesion to the resin (internal layer roughening treatment). By performing such a surface treatment, the heat resistance of the circuit board can be improved, and the occurrence of bulges or bubbles can be effectively suppressed.

When the surface treatment includes the inner layer roughening treatment, the etching amount of the first wiring layer 16 formed by the inner layer roughening treatment is preferably 0.1 μm to 3.0 μm, more preferably 0.5 μm to 2.0 μm, and even more preferably 0.5 μm to 1.5 μm. In this regard, although the transmission loss of the circuit substrate produced by the inner layer roughening treatment tends to increase in the high-frequency band region, according to the present invention, the increase in transmission loss can be effectively suppressed. As specific examples of the inner layer roughening treatment, V-bond treatment, CZ treatment, FlatBOND treatment, etc. using various treatment solutions manufactured by MEC Co., Ltd. can be cited. Furthermore, in this specification, even if the surface of the wiring layer is not almost (or completely) roughened to improve the adhesion with the resin, such as FlatBOND processing, it is still regarded as a roughening treatment in a broad sense and is included in the scope of the inner layer roughening treatment.

The surface treatment may be performed on at least one surface of the first wiring layer 16, but as shown in FIG. 1(iii), it is preferably performed on the entire exposed surface of the first wiring layer 16 from the viewpoint of further improving the adhesion with the resin.

(3) Lamination of the first insulating layer On the surface of the laminate 18 including the first wiring layer 16, the first insulating layer 20 is laminated in such a manner that the surface-treated first wiring layer 16 is embedded in the first insulating layer 20 (see FIG. 1(iv) and FIG. 2(v)). The first insulating layer 20 does not include glass fiber. In addition, the dielectric loss tangent of the first insulating layer 20 is smaller than the dielectric loss tangent of the second insulating layer 26 described later.

By using such a first insulating layer 20 to embed the first wiring layer 16, sufficient adhesion between the first wiring layer 16 and the second insulating layer 26 can be ensured, and at the same time, transmission loss can be reduced. That is, the conductor loss due to the copper foil, which may increase due to the skinning effect of the copper foil, can be reduced, and the transmission loss can be further reduced. In particular, if the first wiring layer 16 functions as an inner layer circuit (signal line with wire) as described above, the electric field around the first wiring layer 16 will become stronger than the electric field around the ground layer. Therefore, by using the first insulating layer 20 having a dielectric loss tangent smaller than that of the second insulating layer 26 to cover the first wiring layer 16, the transmission loss can be effectively reduced. In addition, since the first insulating layer 20 does not contain glass fibers, it becomes easy to control the fluidity of the resin, and as a result, the first wiring layer 16 can be smoothly embedded. Therefore, the present invention can be said to be particularly suitable for a method of manufacturing a circuit substrate having an inner layer circuit.

The step of laminating the first insulating layer 20 is preferably performed by laminating the laminate sheet 24 including the copper support 22 and the first insulating layer 20 on the laminate body 18 in such a manner that the first insulating layer 20 is in contact with the first wiring layer 16 (FIG. 1(iv)), and then removing the copper support 22 from the laminate sheet 24 (FIG. 2(v)). Furthermore, the lamination of the laminate sheet 24 on the laminate body 18 preferably includes a pressurization process. The conditions of the pressurization treatment can be appropriately determined according to the hardening temperature of the first insulating layer 20, etc., and are not particularly limited. For example, it is preferred to use a vacuum press at a temperature of 160°C to 220°C and a pressurization time of 60 minutes to 150 minutes. The copper support 22 is not particularly limited as long as it can support the first insulating layer 20 and improve the operability, but it is preferably a copper support 22 with a thickness of 1.5 μm to 20 μm. The removal method of the support 22 is not particularly limited. For example, the support 22 can be preferably removed by etching.

It is preferred that the step of curing the first insulating layer 20 (dry heat treatment of the resin constituting the first insulating layer 20) is further included after laminating the first insulating layer 20. The curing step may be performed after laminating the first insulating layer 20. For example, the curing step may be performed before or after laminating the second insulating layer 26 and/or the copper-clad laminate 32 described later, or may be performed after the pressurization treatment described later. The conditions of the hardening treatment can be appropriately determined according to the resin composition of the first insulating layer 20, and are not particularly limited. For example, it is preferably carried out in an atmosphere or an inert gas environment at a temperature of 200°C to 290°C for a time of 1 minute to 100 minutes. By performing the hardening treatment, the unhardened resin can be reduced and the generation of bulges or bubbles can be more effectively suppressed.

The first insulating layer 20 is a layer for reducing transmission loss and improving adhesion between the first wiring layer 16 and the second insulating layer 26 described later, and can also be used for embedding circuits. As shown in FIG. 4 , the ratio T ₀ /T ₁ of the thickness T ₀ of the first insulating layer 20 on the first wiring layer 16 to the thickness T ₁ of the first wiring layer 16 is preferably 0.1 to 2.0, more preferably 0.1 to 1.5, more preferably 0.2 to 1.0, and particularly preferably 0.2 to 0.6. In this way, the influence of reflection loss can be controlled to a minimum, and the transmission loss can be reduced in a more balanced manner, and the adhesion between the first wiring layer 16 and the second insulating layer 26 can be improved. In order to obtain a more excellent effect of reducing transmission loss, the thickness _T0 is preferably 0.5 μm or more, more preferably 1.0 μm or more, and more preferably 2.0 μm or more. In addition, from the perspective of making impedance matching easier, the thickness _T0 is preferably 20 μm or less.

The total thickness of the first insulating layer 20 (i.e., the total thickness of the thickness _T0 and _T1 shown in FIG. 4) is not particularly limited, but it is preferably adjusted appropriately in consideration of impedance design, etc. In this regard, since the second insulating layer 26 (and the desired substrate 12) includes glass fibers, and since commercial products of this material (e.g., prepreg) are standard products with a prescribed thickness (e.g., a thickness of 5 μm each), it is difficult to finely adjust the thickness. On the other hand, since the first insulating layer 20 does not include glass fibers, the thickness can be finely adjusted, so by combining the substrate 12 and the second insulating layer 26 with the first insulating layer 20, the accuracy of the impedance design can be improved.

The dielectric loss tangent of the first insulating layer 20 is smaller than the dielectric loss tangent of the second insulating layer 26. Specifically, the ratio of the dielectric loss tangent of the first insulating layer 20 to the dielectric loss tangent of the second insulating layer 26 (dielectric loss tangent of the first insulating layer/dielectric loss tangent of the second insulating layer) is preferably 0.25 or more and less than 1.0, more preferably 0.30 or more and 0.80 or less, and even more preferably 0.50 or more and 0.70 or less. This can more effectively reduce the transmission loss. The respective dielectric loss tangents are measured at a frequency of 50 GHz using the Fabry-Perot cavity method.

From the perspective of reducing transmission loss, the dielectric loss tangent of the first insulating layer 20 and the third insulating layer 13 and the fourth insulating layer 34 described later (hereinafter, collectively referred to as "the first insulating layer 20, etc.") at 50 GHz is preferably small, preferably 0.0035 or less, more preferably 0.0001 or more and 0.0030 or less, more preferably 0.0001 or more and 0.0025 or less, and particularly preferably 0.0001 or more and 0.0020 or less. In addition, the relative permittivity of the first insulating layer 20, etc. at 50 GHz is preferably 6 or less, preferably 1 or more and 5 or less, more preferably 1 or more and 4 or less, and particularly preferably 2 or more and 3 or less. The dielectric loss tangent and relative capacitance at 50 GHz are measured by the Fabry-Perot resonant cavity method.

From the perspective of reducing transmission loss, the dielectric loss tangent of the first insulating layer 20, etc. at a frequency of 10 GHz is preferably small, preferably 0.0035 or less, more preferably 0.0001 or more and 0.0030 or less, more preferably 0.0001 or more and 0.0020 or less, and particularly preferably 0.0001 or more and 0.0015 or less. In addition, the relative capacitance of the first insulating layer 20, etc. at a frequency of 10 GHz is preferably 6 or less, preferably 1 or more and 5.5 or less, more preferably 1 or more and 5 or less, and particularly preferably 1 or more and 4 or less. Moreover, the above dielectric loss tangent and relative capacitance at 10 GHz are values measured by the perturbation cavity resonator method.

The ratio of the dielectric loss tangent δ ₁ of the first insulating layer 20 etc. at the resonance point at a frequency of 10 GHz to 50 GHz measured by the balanced circular plate cavity resonator method (BCDR method) to the dielectric loss tangent δ ₀ at 10 GHz measured by the separated pillar dielectric resonator method (SPDR method) (δ ₁ /δ ₀ ) is preferably 1.25 or less, more preferably 0.3 to 1.25, and even more preferably 0.3 to 1.10. Therefore, in the high-frequency band region of 10 GHz to 50 GHz, by using an insulating layer with a small change (rise) in the dielectric loss tangent, the effect of reducing the transmission loss can be more effectively exerted, and a circuit substrate more suitable for high-frequency use can be manufactured.

From the viewpoint of further improving adhesion, it is preferred that the elastic modulus of the first insulating layer 20 is smaller than the elastic modulus of the second insulating layer 26. Specifically, the ratio of the elastic modulus of the first insulating layer 20 to the elastic modulus of the second insulating layer 26 (elastic modulus of the first insulating layer/elastic modulus of the second insulating layer) is preferably 0.01 or more and less than 1.0, more preferably 0.02 or more and 0.8 or less, more preferably 0.03 or more and 0.6 or less, and particularly preferably 0.05 or more and 0.4 or less. In addition, the elastic modulus of the first insulating layer 20 is preferably 0.6 GPa or more and less than 10 GPa, more preferably 0.8 GPa or more and 9 GPa or less, and more preferably 1 GPa or more and 8 GPa or less. Moreover, the elastic modulus of the insulating layer or resin layer in this specification refers to the tensile elastic modulus measured according to JISK 7161-2014, and the measured value of the resin after curing (C stage) is adopted as the elastic modulus. The elastic modulus of the first insulating layer 20 can be adjusted by appropriately changing the constituent components or filler content.

The first insulating layer 20 is composed of a free aryl ether (arylene Preferably, the at least one of the group consisting of: a polyether compound (e.g., polyphenylene ether resin), a polyimide resin (typically a low dielectric polyimide resin), an olefin resin (e.g., polyethylene resin, polypropylene resin, polymethylpentene resin, or cycloolefin resin), a liquid crystal polymer, a polyester resin, a polystyrene resin, an elastomer, a benzoxazine resin, an active ester resin, a cyanate resin, a dimaleimide resin, a butadiene resin, a styrene copolymer (e.g., a hydrogenated or non-hydrogenated styrene butadiene resin), an epoxy resin (e.g., a dicyclopentadiene epoxy resin), a fluorine resin, a resin having a vinyl group, and copolymers thereof is used. These resins not only exhibit excellent bonding performance with the first wiring layer 16 and the second insulating layer 26, but also have low dielectric loss tangent, thereby helping to reduce transmission loss.

The first insulating layer 20 and the like preferably contain an aryl ether compound. The weight average molecular weight of the aryl ether compound is preferably 30,000 or more, more preferably 30,000 or more and 300,000 or less, more preferably 40,000 or more and 200,000 or less, and particularly preferably 45,000 or more and 120,000 or less. The aryl ether compound having a weight average molecular weight of 30,000 or more is typically polyaryl ether. The aryl ether compound is preferably a phenylene ether compound, such as polyphenylene ether. The aryl ether compound or the phenylene ether compound contains the following formula in the molecule: (wherein R ₁ , R ₂ , R ₃ and R ₄ are each independently a hydrogen atom or a alkyl group having 1 to 3 carbon atoms) is preferred. Examples of phenylene ether compounds include styrene derivatives of phenylene ether compounds, phenylene ether compounds containing an anhydrous maleic acid structure in the molecule, terminal hydroxyl-modified phenylene ether compounds, terminal methacryloyl-modified phenylene ether compounds and terminal glycidyl ether-modified phenylene ether compounds. Examples of products of phenylene ether compounds containing an anhydrous maleic acid structure in the molecule and having a weight average molecular weight of 30,000 or more include PME-80 and PME-82 manufactured by Mitsubishi Engineering-Plastics Co., Ltd.

The aryl ether compound preferably has a reactive unsaturated bond. Alternatively, the first insulating layer 20 may further include an additional aryl ether compound having a reactive unsaturated bond. In this case, the additional aryl ether compound does not necessarily have a weight average molecular weight of 30,000 or more. That is, the additional aryl ether compound may have a weight average molecular weight of 30,000 or more, but may also have a weight average molecular weight of less than 30,000, for example, a number average molecular weight of 500 or more and 10,000 or less. Reactive unsaturated bonds are defined as unsaturated bonds that become reactive by heat or ultraviolet rays. Preferred examples of reactive unsaturated bonds include cyano, maleimide, vinyl, (meth)acryl, ethynyl, styryl, and combinations thereof. Styryl is particularly preferred because of its high reactivity and ability to control the reaction (it is not prone to reactions that change over time, can preserve the resin, and can ensure the life of the product for a long time).

In terms of high reactivity, the reactive unsaturated bond in the aryl ether compound is preferably located at the end of the molecular structure or adjacent to it. For example, as an example of a functional group having an unsaturated bond at the end of the molecular structure, 1,2-vinyl can be cited. Since 1,2-vinyl has high reactivity, it is generally used as a functional group that can be used for free radical polymerization. In contrast, in the case of ethylenic unsaturated bonds existing in the molecular skeleton (not vinyl groups located at the ends of the molecular structure), its reactivity is reduced. In addition, as an exception, in the case of a benzene ring adjacent to an unsaturated bond (such as the case of a styryl group), it has high reactivity. Therefore, the position of the reactive unsaturated bond can be a) at the end of the molecular structure (regardless of the main chain or the side chain), or b) at the position of the benzene ring at the end of the molecular structure (regardless of the main chain or the side chain), adjacent to the terminal benzene ring. For example, the arylene ether compound can also have styryl groups at both ends of the molecular structure as reactive unsaturated bonds. As an example of a product of an arylene ether compound having styryl groups at both ends of the molecule, OPE-2St-1200 and OPE-2St-2200 manufactured by Mitsubishi Gas Chemical Co., Ltd. can be cited.

The content of the aryl ether compound having a weight average molecular weight of 30,000 or more in the first insulating layer 20 is not particularly limited. From the viewpoint of both compatibility (which is related to peel strength or water resistance reliability) and dielectric properties, it is preferably 5 parts by weight to 60 parts by weight, more preferably 8 parts by weight to 55 parts by weight, more preferably 12 parts by weight to 50 parts by weight, and particularly preferably 15 parts by weight to 35 parts by weight, relative to 100 parts by weight of the total amount of the resin component (solid component).

The first insulating layer 20 preferably includes a styrene copolymer in addition to the above-mentioned aryl ether compound. The styrene copolymer may be either hydrogenated or non-hydrogenated. That is, the styrene copolymer is a compound including a portion derived from styrene, and may also be a polymer including a portion derived from a compound having an unsaturated group that can be polymerized, such as olefins, other than styrene. In the styrene copolymer, in the case where a double bond exists at a portion derived from a compound having an unsaturated group that can be polymerized, the double bond portion may be hydrogenated or unhydrogenated. Examples of styrene copolymers include acrylonitrile-butadiene-styrene copolymers (ABS), methacrylate-butadiene-styrene copolymers (MBS), acrylonitrile-acrylate-styrene copolymers (AAS), acrylonitrile-ethylene-styrene copolymers (AES), styrene-butadiene copolymers (SBR), styrene-butadiene-styrene copolymers (SBS), styrene-ethylene-butadiene-styrene copolymers (SEBS), styrene-4-methylstyrene-isoprene-butadiene block copolymers, and combinations thereof; preferably, styrene-butadiene block copolymers (SBR), styrene-4-methylstyrene-isoprene-butadiene block copolymers, and combinations thereof; particularly preferably, styrene-4-methylstyrene-isoprene-butadiene block copolymers. The weight average molecular weight of the styrene copolymer is not particularly limited, but is preferably 40,000 to 400,000, more preferably 60,000 to 370,000, and particularly preferably 80,000 to 340,000.

Styrene copolymers preferably have reactive unsaturated bonds in the molecule. Reactive unsaturated bonds are defined as unsaturated bonds that become reactive by heat or ultraviolet light. Preferred examples of reactive unsaturated bonds include hydroxyl, maleimide, vinyl, (meth)acryl, ethynyl, styrene, and combinations thereof. Styrene is particularly preferred in terms of high reactivity and controllable reaction (not prone to reactions due to time changes, able to preserve the resin, and able to ensure the product life for a long time).

The reactive unsaturated bonds in styrene copolymers are the same as those in aryl ether compounds. In terms of high reactivity, it is preferred to be located at the end of the molecular structure or adjacent to it. For example, as an example of a functional group having an unsaturated bond at the end of the molecular structure, 1,2-vinyl can be cited. Since 1,2-vinyl has high reactivity, it is generally used as a functional group that can be used for free radical polymerization. In contrast, in the case of ethylenic unsaturated bonds existing in the molecular skeleton (not vinyl groups located at the ends of the molecular structure), the reactivity is reduced. In addition, as an exception, when the benzene ring is adjacent to the unsaturated bond (such as the case of styrene groups), it has high reactivity. Therefore, the position of the reactive unsaturated bond can be a) at the end of the molecular structure (regardless of the main chain or the side chain), or b) in the case of a benzene ring at the end of the molecular structure (regardless of the main chain or the side chain), a position adjacent to the terminal benzene ring. Examples of products of styrene-based copolymers having reactive unsaturated bonds include Septon ^(R) V9461 manufactured by Kuraray Co., Ltd. (having a styrene group), Ricon ^(R) 100, 181 and 184 manufactured by Cray Valley Co., Ltd. (styrene-butadiene copolymers having 1,2-vinyl groups), and Epoblend AT501 and CT310 manufactured by Dacellul Co., Ltd. (styrene-butadiene copolymers having 1,2-vinyl groups).

The styrene-based copolymer preferably has modified styrene butadiene. Alternatively, the first insulating layer 20 etc. may further include an additional styrene-based copolymer having modified styrene butadiene. In this case, as the additional styrene-based copolymer, the same styrene-based copolymer as mentioned above may be used except that it does not need to have a reactive unsaturated bond. That is, the additional styrene-based copolymer may have a reactive unsaturated bond, but may also have no reactive unsaturated bond. The modified styrene butadiene may be styrene butadiene that has been chemically modified by introducing various functional groups, for example, amine modification, pyridine modification, carboxyl modification, etc., preferably amine modification. As an example of a styrene-based copolymer having modified styrene butadiene, there can be cited Tuftec ^(R) MP10 manufactured by Asahi Kasei Corporation, which is a hydrogenated styrene butadiene block copolymer and an amine-modified product. Also, as an example of an unmodified styrene-based copolymer, there can be cited TR2003 manufactured by JSR Corporation, which is a styrene butadiene block copolymer.

The content of the styrene copolymer having a reactive unsaturated bond in the first insulating layer 20 etc. is not particularly limited. From the viewpoint of both compatibility and dielectric properties, it is preferably from 5 parts by weight to 75 parts by weight, more preferably from 10 parts by weight to 65 parts by weight, more preferably from 15 parts by weight to 55 parts by weight, and particularly preferably from 20 parts by weight to 43 parts by weight, relative to 100 parts by weight of the total amount of the resin component (solid component).

The content ratio of the aryl ether compound having a weight average molecular weight of 30,000 or more and the styrene copolymer having a reactive unsaturated bond in the molecule in the first insulating layer 20, etc. is not particularly limited. From the viewpoint of achieving a balance between adhesion, compatibility and dielectric properties, when the content of the aryl ether compound having a weight average molecular weight of 30,000 or more is set to P and the content of the styrene copolymer having a reactive unsaturated bond in the molecule is set to S, the weight ratio (S/P ratio) obtained by dividing S by P is preferably 0.2 to 4.0, more preferably 0.4 to 3.5, more preferably 0.6 to 3.0, and particularly preferably 1.0 to 2.5.

The first insulating layer 20 may also contain additives generally added to resins or polymers. Examples of additives include reaction initiators, reaction accelerators, flame retardants, silane coupling agents, dispersants, antioxidants, and the like.

The first insulating layer 20 etc. may further include fillers. Examples of fillers include silicon oxide, talc, aluminum oxide, boron nitride (BN), resin, etc. The filler is not particularly limited as long as it can be dispersed in the first insulating layer 20 etc. From the perspective of dispersibility and dielectric properties, silicon oxide is preferred. The average particle size D50 of the filler is preferably 0.1 μm or more and 3.0 μm or less, and more preferably 0.3 μm or more and 2.0 μm or less. If the average particle size D50 is within this range, the interface (i.e. specific surface area) is reduced, which not only reduces the adverse effects on dielectric properties, but also improves interlayer insulation or eliminates coarse particles in the resin layer, which are better properties for electronic materials. Fillers can be in various forms such as crushed particles, spherical particles, core-shell particles, hollow particles, etc. The content of the filler can be any amount and is not particularly limited. From the viewpoint of the ease of dispersion of the filler and the fluidity of the resin composition, the content is preferably 0 to 150 parts by weight, more preferably 10 to 130 parts by weight, more preferably 20 to 100 parts by weight, and particularly preferably 30 to 80 parts by weight, relative to 100 parts by weight of the total amount of the resin component (solid component). Here, 100 parts by weight of the total amount of the resin component (solid component) includes not only the polymer or resin but also the weight of additives such as reaction initiators that will become part of the resin, but not the filler.

(4) Lamination of the second insulating layer The second insulating layer 26 is formed on the surface of the first insulating layer 20 opposite to the substrate 12 (see FIG. 2(vi)). The second insulating layer 26 includes glass fibers, thereby improving the operability of the laminate 18. As a result, the steps are simplified, the circuit substrate can be manufactured stably, and the yield can be improved. Moreover, the laminate 18 after this step can be used as a circuit substrate, and the laminate 18 after the lamination step and/or the pressurization step of the copper-clad laminate described later can also be used as a circuit substrate.

The second insulating layer 26, the substrate 12, and the resin layer 28 provided as desired as described below (hereinafter collectively referred to as "the second insulating layer 26, etc.") can be a resin substrate generally used as a circuit board or a copper-clad laminate. From the perspective of ensuring rigidity and insulation, the second insulating layer 26, etc. is preferably a resin containing glass fiber and a resin impregnated in the glass fiber (insulating resin), typically a prepreg. Preferred examples of insulating resins used as prepregs include epoxy resins, cyanate resins, polyimide resins, dimaleimide triazine resins (BT resins), polyphenylene ether resins, phenol resins, liquid crystal polymer resins, polytetrafluoroethylene resins (PTFE), etc. Further, as a specific example of a preferred prepreg, for example, MEGTRON7 series "R-5680 (N)" manufactured by Panasonic Co., Ltd. can be cited.

From the viewpoint of board design, the thickness of the second insulating layer 26 and the like is preferably 20 μm or more, more preferably 30 μm or more and 2000 μm or less, more preferably 40 μm or more and 2000 μm or less, and particularly preferably 50 μm or more and 2000 μm or less.

From the viewpoint of improving operability, the elastic modulus of the second insulating layer 26 is preferably 10 GPa or more, more preferably 12 GPa or more and 50 GPa or less, more preferably 14 GPa or more and 40 GPa or less, and particularly preferably 16 GPa or more and 30 GPa or less.

From the perspective of reducing transmission loss, the dielectric loss tangent of the second insulating layer 26 at a frequency of 1 GHz is preferably as small as possible, preferably 0.030 or less, more preferably 0.0001 or more and 0.020 or less, more preferably 0.0002 or more and 0.010 or less, particularly preferably 0.0003 or more and 0.005 or less, and most preferably 0.0004 or more and 0.004 or less. The dielectric loss tangent at 1 GHz refers to the dielectric loss tangent measured by the parallel plate method according to IPC-TM-650 2.5.5.9.

From the viewpoint of reducing transmission loss, the relative capacitance of the second insulating layer 26 etc. at a frequency of 1 GHz is ideally low, preferably 10 or less, more preferably 1 or more and 8 or less, more preferably 1 or more and 5 or less, and particularly preferably 1 or more and 4 or less. The relative capacitance at 1 GHz refers to the relative capacitance measured by the parallel plate method according to IPC-TM-650 2.5.5.9.

The dielectric loss tangent of the second insulating layer 26 etc. at a frequency of 10 GHz is preferably 0.0050 or less, more preferably 0.0009 or more and 0.0045 or less, more preferably 0.0009 or more and 0.0040 or less, and particularly preferably 0.0009 or more and 0.0035 or less. In addition, the relative capacitance of the second insulating layer 26 etc. at 10 GHz is preferably 3.6 or less, more preferably 2.6 or more and 3.4 or less. Moreover, the above dielectric loss tangent and relative capacitance at 10 GHz are values measured by the perturbation cavity resonator method.

The dielectric loss tangent of the second insulating layer 26 etc. at a frequency of 50 GHz is preferably 0.007 or less, more preferably 0.001 or more and 0.006 or less, more preferably 0.001 or more and 0.005 or less, and particularly preferably 0.001 or more and 0.004 or less. In addition, the relative permittivity of the second insulating layer 26 etc. at 50 GHz is preferably 3.6 or less, more preferably 2.6 or more and 3.4 or less. The above dielectric loss tangent and relative permittivity at 50 GHz are values measured by the Fabry-Perot resonator method.

The present invention further includes the copper-clad laminate lamination step and the pressurization step described later. In this step, the resin constituting the second insulating layer 26 is preferably in a semi-hardened state (B stage). That is, the second insulating layer 26 is preferably constituted by the resin and glass fiber in a semi-hardened state, and the resin constituting the second insulating layer 26 is preferably hardened by the pressurization step described later. In this way, the first insulating layer 20, the second insulating layer 26 and the copper-clad laminate 32 can be joined at one time, and the manufacturing steps become simpler.

(5) Lamination of copper-clad laminate (optional step) As desired, a copper-clad laminate 32 including a resin layer 28 in a hardened state and copper layers 30 provided on both sides thereof is laminated on the surface of the second insulating layer 26 in such a manner that the copper layer 30 is in contact with the second insulating layer 26 (see FIG. 2(vii)). In addition, the laminate 18 can be further multi-layered by laminating a plurality of copper-clad laminates 32 on one or both sides of the laminate 18. In this case, the pressurization treatment described below can be performed each time the copper-clad laminate 32 is laminated, or the required number of copper-clad laminates 32 can be laminated at one time and then multi-layered by a single pressurization treatment. In addition, a circuit with a specified pattern can be formed on the copper layer 30 using a known method.

The resin layer 28 can be a resin substrate generally used in copper-clad laminates. The resin layer 28 preferably includes an insulating resin, and more preferably includes an insulating resin and glass fiber. The resin layer 28 can be made of a material different from that of the second insulating layer 26, but preferably is made of the same material as that of the second insulating layer 26. Therefore, the preferred embodiment of the second insulating layer 26 described above can be directly applied as the preferred embodiment of the resin layer 28.

The copper layer 30 is a layer made of copper and can be generally used as a copper layer in a copper-clad laminate. The copper layer 30 can be a circuit with a wiring pattern (i.e., the nth wiring layer (n is an integer greater than 2)), or it can be a copper foil (ground layer) disposed on the entire surface of the resin layer 28. The circuit sandwiched by the ground layer becomes a signal line. The circuit that becomes a signal line can exist near the center of the two ground layers that sandwich the circuit, or it can be close to the ground layer on either side. The thickness of the copper layer 30 is preferably 5μm to 105μm, more preferably 9μm to 70μm, and even more preferably 12μm to 35μm.

The copper-clad laminate lamination step may further include a fourth insulating layer 34 interposed between the copper-clad laminate 32 and the second insulating layer 26 (see, for example, FIG. 5 ). The fourth insulating layer 34 does not include glass fiber. Furthermore, the dielectric loss tangent of the fourth insulating layer 34 is smaller than the dielectric loss tangent of the second insulating layer 26. By interposing such a fourth insulating layer 34 between the second insulating layer 26 and the copper layer 30, sufficient adhesion between the second insulating layer 26 and the copper layer 30 can be ensured, and at the same time, the transmission loss can be further reduced. That is, the conductor loss due to the copper foil, which may increase due to the skinning effect of the copper foil, can be reduced, thereby achieving further reduction of the transmission loss.

The thickness of the fourth insulating layer 34 is preferably 20 μm or less, more preferably 0.5 μm or more and 15 μm or less, more preferably 0.5 μm or more and 12 μm or less, particularly preferably 1 μm or more and 8 μm or less, and most preferably 1 μm or more and 5 μm or less. In this way, the influence of reflection loss can be controlled to a minimum, and the transmission loss can be reduced in a more balanced manner, and the adhesion between the resin layer 28 and the copper layer 30 can be improved. The fourth insulating layer 34 can be made of a material different from that of the first insulating layer 20, but preferably made of the same material as that of the first insulating layer 20. Therefore, the preferred embodiment of the first insulating layer 20 is directly applied as the preferred embodiment of the fourth insulating layer 34. In addition, the formation method of the fourth insulating layer 34 is not particularly limited, and for example, the formation method based on the first insulating layer 20 or the third insulating layer 13 can be adopted.

(6) Pressurization treatment step (optional step) The laminate 18 on which the copper-clad laminate 32 is laminated is subjected to pressurization treatment as desired. In this way, the first insulating layer 20, the second insulating layer 26, and the copper-clad laminate 32 (and the fourth insulating layer 34 if present) can be joined at once, and the manufacturing steps become simpler.

The conditions of the pressurization treatment can be appropriately determined according to the curing temperature of the second insulating layer 26, etc., and are not particularly limited. For example, a vacuum press can be used at a temperature of 160°C to 220°C and a pressurization time of 60 minutes to 150 minutes.

After the pressurization treatment, various electronic components such as chips may be mounted on the laminate 18. The method for mounting the electronic components is not particularly limited, and any known method may be used as appropriate.

Circuit board According to a preferred embodiment of the present invention, a circuit board manufactured by the above method is provided. As shown in FIG2(vi), the circuit board of the present invention comprises: a laminate 18 including a substrate 12, a first wiring layer 16, a first insulating layer 20 and a second insulating layer 26. As shown in FIG2(vii) or FIG5, the laminate 18 may further include a third insulating layer 13, a resin layer 28, a fourth insulating layer 34 and/or a copper layer 30 as desired. The preferred embodiment of the various layers is as described above. In addition, the circuit board may also include various electronic components such as chips as described above.

The circuit substrate may also be a substrate having a plurality of microstrip line circuits and a plurality of stripline circuits. Furthermore, the circuit substrate may also be a multi-layer substrate having a plurality of ground layers and a plurality of signal lines (signal layers) disposed on the surface and/or inside. In the case where the circuit substrate is a multi-layer substrate, a microstrip line circuit is typically provided on the surface layer of the circuit substrate, and a stripline circuit is provided on the inner layer of the circuit substrate. [Example]

The present invention is further described by the following examples.

Example 1 (1) Formation of the first wiring layer The laminate 18 shown in FIG. 5 is produced as a circuit substrate by the following operation. First, a 68 μm thick prepreg (MEGTRON7 series "R-5680 (N)" manufactured by Panasonic Co., Ltd., elastic modulus after curing: 19 GPa, relative capacitance at 50 GHz measured by the Fabry-Perot resonant cavity method: 3.1, dielectric loss tangent: 0.003) is laminated to two sheets (total thickness: 136 μm) as a substrate 12. On one side of the substrate 12, a copper foil with an adhesive layer is laminated in such a way that the adhesive layer contacts the substrate 12, and a vacuum press is used to pressurize the substrate 12 at a temperature of 190°C and for a pressing time of 120 minutes. By this operation, a copper-clad laminate 10 is obtained in which an adhesive layer as a third insulating layer 13 is interposed between the substrate 12 and the copper foil 14 with a thickness of 18 μm (elastic modulus after curing: 1.3 GPa, relative capacitance measured by the Fabry-Perot resonant cavity method at 50 GHz: 2.6, dielectric loss tangent: 0.0017). Thereafter, the copper foil 14 is subjected to circuit formation by a subtractive method to obtain a laminate 18 having a first wiring layer 16 formed thereon. At this time, the copper residue rate on the surface of the first wiring layer 16 side of the laminate 18 is 50%.

The copper foil with the agent layer attached is produced by the following operation. First, 30.10 parts by weight of an aryl ether compound with a weight average molecular weight of 30,000 or more, 38.20 parts by weight of a styrene copolymer having a reactive unsaturated bond in the molecule, 0.50 parts by weight of a reaction initiator, and 50.00 parts by weight of a filler (not included in the resin solid component) are weighed and added to a round flask as raw material components, and toluene and methyl ethyl ketone are added as a mixed solvent. After the raw material components are dissolved or dispersed by heating and stirring, the resin varnish having a raw material component concentration of 13% by weight is obtained by cooling. The obtained resin varnish was applied to the roughened surface of a roughened copper foil (SI-VSP manufactured by Mitsui Metals & Mining Co., Ltd., thickness 18 μm) using a gravure coater so that the thickness of the resin after drying was 5 μm. The copper foil was dried in an oven at 150° C. for 2 minutes to obtain a copper foil with an adhesive layer.

(2) Surface treatment of the first wiring layer The first wiring layer 16 was subjected to inner layer roughening treatment using a sulfuric acid-hydrogen peroxide microetchant (MEC V-bond BO-7790V manufactured by MEC Co., Ltd.) as surface treatment. The inner layer roughening treatment was performed under the condition that the first wiring layer 16 was roughened to a thickness of 1.5 μm (weight conversion).

(3) Lamination of the First Insulating Layer A copper foil with an adhesive layer attached is laminated on the surface of the laminate 18 including the first wiring layer 16 in such a manner that the surface-treated first wiring layer 16 is in contact with the adhesive layer serving as the first insulating layer 20. The laminate is pressurized using a vacuum press at a temperature of 190°C for 120 minutes. The copper foil with the adhesive layer is prepared in the same manner as the copper foil with the adhesive layer obtained in step (1), except that the thickness of the adhesive layer is set to 20 μm and 37.00 parts by weight of an aryl ether compound having a weight average molecular weight of 30,000 or more, 18.22 parts by weight of a styrene copolymer having a reactive unsaturated bond in the molecule, 0.37 parts by weight of a reaction initiator, and 30.00 parts by weight of a filler (not included in the resin solid component) are used as raw material components relative to 100 parts by weight of the resin solid component. Thereafter, the copper foil with the adhesive layer is removed by etching. Thereby, a laminated body is obtained in which the first wiring layer 16 is embedded using the first insulating layer 20. At this time, the thickness _T0 of the first insulating layer 20 on the first wiring layer 16 is 7.4 μm, and the thickness _T1 of the first wiring layer 16 is 18 μm ( _T0 / _T1 =0.41).

(4) Lamination of the second insulating layer On the surface of the first insulating layer 20 opposite to the substrate 12, two prepregs (semi-cured state (B stage)) with a thickness of 68 μm are laminated as the second insulating layer 26. The prepreg is the same as the prepreg prepared in (1) above.

(5) Lamination and pressurization of copper-clad laminate On both sides of the laminated body on which the second insulating layer 26 is laminated, a copper-clad laminate 32 is laminated via a 5 μm thick adhesive layer as the fourth insulating layer 34. The laminate is pressurized using a vacuum press at a temperature of 190°C and a pressurization time of 120 minutes. The first insulating layer 20, the second insulating layer 26, the fourth insulating layer 34, and the copper-clad laminate 32 are bonded at once, and the laminate 18 shown in FIG. 5 is obtained as a circuit substrate. Furthermore, the fourth insulating layer 34 is the same as the adhesive layer on the copper foil of the adhesive layer obtained in (1) above.

The copper-clad laminate 32 is a laminate having a copper layer 30 of 18 μm thickness laminated on both sides of a resin layer 28 of 136 μm thickness (hardened state (C stage)). The material of the resin layer 28 is the same as that of the prepreg prepared in (1) above. The copper layer 30 is the same as the roughened copper foil on the copper foil with the adhesive layer obtained in (1) above.

(6) Hardening treatment of the first insulating layer The obtained laminate 18 was hardened in an oven at a temperature of 230°C for 5 minutes in an atmospheric environment. Two types of samples were produced: one that underwent the hardening treatment and one that did not.

Example 2 Except for the following a) and b), the circuit substrate is manufactured in the same manner as in Example 1. The laminate 18 as a circuit substrate manufactured in Example 2 is shown in FIG6. a) In the formation of the first wiring layer in (1) above, a roughened copper foil (SI-VSP manufactured by Mitsui Metal & Mining Co., Ltd., thickness 18 μm) is used instead of the copper foil with the adhesive layer attached (i.e., the third insulating layer 13 is not formed). b) During the lamination and pressurization process of the copper-clad laminated plate in (5) above, the copper-clad laminated plate 32 is not laminated via the fourth insulating layer 34 on both sides of the laminated body on which the second insulating layer 26 is laminated (i.e., the fourth insulating layer 34 is not formed).

Example 3 (Comparison) Except that only the lamination of the first insulating layer in (3) above was not performed and the hardening treatment in (6) above was not performed, the circuit board was produced in the same manner as in Example 2.

Example 4 (Comparison) Except that only the lamination of the first insulating layer in (3) above was not performed and the hardening treatment in (6) above was not performed, the circuit board was produced in the same manner as in Example 1.

Example 5 (Comparison) Except that only the surface treatment of the first wiring layer in (2) above was not performed and the hardening treatment in (6) above was not performed, the circuit board was produced in the same manner as in Example 1.

Example 6 (Comparison) Except that only the surface treatment of the first wiring layer in (2) above was not performed and the hardening treatment in (6) above was not performed, the circuit board was produced in the same manner as in Example 2.

Example 7 (Comparison) Except that the surface treatment of the first wiring layer in (2) above was not performed, the circuit board was manufactured in the same manner as in Example 3.

Various evaluations The following various evaluations were performed on the circuit boards produced in Examples 1 to 7.

<Measurement of transmission loss> For the inner layer circuit of the obtained circuit board, the transmission loss from 10MHz to 50GHz was measured using a network analyzer (Agilent, model: PNA-X N5245A). The device body and the circuit board were connected with a high-frequency cable with a 2.4mm connector specification, and the setting conditions are as follows. (Setting conditions) ‐ Power: -15dBm ‐ IF bandwidth: 150Hz ‐ Measurement points: 501 points ‐ Smoothing and averaging are off ‐ Calibration substrate: Use CSR-8 to perform calibration processing at the tip of the probe before measurement

Regarding Examples 1, 2, and 4 in which the surface treatment of the first wiring layer 16 was performed, the transmission loss (dB/cm) at 50 GHz was compared with that of Example 3 to calculate the improvement rate (%) of the transmission loss. For reference, the frequency characteristics of the transmission loss in Examples 1 and 3 are shown in FIG7, and the frequency characteristics of the transmission loss in Examples 2 and 3 are also shown in FIG8. On the other hand, regarding Examples 5 and 6 in which the surface treatment of the first wiring layer was not performed, the transmission loss (dB/cm) at 50 GHz was compared with that of Example 7 to calculate the improvement rate (%) of the transmission loss. For reference, the frequency characteristics of the transmission loss in Examples 5 and 7 are shown in FIG9 , and the frequency characteristics of the transmission loss in Examples 6 and 7 are shown in FIG10 . The results are shown in Table 1 .

<Measurement of peel strength> For the first wiring layer 16 of each sample of Example 1 to Example 7 obtained by the step (4) of lamination of the second insulating layer, a copper wiring with a wiring width of 10 mm and a wiring thickness of 18 μm was formed by a subtractive method, and the peel strength was measured at room temperature (25°C) in accordance with JIS C 6481-1996. The measurement was performed 5 times, and the average value was taken as the value of the peel strength. Furthermore, the peel strength measured here reflects the values of four peel modes, namely, interfacial peeling between insulating layers, cohesive failure of resin, interfacial peeling within the insulating layer, and interfacial peeling between the insulating layer and the wiring layer. The higher the value, the better the adhesion of the prepreg to the insulating layer, the strength of the insulating layer, and the adhesion of the resin to the wiring layer. The results are shown in Table 1.

<Heat resistance evaluation> The laminate 18 was cut into test pieces of 5 cm × 5 cm in size, floated in a 288°C solder bath for 10 minutes, and observed for bulges and bubbles. Four test pieces were prepared and evaluated according to the following criteria. For Examples 1 and 2, two types of evaluation were performed: those that had implemented the above-mentioned (6) hardening treatment of the first insulating layer and those that had not. The results are shown in Table 1. ‐Evaluation A: No expansion occurred in all test pieces ‐Evaluation C: Expansion of less than 5 mm in diameter occurred in more than 1 test piece at more than 1 place but less than 3 places ‐Evaluation D: Expansion of less than 5 mm in diameter occurred in more than 3 places in more than 1 test piece, or Expansion of more than 5 mm in diameter occurred in more than 1 test piece at more than 1 place

10: copper-clad laminate 12: substrate 13: third insulating layer 14: copper foil 16: first wiring layer 18: laminate 20: first insulating layer 22: support 24: laminate sheet 26: second insulating layer 28: resin layer 30: copper layer 32: copper-clad laminate 34: fourth insulating layer T ₀ : thickness of first insulating layer T ₁ : thickness of first wiring layer

[FIG. 1] A schematic cross-sectional view showing a step flow chart of an example of a method for manufacturing a circuit substrate of the present invention, showing a diagram of the first half of the step (steps (i) to (iv)). [FIG. 2] A schematic cross-sectional view showing a step flow chart of an example of a method for manufacturing a circuit substrate of the present invention, showing a diagram of the second half of the step (steps (v) to (vii)) following FIG. 1. [FIG. 3] A variation of steps (i) and (ii) of FIG. 1, showing a schematic cross-sectional view of forming a first wiring layer using a copper-clad laminate having a third insulating layer interposed between a substrate and a copper foil. [FIG. 4] A diagram for illustrating the thickness _T0 of the first insulating layer on the first wiring layer and the thickness _T1 of the first wiring layer. [Figure 5] Schematic cross-sectional view of the laminated body produced in Example 1. [Figure 6] Schematic cross-sectional view of the laminated body produced in Example 2. [Figure 7] Graph showing the frequency characteristics of the transmission loss in Examples 1 and 3. [Figure 8] Graph showing the frequency characteristics of the transmission loss in Examples 2 and 3. [Figure 9] Graph showing the frequency characteristics of the transmission loss in Examples 5 and 7. [Figure 10] Graph showing the frequency characteristics of the transmission loss in Examples 6 and 7.

10: Copper clad laminate

12: Base material

14: Copper foil

16: 1st wiring layer

18: Layered body

20: 1st insulating layer

22: Support body

24: Laminated slices

Claims (8)

A method for manufacturing a circuit board, comprising: (a) a step of forming a first wiring layer on at least one side of a substrate to obtain a laminate; (b) a step of performing surface treatment on the first wiring layer; (c) a step of laminating a first insulating layer on the surface of the laminate including the first wiring layer in such a manner that the first wiring layer subjected to surface treatment is embedded in the first insulating layer; and, (d) a step of laminating a second insulating layer on the surface of the first insulating layer opposite to the substrate; The first insulating layer does not contain glass fibers, and the dielectric loss tangent of the first insulating layer is smaller than the dielectric loss tangent of the second insulating layer. The second insulating layer contains glass fibers. A method for manufacturing a circuit substrate as claimed in claim 1, wherein the thickness of the second insulating layer is greater than 20 μm. The method for manufacturing a circuit board according to claim 1 or 2, wherein a ratio T ₀ /T ₁ of a thickness T ₀ of the first insulating layer on the first wiring layer to a thickness T 1 of the first wiring layer is not less than _0.1 and not more than 2.0. A method for manufacturing a circuit substrate as claimed in claim 1 or 2, wherein the aforementioned step (a) includes interposing a third insulating layer between the aforementioned substrate and the aforementioned first wiring layer, the aforementioned third insulating layer does not contain glass fiber, and the dielectric loss tangent of the aforementioned third insulating layer is smaller than the dielectric loss tangent of the aforementioned second insulating layer. A method for manufacturing a circuit substrate as claimed in claim 1 or 2, wherein the step (c) is performed by laminating a laminate sheet comprising a copper support body and the first insulating layer on the laminate body in such a manner that the first insulating layer is in contact with the first wiring layer, and then removing the copper support body from the laminate sheet. A method for manufacturing a circuit substrate as claimed in claim 1 or 2, wherein the second insulating layer is composed of a semi-hardened resin and the glass fiber, and the method for manufacturing the circuit substrate further comprises: (e) laminating a copper-clad laminate comprising a hardened resin layer and copper layers disposed on both sides thereof on the surface of the second insulating layer in such a manner that the copper layer contacts the second insulating layer; and, (f) A step of pressurizing the laminated body on which the copper-clad laminate is laminated, thereby bonding the first insulating layer, the second insulating layer and the copper-clad laminate at one time. In the method for manufacturing a circuit substrate of claim 1 or 2, the first wiring layer is a signal line for high-frequency transmission. A circuit substrate is manufactured by the method of claim 1 or 2.

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