TW201534631A - Bottom filling material and method of manufacturing semiconductor device using same - Google Patents
Bottom filling material and method of manufacturing semiconductor device using same Download PDFInfo
- Publication number
- TW201534631A TW201534631A TW103131084A TW103131084A TW201534631A TW 201534631 A TW201534631 A TW 201534631A TW 103131084 A TW103131084 A TW 103131084A TW 103131084 A TW103131084 A TW 103131084A TW 201534631 A TW201534631 A TW 201534631A
- Authority
- TW
- Taiwan
- Prior art keywords
- resin
- underfill material
- epoxy resin
- acid anhydride
- solder
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, the devices being individual devices of subclass H10D or integrated devices of class H10
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/293—Organic, e.g. plastic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68377—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support with parts of the auxiliary support remaining in the finished device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1302—Disposition
- H01L2224/13025—Disposition the bump connector being disposed on a via connection of the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
- H01L2224/13111—Tin [Sn] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13147—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
- H01L2224/16146—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked the bump connector connecting to a via connection in the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16238—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area protruding from the surface of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/27001—Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
- H01L2224/27003—Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate for holding or transferring the layer preform
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/271—Manufacture and pre-treatment of the layer connector preform
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
- H01L2224/29191—The principal constituent being an elastomer, e.g. silicones, isoprene, neoprene
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29199—Material of the matrix
- H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29199—Material of the matrix
- H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
- H01L2224/29291—The principal constituent being an elastomer, e.g. silicones, isoprene, neoprene
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/29386—Base material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2224/29387—Ceramics, e.g. crystalline carbides, nitrides or oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/731—Location prior to the connecting process
- H01L2224/73101—Location prior to the connecting process on the same surface
- H01L2224/73103—Bump and layer connectors
- H01L2224/73104—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/812—Applying energy for connecting
- H01L2224/81201—Compression bonding
- H01L2224/81203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
- H01L2224/81204—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding with a graded temperature profile
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
- H01L2224/81815—Reflow soldering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/832—Applying energy for connecting
- H01L2224/83201—Compression bonding
- H01L2224/83203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
- H01L2224/83204—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding with a graded temperature profile
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
- H01L2224/83862—Heat curing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9211—Parallel connecting processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9212—Sequential connecting processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
- H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
- H01L25/0657—Stacked arrangements of devices
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Wire Bonding (AREA)
- Epoxy Resins (AREA)
Abstract
本發明提供一種抑制焊料之過度壓碎而實現良好之焊接性之底部填充材料、及使用其之半導體裝置之製造方法。本發明使用底部填充材料(20),其含有膜形成樹脂、環氧樹脂、酸酐、丙烯酸樹脂、及有機過氧化物,該膜形成樹脂含有丙烯酸橡膠聚合物。由於含有丙烯酸橡膠聚合物作為膜形成樹脂,故可抑制焊料之過度壓碎而實現良好之焊接性。 The present invention provides an underfill material which suppresses excessive crushing of solder to achieve good solderability, and a method of manufacturing a semiconductor device using the same. The present invention uses an underfill material (20) comprising a film forming resin, an epoxy resin, an acid anhydride, an acrylic resin, and an organic peroxide, the film forming resin containing an acrylic rubber polymer. Since the acrylic rubber polymer is contained as the film-forming resin, excessive crushing of the solder can be suppressed to achieve good weldability.
Description
本發明係關於一種用於構裝半導體晶片之底部填充材料、及使用其之半導體裝置之製造方法。 The present invention relates to an underfill material for structuring a semiconductor wafer, and a method of fabricating a semiconductor device using the same.
近年來,於半導體晶片之構裝方法中,為了縮短步驟,業界正研究使用在半導體IC(Integrated Circuit,積體電路)電極上貼附底部填充膜之「預供給型底部填充膜(PUF:Pre-applied Underfill Film)」。 In recent years, in the semiconductor wafer mounting method, in order to shorten the steps, the industry is investigating the use of a pre-supply underfill film (PUF: Pre) on which an underfill film is attached to a semiconductor IC (Integrated Circuit) electrode. -applied Underfill Film)".
使用該預供給型底部填充膜之構裝方法例如藉由如下方式進行(例如參照專利文獻1)。 The method of using the pre-feed type underfill film is carried out, for example, by the following method (for example, refer to Patent Document 1).
步驟A:於晶圓上貼附底部填充膜,進行切割而獲得半導體晶片。 Step A: attaching an underfill film to the wafer and performing dicing to obtain a semiconductor wafer.
步驟B:於貼合有底部填充膜之狀態下,將半導體晶片位置對準而搭載。 Step B: The semiconductor wafer is aligned and mounted while the underfill film is bonded.
步驟C:將半導體晶片熱壓接,藉由焊點凸塊之金屬鍵而確保傳導,及藉由底部填充膜之硬化而進行接著。 Step C: The semiconductor wafer is thermocompression bonded, the conduction is ensured by the metal bonds of the bump bumps, and the bonding is performed by hardening of the underfill film.
關於此種構裝方法,提出有使用環氧樹脂作為接合焊點凸塊之接著劑的熱硬化接著劑。關於該接著劑,提出有藉由使用酸酐作為環氧 樹脂之硬化劑,去除焊點凸塊表面之氧化膜,而使焊接性變得良好的調配組成(例如參照專利文獻2)。然而,於使用酸酐之情形時,焊接性雖然良好,但有時硬化慢而過度壓碎焊點凸塊。 Regarding such a bonding method, a thermosetting adhesive using an epoxy resin as an adhesive for a bump of a bonding pad has been proposed. Regarding the adhesive, it is proposed to use an acid anhydride as an epoxy. The resin hardener removes the oxide film on the surface of the bump bump to improve the weldability (see, for example, Patent Document 2). However, in the case of using an acid anhydride, although the weldability is good, sometimes the hardening is slow and the solder bump is excessively crushed.
[專利文獻1]日本特開2005-28734號公報 [Patent Document 1] Japanese Patent Laid-Open Publication No. 2005-28734
[專利文獻2]日本特開2006-335817號公報 [Patent Document 2] Japanese Patent Laid-Open Publication No. 2006-335817
本發明係鑒於此種習知之實際情況而提出者,提供一種抑制焊料之過度壓碎而實現良好焊接性之底部填充材料、及使用其之半導體裝置之製造方法。 The present invention has been made in view of such conventional circumstances, and provides an underfill material which suppresses excessive crushing of solder to achieve good solderability, and a method of manufacturing a semiconductor device using the same.
為了解決上述課題,本發明係一種於將形成有附焊料電極之半導體晶片搭載於形成有與附焊料電極對向之對向電極的電子零件之前,被預先貼合於半導體晶片的底部填充材料,其特徵在於:含有膜形成樹脂、環氧樹脂、酸酐、丙烯酸樹脂、及有機過氧化物,上述膜形成樹脂含有丙烯酸橡膠聚合物。 In order to solve the above problems, the present invention is an underfill material that is bonded to a semiconductor wafer in advance before a semiconductor wafer on which a solder electrode is formed is mounted on an electronic component on which a counter electrode facing the solder electrode is formed. It is characterized by comprising a film forming resin, an epoxy resin, an acid anhydride, an acrylic resin, and an organic peroxide, and the film forming resin contains an acrylic rubber polymer.
又,本發明之半導體裝置之製造方法的特徵在於具有:搭載步驟:將形成有附焊料電極且於該電極面貼合有底部填充材料之半導體晶片搭載於形成有與上述附焊料電極對向之對向電極的電子零件;及熱壓接步驟:將上述半導體晶片與上述電子零件以既定升溫速度自第1溫度升溫至第2溫度而進行熱壓接,上述底部填充材料含有膜形成樹脂、環氧樹脂、酸酐、丙烯酸樹脂、 及有機過氧化物,上述膜形成樹脂含有丙烯酸橡膠聚合物。 Moreover, the method of manufacturing a semiconductor device according to the present invention includes a mounting step of mounting a semiconductor wafer having a solder electrode and having an underfill material bonded to the electrode surface, and forming a semiconductor wafer opposite to the solder electrode. An electronic component of the counter electrode; and a thermocompression bonding step of thermocompression bonding the semiconductor wafer and the electronic component from a first temperature to a second temperature at a predetermined temperature increase rate, wherein the underfill material includes a film forming resin and a ring Oxygen resin, acid anhydride, acrylic resin, And the organic peroxide, the film forming resin contains an acrylic rubber polymer.
根據本發明,由於有含丙烯酸橡膠聚合物作為膜形成樹脂,故可抑制焊料之過度壓碎而實現良好之焊接性。 According to the present invention, since the acrylic rubber-containing polymer is used as the film-forming resin, excessive crushing of the solder can be suppressed to achieve good weldability.
1‧‧‧晶圓 1‧‧‧ wafer
2‧‧‧底部填充膜 2‧‧‧ underfill film
3‧‧‧治具 3‧‧‧ fixture
4‧‧‧刀片 4‧‧‧blade
10‧‧‧半導體晶片 10‧‧‧Semiconductor wafer
11‧‧‧半導體 11‧‧‧ Semiconductor
12‧‧‧電極 12‧‧‧ electrodes
13‧‧‧焊料 13‧‧‧ solder
20‧‧‧底部填充材料 20‧‧‧ Underfill material
21‧‧‧接著劑層 21‧‧‧ adhesive layer
30‧‧‧電路基板 30‧‧‧ circuit board
31‧‧‧基材 31‧‧‧Substrate
32‧‧‧對向電極 32‧‧‧ opposite electrode
圖1係示意地表示搭載前之半導體晶片與電路基板之剖面圖。 Fig. 1 is a cross-sectional view schematically showing a semiconductor wafer and a circuit board before mounting.
圖2係示意地表示搭載時之半導體晶片與電路基板之剖面圖。 Fig. 2 is a cross-sectional view schematically showing a semiconductor wafer and a circuit board at the time of mounting.
圖3係示意地表示熱壓接後之半導體晶片與電路基板之剖面圖。 Fig. 3 is a cross-sectional view schematically showing a semiconductor wafer and a circuit board after thermocompression bonding.
圖4係表示本實施形態之半導體裝置之製造方法的流程圖。 Fig. 4 is a flow chart showing a method of manufacturing the semiconductor device of the embodiment.
圖5係示意地表示在晶圓上貼附底部填充膜之步驟之立體圖。 Fig. 5 is a perspective view schematically showing a step of attaching an underfill film to a wafer.
圖6係示意地表示切割晶圓之步驟之立體圖。 Fig. 6 is a perspective view schematically showing a step of cutting a wafer.
圖7係示意地表示拾取半導體晶片之步驟之立體圖。 Fig. 7 is a perspective view schematically showing a step of picking up a semiconductor wafer.
以下,按照下述順序對本發明之實施形態進行詳細說明。 Hereinafter, embodiments of the present invention will be described in detail in the following order.
1.底部填充材料 Underfill material
2.半導體裝置之製造方法 2. Method of manufacturing a semiconductor device
3.實施例 3. Embodiment
<1.底部填充材料> <1. Underfill material>
本實施形態之底部填充材料係於將形成有附焊料電極之半導體晶片搭載於形成有與附焊料電極對向之對向電極的電子零件之前,預先貼合於半 導體晶片者。 The underfill material of the present embodiment is attached to the semiconductor component before the semiconductor wafer on which the solder electrode is formed is mounted on the electronic component on which the counter electrode is opposed to the solder electrode. Conductor chip.
圖1係示意地表示搭載前之半導體晶片與電路基板之剖面圖,圖2係示意地表示搭載時之半導體晶片與電路基板之剖面圖,及圖3係示意地表示熱壓接後之半導體晶片與電路基板之剖面圖。 1 is a cross-sectional view schematically showing a semiconductor wafer and a circuit board before mounting, FIG. 2 is a cross-sectional view schematically showing a semiconductor wafer and a circuit board during mounting, and FIG. 3 is a view schematically showing a semiconductor wafer after thermocompression bonding A cross-sectional view of the circuit board.
如圖1~圖3所示,本實施形態之底部填充材料20係預先貼合於形成有附焊料電極之半導體晶片10的電極面而使用,利用底部填充材料20硬化而成之接著層21,將半導體晶片10與形成有與附焊料電極對向之對向電極之電路基板30進行接合。 As shown in FIG. 1 to FIG. 3, the underfill material 20 of the present embodiment is used in advance to be bonded to the electrode surface of the semiconductor wafer 10 on which the solder electrode is attached, and the underlayer 21 is cured by the underfill material 20, The semiconductor wafer 10 is bonded to the circuit substrate 30 on which the counter electrode facing the solder electrode is formed.
半導體晶片10於矽等半導體11表面形成有積體電路,並具有稱為凸塊之連接用附焊料電極。附焊料電極係於由銅等構成之電極12上接合有焊料13者,且具有將電極12厚度與焊料13厚度合計之厚度。 The semiconductor wafer 10 has an integrated circuit formed on the surface of the semiconductor 11 such as germanium, and has a solder electrode for connection called a bump. The solder electrode is bonded to the electrode 12 made of copper or the like and has a thickness in which the thickness of the electrode 12 and the thickness of the solder 13 are combined.
作為焊料,可使用Sn-37Pb共晶焊料(熔點183℃)、Sn-Bi焊料(熔點139℃)、Sn-3.5Ag(熔點221℃)、Sn-3.0Ag-0.5Cu(熔點217℃)、Sn-5.0Sb(熔點240℃)等。 As the solder, Sn-37Pb eutectic solder (melting point 183 ° C), Sn-Bi solder (melting point 139 ° C), Sn-3.5 Ag (melting point 221 ° C), Sn-3.0 Ag-0.5 Cu (melting point 217 ° C), Sn-5.0Sb (melting point 240 ° C) and the like.
電路基板30於例如硬質基板、可撓性基板等基材31上形成電路。又,於搭載半導體晶片10之構裝部形成有對向電極32,該對向電極32在與半導體晶片10之附焊料電極對向之位置形成具有既定厚度。 The circuit board 30 forms an electric circuit on a base material 31 such as a rigid substrate or a flexible substrate. Further, a counter electrode 32 is formed on the mounting portion on which the semiconductor wafer 10 is mounted, and the counter electrode 32 has a predetermined thickness at a position facing the solder electrode of the semiconductor wafer 10.
底部填充材料20含有膜形成樹脂、環氧樹脂、酸酐、丙烯酸樹脂、及有機過氧化物。 The underfill material 20 contains a film forming resin, an epoxy resin, an acid anhydride, an acrylic resin, and an organic peroxide.
膜形成樹脂相當於重量平均分子量為10×104以上之高分子量樹脂,就膜形成性之觀點而言,較佳為10×104~100×104之重量平均分子量。作為膜形成樹脂,可使用丙烯酸橡膠聚合物、苯氧基樹脂、環氧樹脂、 改質環氧樹脂、胺基甲酸酯樹脂等各種樹脂。該等膜形成樹脂可單獨使用1種,亦可組合2種以上而使用。該等之中,就膜強度及接著性之觀點而言,本實施形態較佳使用具有環氧丙基之丙烯酸橡膠聚合物。又,丙烯酸橡膠聚合物之玻璃轉移溫度Tg較佳為-30℃以上20℃以下。藉此,可提高底部填充材料20之可撓性。 The film-forming resin corresponds to a high molecular weight resin having a weight average molecular weight of 10 × 10 4 or more, and from the viewpoint of film formability, a weight average molecular weight of 10 × 10 4 to 100 × 10 4 is preferable. As the film forming resin, various resins such as an acrylic rubber polymer, a phenoxy resin, an epoxy resin, a modified epoxy resin, and a urethane resin can be used. These film-forming resins may be used alone or in combination of two or more. Among these, from the viewpoint of film strength and adhesion, in the present embodiment, an acrylic rubber polymer having a glycidyl group is preferably used. Further, the glass transition temperature Tg of the acrylic rubber polymer is preferably from -30 ° C to 20 ° C. Thereby, the flexibility of the underfill material 20 can be improved.
作為環氧樹脂,例如可列舉:倍環戊二烯型環氧樹脂、縮水甘油醚型環氧樹脂、縮水甘油胺型環氧樹脂、雙酚A型環氧樹脂、雙酚F型環氧樹脂、雙酚S型環氧樹脂、螺環型環氧樹脂、萘型環氧樹脂、聯苯型環氧樹脂、萜烯型環氧樹脂、四溴雙酚A型環氧樹脂、甲酚酚醛清漆型環氧樹脂、苯酚酚醛清漆型環氧樹脂、α-萘酚酚醛清漆型環氧樹脂、溴化苯酚酚醛清漆型環氧樹脂等。該等環氧樹脂可單獨使用1種,亦可組合2種以上而使用。該等之中,就高接著性、耐熱性之方面而言,本實施形態較佳使用倍環戊二烯型環氧樹脂。 Examples of the epoxy resin include a pentacyclopentadiene type epoxy resin, a glycidyl ether type epoxy resin, a glycidylamine type epoxy resin, a bisphenol A type epoxy resin, and a bisphenol F type epoxy resin. , bisphenol S type epoxy resin, spiral ring type epoxy resin, naphthalene type epoxy resin, biphenyl type epoxy resin, terpene type epoxy resin, tetrabromobisphenol A type epoxy resin, cresol novolac Type epoxy resin, phenol novolac type epoxy resin, α-naphthol novolac type epoxy resin, brominated phenol novolak type epoxy resin, and the like. These epoxy resins may be used alone or in combination of two or more. Among these, a pentacyclopentadiene type epoxy resin is preferably used in the present embodiment in terms of high adhesion and heat resistance.
酸酐具有去除焊料表面之氧化膜之助熔功能,因此可獲得優異之連接可靠性。作為酸酐,例如可列舉:四丙烯基琥珀酸酐、十二烯基琥珀酸酐等脂肪族酸酐,六氫鄰苯二甲酸酐、甲基四氫鄰苯二甲酸酐等脂環式酸酐,鄰苯二甲酸酐、偏苯三甲酸酐、均苯四甲酸二酐等芳香族酸酐等。該等環氧硬化劑可單獨使用1種,亦可組合2種以上而使用。該等環氧硬化劑之中,就該等中之焊料連接性之方面而言,較佳使用脂肪族酸酐。 The acid anhydride has a fluxing function of removing an oxide film on the surface of the solder, so that excellent connection reliability can be obtained. Examples of the acid anhydride include aliphatic acid anhydrides such as tetrapropenyl succinic anhydride and dodecenyl succinic anhydride; alicyclic acid anhydrides such as hexahydrophthalic anhydride and methyltetrahydrophthalic anhydride; and phthalic acid. An aromatic acid anhydride such as formic anhydride, trimellitic anhydride or pyromellitic dianhydride. These epoxy curing agents may be used alone or in combination of two or more. Among these epoxy hardeners, aliphatic acid anhydrides are preferably used in terms of solder connectivity in these.
又,較佳添加硬化促進劑。作為硬化促進劑之具體例,可列舉:2-甲基咪唑、2-乙基咪唑、2-乙基-4-甲基咪唑等咪唑類、1,8-二氮雙環(5,4,0)十一烯-7鹽(DBU鹽)、2-(二甲基胺基甲基)苯酚等三級 胺類、三苯基膦等膦類、辛酸錫等金屬化合物等。 Further, it is preferred to add a hardening accelerator. Specific examples of the curing accelerator include imidazoles such as 2-methylimidazole, 2-ethylimidazole, and 2-ethyl-4-methylimidazole, and 1,8-diazabicyclo (5,4,0). Tertiary-7 salt (DBU salt), 2-(dimethylaminomethyl)phenol, etc. A metal compound such as an amine or a phosphine such as triphenylphosphine or tin octylate.
作為丙烯酸樹脂,可使用單官能(甲基)丙烯酸酯、2官能以上之(甲基)丙烯酸酯。作為單官能(甲基)丙烯酸酯,可列舉:(甲基)丙烯酸甲酯、(甲基)丙烯酸乙酯、(甲基)丙烯酸正丙酯、(甲基)丙烯酸異丙酯、(甲基)丙烯酸正丁酯等。作為2官能以上之(甲基)丙烯酸酯,可列舉:雙酚F-EO改質二(甲基)丙烯酸酯、雙酚A-EO改質二(甲基)丙烯酸酯、三羥甲基丙烷PO改質(甲基)丙烯酸酯、多官能(甲基)丙烯酸胺基甲酸酯等。該等丙烯酸樹脂可單獨使用,亦可組合2種以上而使用。該等之中,本實施形態較佳使用2官能(甲基)丙烯酸酯。 As the acrylic resin, a monofunctional (meth) acrylate or a bifunctional or higher (meth) acrylate can be used. Examples of the monofunctional (meth) acrylate include methyl (meth) acrylate, ethyl (meth) acrylate, n-propyl (meth) acrylate, isopropyl (meth) acrylate, and (methyl). ) n-butyl acrylate and the like. Examples of the bifunctional or higher (meth) acrylate include bisphenol F-EO modified di(meth)acrylate, bisphenol A-EO modified di(meth)acrylate, and trimethylolpropane. PO is modified with (meth) acrylate, polyfunctional (meth) acrylate urethane, and the like. These acrylic resins may be used singly or in combination of two or more. Among these, in the present embodiment, a bifunctional (meth) acrylate is preferably used.
作為有機過氧化物,例如可列舉:過氧化酯、過氧縮酮、過氧化氫、過氧化二烷基、過氧化二醯基、過氧化二碳酸酯等。該等有機過氧化物可單獨使用,亦可組合2種以上而使用。該等之中,本實施形態較佳使用過氧化酯。 Examples of the organic peroxide include peroxyester, peroxyketal, hydrogen peroxide, dialkyl peroxide, dinonyl peroxide, and peroxydicarbonate. These organic peroxides may be used singly or in combination of two or more. Among these, in the present embodiment, a peroxyester is preferably used.
又,作為其他添加組成物,較佳含有無機填料。藉由含有無機填料,可調整壓接時之樹脂層的流動性。作為無機填料,可使用矽石、滑石、氧化鈦、碳酸鈣、氧化鎂等。 Moreover, as another additive composition, it is preferable to contain an inorganic filler. By containing an inorganic filler, the fluidity of the resin layer at the time of pressure bonding can be adjusted. As the inorganic filler, vermiculite, talc, titanium oxide, calcium carbonate, magnesium oxide, or the like can be used.
並且,亦可視需要添加環氧系、胺基系、巰基-硫醚系、脲基系等之矽烷偶合劑。 Further, a decane coupling agent such as an epoxy group, an amine group, a mercapto-thioether system or a urea group may be added as needed.
藉由如此併用硬化反應相對較慢之環氧系、與硬化反應相對較快之丙烯酸,可抑制焊料之過度壓碎而實現良好之焊接性。具體而言,環氧樹脂與酸酐之合計質量和丙烯酸樹脂與有機過氧化物之合計質量的比較佳為7:3~3:7。藉此,可獲得實現無空隙構裝及良好焊接性之底部填 充材料。 By using an epoxy-based epoxy resin having a relatively slow curing reaction and a relatively fast curing reaction, it is possible to suppress excessive crushing of the solder and achieve good solderability. Specifically, the total mass of the epoxy resin and the acid anhydride and the total mass of the acrylic resin and the organic peroxide are preferably from 7:3 to 3:7. Thereby, an underfill can be obtained which realizes a void-free structure and good weldability. Fill the material.
其次,對上述底部填充材料形成為膜狀之預供給型底部填充膜之製造方法進行說明。首先,使含有膜形成樹脂、環氧樹脂、酸酐、丙烯酸樹脂、及有機過氧化物之接著劑組成物溶解於溶劑中。作為溶劑,可使用甲苯、乙酸乙酯等、或該等之混合溶劑。於製備樹脂組成物後,利用棒式塗佈機、塗佈裝置等塗佈於剝離基材上。 Next, a method of producing the pre-filled underfill film in which the underfill material is formed into a film shape will be described. First, an adhesive composition containing a film-forming resin, an epoxy resin, an acid anhydride, an acrylic resin, and an organic peroxide is dissolved in a solvent. As the solvent, toluene, ethyl acetate or the like, or a mixed solvent of these may be used. After the resin composition is prepared, it is applied onto a release substrate by a bar coater, a coating device, or the like.
剝離基材例如係由如下積層構造構成,而防止組成物之乾燥,並且維持組成物之形狀,上述積層構造係將聚矽氧等剝離劑塗佈於PET(Poly Ethylene Terephthalate,聚對苯二甲酸乙二酯)、OPP(Oriented Polypropylene,延伸聚丙烯)、PMP(Poly-4-methylpentene-1,聚-4-甲基戊烯-1)、PTFE(Polytetrafluoroethylene,聚四氟乙烯)等而成。 The release substrate is composed of, for example, a laminated structure that prevents drying of the composition and maintains the shape of the composition. The laminate structure is applied to a PET (Poly Ethylene Terephthalate, polyethylene terephthalate). Ethylene diester), OPP (Oriented Polypropylene), PMP (Poly-4-methylpentene-1, poly-4-methylpentene-1), PTFE (Polytetrafluoroethylene, polytetrafluoroethylene).
其次,藉由熱烘箱、加熱乾燥裝置等使塗佈於剝離基材上之樹脂組成物乾燥。藉此,可獲得既定厚度之預供給型底部填充膜。 Next, the resin composition applied to the release substrate is dried by a hot oven, a heating and drying device or the like. Thereby, a pre-supply underfill film having a predetermined thickness can be obtained.
<2.半導體裝置之製造方法> <2. Method of Manufacturing Semiconductor Device>
其次,對使用上述預供給型底部填充膜之半導體裝置之製造方法進行說明。 Next, a method of manufacturing a semiconductor device using the above-described pre-supply underfill film will be described.
圖4係表示本實施形態之半導體裝置的製造方法之流程圖。如圖4所示,本實施形態之半導體裝置之製造方法含有:底部填充膜貼附步驟S1、切割步驟S2、半導體晶片搭載步驟S3、及熱壓接步驟S4。 Fig. 4 is a flow chart showing a method of manufacturing the semiconductor device of the embodiment. As shown in FIG. 4, the manufacturing method of the semiconductor device of this embodiment includes an underfill film attaching step S1, a dicing step S2, a semiconductor wafer mounting step S3, and a thermocompression bonding step S4.
圖5係示意地表示在晶圓上貼附底部填充膜之步驟的立體圖。如圖5所示,底部填充膜貼附步驟S1係藉由具有大於晶圓1直徑之直徑且具有環狀或框狀框架的治具3以固定晶圓1,於晶圓1上貼附底部填充 膜2。底部填充膜2係於切割晶圓1時保護並固定晶圓1,於拾取時作為保持之切割膠帶發揮功能。再者,於晶圓1內嵌製作有大量IC(Integrated Circuit),於晶圓1之接著面對每個如圖1所示般藉由劃線劃分之半導體晶片10設置附焊料電極。 Fig. 5 is a perspective view schematically showing a step of attaching an underfill film to a wafer. As shown in FIG. 5, the underfill film attaching step S1 is to fix the wafer 1 by attaching the jig 3 having a diameter larger than the diameter of the wafer 1 and having a ring-shaped or frame-like frame, and attaching the bottom to the wafer 1. filling Membrane 2. The underfill film 2 protects and fixes the wafer 1 when the wafer 1 is diced, and functions as a dicing tape to be held at the time of picking up. Further, a large number of ICs (Integrated Circuits) are embedded in the wafer 1, and a solder electrode is disposed on the wafer 1 to the semiconductor wafer 10 which is divided by the scribe lines as shown in FIG.
圖6係示意地表示切割晶圓之步驟之立體圖。如圖6所示,切割步驟S2係沿劃線按壓刀片4來切削晶圓1,而分割成各個半導體晶片。 Fig. 6 is a perspective view schematically showing a step of cutting a wafer. As shown in FIG. 6, the cutting step S2 presses the blade 4 along the scribe line to cut the wafer 1 and divides it into individual semiconductor wafers.
圖7係示意地表示拾取半導體晶片之步驟之立體圖。如圖7所示,各附底部填充膜之半導體晶片10係於保持底部填充膜之狀態下被拾取。 Fig. 7 is a perspective view schematically showing a step of picking up a semiconductor wafer. As shown in FIG. 7, each of the semiconductor wafers 10 with the underfill film is picked up while maintaining the underfill film.
如圖2所示,半導體晶片搭載步驟S3係將附底部填充膜之半導體晶片10與電路基板30經由底部填充膜進行配置。又,將附底部填充膜之半導體晶片10以附焊料電極與對向電極32對向之方式進行位置對準而配置。然後,藉由加熱接合機,於使底部填充膜產生流動性但未發生正式硬化之程度的既定溫度、壓力、時間之條件下進行加熱按壓而搭載。 As shown in FIG. 2, in the semiconductor wafer mounting step S3, the semiconductor wafer 10 with the underfill film and the circuit substrate 30 are placed via the underfill film. Further, the semiconductor wafer 10 with the underfill film is placed in such a manner that the solder electrodes are aligned with the counter electrode 32. Then, by heating the bonding machine, the underfill film is heated and pressed under the conditions of a predetermined temperature, pressure, and time to which fluidity is generated without causing the main hardening.
搭載時之溫度條件較佳為30℃以上155℃以下。又,壓力條件較佳為50N以下,更佳為40N以下。又,時間條件較佳為0.1秒以上10秒以下,更佳為0.1秒以上1.0秒以下。藉此,可成為不使附焊料電極熔融而與電路基板30側之電極接觸之狀態,可成為底部填充膜未完全硬化之狀態。又,由於在低溫下進行固定,故可抑制空隙之產生,減少對半導體晶片10之損壞。 The temperature condition at the time of mounting is preferably 30 ° C or more and 155 ° C or less. Further, the pressure condition is preferably 50 N or less, more preferably 40 N or less. Further, the time condition is preferably 0.1 second or longer and 10 seconds or shorter, more preferably 0.1 second or longer and 1.0 second or shorter. Thereby, the solder electrode can be melted and brought into contact with the electrode on the circuit board 30 side, and the underfill film can be in a state in which it is not completely cured. Moreover, since the fixing is performed at a low temperature, generation of voids can be suppressed, and damage to the semiconductor wafer 10 can be reduced.
以下之熱壓接步驟S4例如係於以既定升溫速度自第1溫度升溫至第2溫度之接合條件下,使附焊料電極之焊料熔融而形成金屬鍵, 並且使底部填充膜完全硬化。 In the following thermocompression bonding step S4, for example, the solder of the solder electrode is melted to form a metal bond under the bonding condition of raising the temperature from the first temperature to the second temperature at a predetermined temperature increase rate. And the underfill film is completely hardened.
第1溫度較佳為與底部填充材料之最低熔融黏度到達溫度大致相同,較佳為50℃以上150℃以下。藉此,可使底部填充材料之硬化行為與接合條件吻合,可抑制空隙之產生。 The first temperature is preferably substantially the same as the lowest melt viscosity reaching temperature of the underfill material, and is preferably 50 ° C or more and 150 ° C or less. Thereby, the hardening behavior of the underfill material can be matched with the bonding conditions, and the generation of voids can be suppressed.
又,升溫速度較佳為50℃/sec以上150℃/sec以下。又,第2溫度亦取決於焊料之種類,較佳為200℃以上280℃以下,更佳為220℃以上260℃以下。藉此,可使附焊料電極與基板電極進行金屬鍵結,並且使底部填充膜完全硬化,而將半導體晶片10之電極與電路基板30之電極電性地、機械性地連接。 Further, the temperature increase rate is preferably 50 ° C / sec or more and 150 ° C / sec or less. Further, the second temperature is also preferably 200 ° C or more and 280 ° C or less, more preferably 220 ° C or more and 260 ° C or less, depending on the type of the solder. Thereby, the solder electrode and the substrate electrode can be metal-bonded, and the underfill film can be completely cured, and the electrode of the semiconductor wafer 10 and the electrode of the circuit substrate 30 can be electrically and mechanically connected.
又,於熱壓接步驟S4中,接合頭至搭載後之底部填充膜的開始熔融溫度為止係藉由樹脂之彈性模數而保持為一定高度,其後因升溫所伴隨之樹脂熔融而瞬間下降,到達頭之最低點。該最低點係根據頭之下降速度與樹脂之硬化速度的關係而決定。樹脂硬化進一步進行後,頭之高度隨著樹脂及頭之熱膨脹而緩慢地上升。如此,藉由在自第1溫度升溫至第2溫度之時間內使接合頭下降至最低點,可抑制隨著樹脂熔融之空隙產生。 Further, in the thermocompression bonding step S4, the bonding temperature of the bonding head to the underfill film after mounting is maintained at a constant height by the elastic modulus of the resin, and then the resin is melted and rapidly drops due to the temperature rise. , reaching the lowest point of the head. The lowest point is determined by the relationship between the rate of decrease of the head and the hardening speed of the resin. After the resin hardening is further carried out, the height of the head gradually rises as the resin and the head thermally expand. As described above, by lowering the bonding head to the lowest point in the time from the first temperature rise to the second temperature, generation of voids due to melting of the resin can be suppressed.
如此,本實施形態之半導體裝置之製造方法藉由將底部填充材料預先貼合於形成有附焊料電極之半導體晶片10,可抑制焊料之過度壓碎而實現良好之焊接性,上述底部填充材料含有膜形成樹脂、環氧樹脂、酸酐、丙烯酸樹脂、及有機過氧化物,膜形成樹脂含有丙烯酸橡膠聚合物。 As described above, in the method of manufacturing a semiconductor device of the present embodiment, by bonding the underfill material to the semiconductor wafer 10 on which the solder electrode is formed in advance, it is possible to suppress excessive crushing of the solder and achieve good solderability, and the underfill material contains A film-forming resin, an epoxy resin, an acid anhydride, an acrylic resin, and an organic peroxide, and the film-forming resin contains an acrylic rubber polymer.
再者,上述實施形態係使底部填充膜作為切割膠帶發揮功能,但並不限定於此,亦可另外使用切割膠帶,於切割後使用底部填充膜 進行覆晶構裝。 Further, in the above embodiment, the underfill film functions as a dicing tape, but the present invention is not limited thereto, and a dicing tape may be additionally used, and an underfill film may be used after dicing. Perform a flip chip assembly.
[其他實施形態] [Other Embodiments]
又,本技術亦可應用於藉由向設置於半導體晶片之小孔內填充金屬,而電連接堆積成夾層狀之多個晶片基板的TSV(Through Silicon Via,矽穿孔)技術。 Further, the present technology can also be applied to a TSV (Through Silicon Via) technique in which a plurality of wafer substrates stacked in a sandwich shape are electrically connected by filling a metal hole in a semiconductor wafer.
即,亦可應用於將具有形成有附焊料電極之第一面、及於第一面之相反側形成有與附焊料電極對向之對向電極的第二面之多個晶片基板積層的半導體裝置之製造方法。 That is, it is also applicable to a semiconductor in which a plurality of wafer substrates having a first surface on which a solder electrode is formed and a second surface on which a counter electrode facing the solder electrode is formed on the opposite side of the first surface are laminated. The manufacturing method of the device.
於此情形時,於第一晶片基板之第一面側貼附有底部填充膜之狀態下,搭載於第二晶片基板之第二面。其後,可藉由在附焊料電極之焊料的熔點以上之溫度將第一晶片基板之第一面與第二晶片基板之第二面熱壓接,而獲得積層有多個晶片基板之半導體裝置。 In this case, the second wafer substrate is mounted on the second surface of the second wafer substrate with the underfill film attached to the first surface of the first wafer substrate. Thereafter, the first surface of the first wafer substrate and the second surface of the second wafer substrate are thermocompression bonded at a temperature above the melting point of the solder with the solder electrode to obtain a semiconductor device in which a plurality of wafer substrates are laminated. .
<3.實施例> <3. Example>
以下,對本發明之實施例進行說明。於本實施例中,製作預供給型底部填充膜。然後,使用底部填充膜將具有附焊料電極之第一IC晶片、及具有與其對向之電極之第二IC晶片連接而製作構裝體,對焊料伸出及焊接性進行評價。再者,本發明並不限定於該等實施例。 Hereinafter, embodiments of the invention will be described. In the present embodiment, a pre-feed type underfill film was produced. Then, a first IC wafer having a solder electrode and a second IC wafer having electrodes opposed thereto were bonded to each other to form a package using an underfill film, and solder extension and solderability were evaluated. Furthermore, the invention is not limited to the embodiments.
構裝體之製作、焊料伸出之評價及焊接性之評價係以如下方式進行。 The production of the package, the evaluation of the solder extension, and the evaluation of the weldability were carried out as follows.
[構裝體之製作] [Production of the body]
於50℃、0.5MPa之條件下利用壓製機將底部填充膜貼合於晶圓上,進 行切割而獲得具有附焊料電極之第一IC晶片。 The underfill film is bonded to the wafer by a press at 50 ° C and 0.5 MPa. The first IC wafer having the solder electrode is obtained by row cutting.
第一IC晶片係大小為7mm□,厚度為200μm,且具有周邊配置之凸塊(30μm、85μm間距、280針)者,該周邊配置之凸塊於厚度10μm之由Cu構成的電極前端形成有厚度10μm之焊料(Sn-3.5Ag、熔點221℃)。 The first IC chip has a size of 7 mm □, a thickness of 200 μm, and has a bump of a peripheral configuration ( In the case of 30 μm, 85 μm pitch, and 280 stitches, the bumps arranged in the periphery were formed with a solder having a thickness of 10 μm (Sn-3.5Ag, melting point: 221° C.) at the tip end of the electrode made of Cu having a thickness of 10 μm.
又,與其對向之第二IC晶片同樣具有大小為8mm□、厚度100μm且於由厚度10μm之Cu構成之電極前端形成有厚度10μm之焊料(Sn-3.5Ag、熔點221℃)的周邊配置之凸塊(30μm、85μm間距、280針)。 Further, similarly to the second IC wafer facing the same, it has a size of 8 mm □ and a thickness of 100 μm, and is formed in a peripheral portion of a solder having a thickness of 10 μm (Sn-3.5Ag, melting point: 221° C.) at the tip end of the electrode made of Cu having a thickness of 10 μm. Bump 30 μm, 85 μm pitch, 280 pins).
其次,於60℃、0.5秒、30N之條件下利用覆晶接合機將第一IC晶片搭載於第二IC晶片上。 Next, the first IC wafer was mounted on the second IC wafer by a flip chip bonding machine under conditions of 60 ° C, 0.5 second, and 30 N.
其後,於10秒內使溫度自60℃上升至250℃,利用覆晶接合機進行熱壓接。又,於自80℃升溫至250℃之時間內,使接合頭下降至最低點(30N)。進而,於150℃、2小時之條件進行硬化(cure)而獲得構裝體。再者,使用覆晶接合機時之溫度係藉由熱電偶測定樣品之實際溫度而得者。 Thereafter, the temperature was raised from 60 ° C to 250 ° C in 10 seconds, and thermocompression bonding was performed using a flip chip bonding machine. Further, the temperature was raised from 80 ° C to 250 ° C to lower the bonding head to the lowest point (30 N). Further, it was cured at 150 ° C for 2 hours to obtain a package. Further, the temperature at which the flip chip bonding machine is used is determined by measuring the actual temperature of the sample by a thermocouple.
[焊料伸出之評價] [Evaluation of solder extension]
切斷各構裝體,進行剖面研磨,利用SEM(Scanning Electron Microscope,掃描電子顯微鏡)觀察電極間之焊料伸出之狀態。將焊料伸出距離為7μm以下者評價為○,將焊料伸出距離超過7μm者評價為×。 Each of the structures was cut, and cross-section polishing was performed, and the state of solder extension between the electrodes was observed by SEM (Scanning Electron Microscope). When the solder protrusion distance was 7 μm or less, it was evaluated as ○, and when the solder protrusion distance exceeded 7 μm, it was evaluated as ×.
[焊接性之評價] [Evaluation of weldability]
切斷各構裝體,進行剖面研磨,利用SEM(Scanning Electron Microscope,掃描電子顯微鏡)觀察電極間之焊料接合界面。將無焊料接合界面之情況 評價為○,將夾入樹脂而存在焊料接合界面之情況評價為×。 Each of the structures was cut, and cross-section polishing was performed, and the solder joint interface between the electrodes was observed by SEM (Scanning Electron Microscope). Will be solderless joint interface The evaluation was ○, and the case where the resin was interposed and the solder joint interface was present was evaluated as ×.
<實施例1> <Example 1>
如表1所示,調配丙烯酸橡膠聚合物(品名:Teisan Resin SG-P3,長瀨化成公司製造)15.0質量份、環氧樹脂(品名:HP7200H,大日本油墨化學公司製造)15.0質量份、酸酐(品名:MH-700,新日本理化公司製造)9.0質量份、咪唑(品名:2MZ-A,四國化成工業公司製造)0.3質量份、丙烯酸樹脂(品名:DCP-A,新中村化學公司製造)23.7質量份、起始劑(品名:Perbutyl Z,日本油脂公司製造)0.3質量份、填料A(品名:SO-E5,Admatechs公司製造)31.5質量份、及填料B(品名:艾羅技RY200,日本艾羅技公司製造)5.0質量份,而製備聚合成分之環氧樹脂與丙烯酸樹脂之比為50:50的底部填充膜之樹脂組成物。利用棒式塗佈機將其塗佈於經剝離處理之PET(Polyethylene terephthalate),利用80℃之烘箱乾燥3分鐘,製作厚度40μm之底部填充膜(保護剝離PET(25μm)/底部填充膜(40μm)/基底剝離PET(50μm))。 As shown in Table 1, 15.0 parts by mass of an acrylic rubber polymer (product name: Teisan Resin SG-P3, manufactured by Nagase Chemical Co., Ltd.), epoxy resin (product name: HP7200H, manufactured by Dainippon Ink Chemical Co., Ltd.), 15.0 parts by mass, anhydride (Name: MH-700, manufactured by Nippon Chemical and Chemical Co., Ltd.) 9.0 parts by mass, imidazole (product name: 2MZ-A, manufactured by Shikoku Chemical Industry Co., Ltd.) 0.3 parts by mass, acrylic resin (name: DCP-A, manufactured by Shin-Nakamura Chemical Co., Ltd.) 23.7 parts by mass, starting agent (product name: Perbutyl Z, manufactured by Nippon Oil & Fats Co., Ltd.) 0.3 parts by mass, filler A (product name: SO-E5, manufactured by Admatechs Co., Ltd.) 31.5 parts by mass, and filler B (product name: Aerotech RY200, 5.0 parts by mass of a manufactured by Japan Aerotech Co., Ltd., and a resin composition of an underfill film having a ratio of an epoxy resin to an acrylic resin of 50:50 was prepared. It was applied to a peeled PET (Polyethylene terephthalate) by a bar coater, and dried in an oven at 80 ° C for 3 minutes to prepare an underfill film having a thickness of 40 μm (protective peeling PET (25 μm) / underfill film (40 μm). ) / substrate peeling PET (50 μm)).
使用實施例1之底部填充膜製作之構裝體的晶片間之間隙為30μm,底部填充膜之壓縮率為25%。又,構裝體的焊料伸出之評價為○,焊接性之評價為○。 The inter-wafer gap of the structure produced using the underfill film of Example 1 was 30 μm, and the underfill film had a compression ratio of 25%. Further, the evaluation of the solder extension of the package was ○, and the evaluation of the weldability was ○.
<實施例2> <Example 2>
如表1所示,調配丙烯酸橡膠聚合物(品名:Teisan Resin SG-P3,長瀨化成公司製造)15.0質量份、環氧樹脂(品名:HP7200H,大日本油墨化學公司製造)21.0質量份、酸酐(品名:MH-700,新日本理化公司製造)12.6質量份、咪唑(品名:2MZ-A,四國化成工業公司製造)0.4質量份、 丙烯酸樹脂(品名:DCP-A,新中村化學公司製造)14.2質量份、起始劑(品名:Perbutyl Z,日本油脂公司製造)0.2質量份、填料A(品名:SO-E5,Admatechs公司製造)31.5質量份、及填料B(品名:艾羅技RY200,日本艾羅技公司製造)5.0質量份,而製備聚合成分之環氧樹脂與丙烯酸樹脂之比為70:30的底部填充膜之樹脂組成物。利用棒式塗佈機將其塗佈於經剝離處理之PET(Polyethylene terephthalate),利用80℃之烘箱乾燥3分鐘,製作厚度40μm之底部填充膜(保護剝離PET(25μm)/底部填充膜(40μm)/基底剝離PET(50μm))。 As shown in Table 1, 15.0 parts by mass of an acrylic rubber polymer (product name: Teisan Resin SG-P3, manufactured by Nagase Chemical Co., Ltd.), epoxy resin (product name: HP7200H, manufactured by Dainippon Ink Chemical Co., Ltd.), 21.0 parts by mass, anhydride (product name: MH-700, manufactured by Nippon Chemical and Chemical Co., Ltd.) 12.6 parts by mass, imidazole (product name: 2MZ-A, manufactured by Shikoku Chemical Industry Co., Ltd.) 0.4 parts by mass, Acrylic resin (product name: DCP-A, manufactured by Shin-Nakamura Chemical Co., Ltd.) 14.2 parts by mass, starting agent (product name: Perbutyl Z, manufactured by Nippon Oil & Fats Co., Ltd.) 0.2 parts by mass, filler A (product name: SO-E5, manufactured by Admatechs Co., Ltd.) 31.5 parts by mass, and 5.0 parts by mass of a filler B (product name: Aerotech RY200, manufactured by Ai Luo Technology Co., Ltd.), and a resin composition of an underfill film having a ratio of an epoxy resin to an acrylic resin of 70:30 was prepared. It was applied to a peeled PET (Polyethylene terephthalate) by a bar coater, and dried in an oven at 80 ° C for 3 minutes to prepare an underfill film having a thickness of 40 μm (protective peeling PET (25 μm) / underfill film (40 μm). ) / substrate peeling PET (50 μm)).
使用實施例2之底部填充膜製作之構裝體的晶片間之間隙為24μm,底部填充膜之壓縮率為40%。又,構裝體的焊料伸出之評價為○,焊接性之評價為○。 The inter-wafer gap of the package formed using the underfill film of Example 2 was 24 μm, and the underfill film had a compression ratio of 40%. Further, the evaluation of the solder extension of the package was ○, and the evaluation of the weldability was ○.
<實施例3> <Example 3>
如表1所示,調配丙烯酸橡膠聚合物(品名:Teisan Resin SG-P3,長瀨化成公司製造)15.0質量份、環氧樹脂(品名:HP7200H,大日本油墨化學公司製造)9.0質量份、酸酐(品名:MH-700,新日本理化公司製造)5.4質量份、咪唑(品名:2MZ-A,四國化成工業公司製造)0.2質量份、丙烯酸樹脂(品名:DCP-A,新中村化學公司製造)33.2質量份、起始劑(品名:Perbutyl Z,日本油脂公司製造)0.4質量份、填料A(品名:SO-E5,Admatechs公司製造)31.5質量份、及填料B(品名:艾羅技RY200,日本艾羅技公司製造)5.0質量份,而製備聚合成分之環氧樹脂與丙烯酸樹脂之比為30:70的底部填充膜之樹脂組成物。利用棒式塗佈機將其塗佈於經剝離處理之PET(Polyethylene terephthalate),利用80℃之烘箱乾燥3分鐘, 製作厚度40μm之底部填充膜(保護剝離PET(25μm)/底部填充膜(40μm)/基底剝離PET(50μm))。 As shown in Table 1, 15.0 parts by mass of an acrylic rubber polymer (product name: Teisan Resin SG-P3, manufactured by Nagase Chemical Co., Ltd.), an epoxy resin (product name: HP7200H, manufactured by Dainippon Ink Chemical Co., Ltd.), 9.0 parts by mass, an acid anhydride (Name: MH-700, manufactured by Nippon Chemical and Chemical Co., Ltd.) 5.4 parts by mass, imidazole (product name: 2MZ-A, manufactured by Shikoku Chemical Industry Co., Ltd.) 0.2 parts by mass, acrylic resin (name: DCP-A, manufactured by Shin-Nakamura Chemical Co., Ltd.) 33.2 parts by mass, starting agent (product name: Perbutyl Z, manufactured by Nippon Oil & Fats Co., Ltd.) 0.4 parts by mass, filler A (product name: SO-E5, manufactured by Admatechs Co., Ltd.) 31.5 parts by mass, and filler B (product name: Aerotech RY200, 5.0 parts by mass of Ai Luo Technology Co., Ltd., and a resin composition of an underfill film having a ratio of an epoxy resin to an acrylic resin of 30:70 was prepared. It was applied to a peeled PET (Polyethylene terephthalate) by a bar coater, and dried in an oven at 80 ° C for 3 minutes. An underfill film (protective release PET (25 μm) / underfill film (40 μm) / substrate release PET (50 μm)) having a thickness of 40 μm was produced.
使用實施例3之底部填充膜製作之構裝體的晶片間之間隙為34μm,底部填充膜之壓縮率為15%。又,構裝體的焊料伸出之評價為○,焊接性之評價為○。 The inter-wafer gap of the structure produced using the underfill film of Example 3 was 34 μm, and the underfill film had a compression ratio of 15%. Further, the evaluation of the solder extension of the package was ○, and the evaluation of the weldability was ○.
<比較例1> <Comparative Example 1>
如表1所示,調配丙烯酸橡膠聚合物(品名:Teisan Resin SG-P3,長瀨化成公司製造)15.0質量份、環氧樹脂(品名:HP7200H,大日本油墨化學公司製造)30.0質量份、酸酐(品名:MH-700,新日本理化社)18.0質量份、咪唑(品名:2MZ-A,四國化成工業公司製造)0.5質量份、填料A(品名:SO-E5,Admatechs公司製造)31.5質量份、及填料B(品名:艾羅技RY200,日本艾羅技公司製造)5.0質量份,而製備聚合成分之環氧樹脂與丙烯酸樹脂之比為100:0的底部填充膜之樹脂組成物。利用棒式塗佈機將其塗佈於經剝離處理之PET(Polyethylene terephthalate),利用80℃之烘箱乾燥3分鐘,製作厚度40μm之底部填充膜(保護剝離PET(25μm)/底部填充膜(40μm)/基底剝離PET(50μm))。 As shown in Table 1, 15.0 parts by mass of an acrylic rubber polymer (product name: Teisan Resin SG-P3, manufactured by Nagase Chemical Co., Ltd.), epoxy resin (product name: HP7200H, manufactured by Dainippon Ink Chemical Co., Ltd.), 30.0 parts by mass, acid anhydride (Name: MH-700, New Japan Physical and Chemical Society) 18.0 parts by mass, imidazole (product name: 2MZ-A, manufactured by Shikoku Chemical Industry Co., Ltd.) 0.5 parts by mass, filler A (product name: SO-E5, manufactured by Admatechs) 31.5 quality And a filler B (product name: Aerotech RY200, manufactured by Ai Luo Technology Co., Ltd.) of 5.0 parts by mass, and a resin composition of an underfill film having a ratio of an epoxy resin to an acrylic resin of 100:0 was prepared. It was applied to a peeled PET (Polyethylene terephthalate) by a bar coater, and dried in an oven at 80 ° C for 3 minutes to prepare an underfill film having a thickness of 40 μm (protective peeling PET (25 μm) / underfill film (40 μm). ) / substrate peeling PET (50 μm)).
使用比較例1之底部填充膜製作之構裝體的晶片間之間隙為20μm,底部填充膜之壓縮率為50%。又,構裝體的焊料伸出之評價為×,焊接性之評價為○。 The gap between the wafers of the package produced using the underfill film of Comparative Example 1 was 20 μm, and the underfill film had a compression ratio of 50%. Further, the solder extension of the package was evaluated as ×, and the solderability was evaluated as ○.
<比較例2> <Comparative Example 2>
如表1所示,調配丙烯酸橡膠聚合物(品名:Teisan Resin SG-P3,長瀨化成公司製造)15.0質量份、環氧樹脂(品名:HP7200H,大日本油墨化 學公司製造)24.0質量份、酸酐(品名:MH-700,新日本理化公司製造)14.4質量份、咪唑(品名:2MZ-A,四國化成工業公司製造)0.4質量份、丙烯酸樹脂(品名:DCP-A,新中村化學公司製造)9.5質量份、起始劑(品名:Perbutyl Z,日本油脂公司製造)0.1質量份、填料A(品名:SO-E5,Admatechs公司製造)31.5質量份、及填料B(品名:艾羅技RY200,日本艾羅技公司製造)5.0質量份,而製備聚合成分之環氧樹脂與丙烯酸樹脂之比為80:20的底部填充膜之樹脂組成物。利用棒式塗佈機將其塗佈於經剝離處理之PET(Polyethylene terephthalate),利用80℃之烘箱乾燥3分鐘,製作厚度40μm之底部填充膜(保護剝離PET(25μm)/底部填充膜(40μm)/基底剝離PET(50μm))。 As shown in Table 1, 15.0 parts by mass of acrylic rubber polymer (product name: Teisan Resin SG-P3, manufactured by Nagase Chemical Co., Ltd.) and epoxy resin (product name: HP7200H, Dainippon Ink) 24.0 parts by mass, anhydride (product name: MH-700, manufactured by Nippon Chemical and Chemical Co., Ltd.) 14.4 parts by mass, imidazole (product name: 2MZ-A, manufactured by Shikoku Chemical Industry Co., Ltd.) 0.4 parts by mass, acrylic resin (product name: DCP-A, manufactured by Shin-Nakamura Chemical Co., Ltd.) 9.5 parts by mass, starting agent (product name: Perbutyl Z, manufactured by Nippon Oil Co., Ltd.) 0.1 parts by mass, filler A (product name: SO-E5, manufactured by Admatechs Co., Ltd.) 31.5 parts by mass, and A resin composition of an underfill film having a ratio of an epoxy resin to an acrylic resin of 80:20 was prepared by adding 5.0 parts by mass of a filler B (product name: Aerotech RY200, manufactured by Aerotech, Japan). It was applied to a peeled PET (Polyethylene terephthalate) by a bar coater, and dried in an oven at 80 ° C for 3 minutes to prepare an underfill film having a thickness of 40 μm (protective peeling PET (25 μm) / underfill film (40 μm). ) / substrate peeling PET (50 μm)).
使用比較例2之底部填充膜製作之構裝體的晶片間之間隙為22μm,底部填充膜之壓縮率為45%。又,構裝體的焊料伸出之評價為×,焊接性之評價為○。 The gap between the wafers of the package produced using the underfill film of Comparative Example 2 was 22 μm, and the underfill film had a compression ratio of 45%. Further, the solder extension of the package was evaluated as ×, and the solderability was evaluated as ○.
<比較例3> <Comparative Example 3>
如表1所示,調配丙烯酸橡膠聚合物(品名:Teisan Resin SG-P3,長瀨化成公司製造)15.0質量份、環氧樹脂(品名:HP7200H,大日本油墨化學公司製造)6.0質量份、酸酐(品名:MH-700,新日本理化公司製造)3.6質量份、咪唑(品名:2MZ-A,四國化成工業公司製造)0.1質量份、丙烯酸樹脂(品名:DCP-A,新中村化學公司製造)38.0質量份、起始劑(品名:Perbutyl Z,日本油脂公司製造)0.4質量份、填料A(品名:SO-E5,Admatechs公司製造)31.5質量份、及填料B(品名:艾羅技RY200,日本艾羅技公司製造)5.0質量份,而製備聚合成分之環氧樹脂與丙烯酸樹 脂之比為20:80的底部填充膜之樹脂組成物。利用棒式塗佈機將其塗佈於經剝離處理之PET(Polyethylene terephthalate),利用80℃之烘箱乾燥3分鐘,製作厚度40μm之底部填充膜(保護剝離PET(25μm)/底部填充膜(40μm)/基底剝離PET(50μm))。 As shown in Table 1, 15.0 parts by mass of an acrylic rubber polymer (product name: Teisan Resin SG-P3, manufactured by Nagase Chemical Co., Ltd.), an epoxy resin (product name: HP7200H, manufactured by Dainippon Ink Chemical Co., Ltd.), 6.0 parts by mass, an acid anhydride (Name: MH-700, manufactured by Nippon Chemical and Chemical Co., Ltd.) 3.6 parts by mass, imidazole (product name: 2MZ-A, manufactured by Shikoku Chemical Industry Co., Ltd.) 0.1 parts by mass, acrylic resin (product name: DCP-A, manufactured by Shin-Nakamura Chemical Co., Ltd.) 38.0 parts by mass, starting agent (product name: Perbutyl Z, manufactured by Nippon Oil & Fats Co., Ltd.) 0.4 parts by mass, filler A (product name: SO-E5, manufactured by Admatechs Co., Ltd.) 31.5 parts by mass, and filler B (product name: Ai Luoji RY200, 5.0 parts by mass produced by Japan Aerotech Co., Ltd., and prepared epoxy resin and acrylic tree of polymerized component The resin composition of the underfill film having a fat ratio of 20:80. It was applied to a peeled PET (Polyethylene terephthalate) by a bar coater, and dried in an oven at 80 ° C for 3 minutes to prepare an underfill film having a thickness of 40 μm (protective peeling PET (25 μm) / underfill film (40 μm). ) / substrate peeling PET (50 μm)).
使用比較例3之底部填充膜製作之構裝體的晶片間之間隙為36μm,底部填充膜之壓縮率為10%。又,構裝體的焊料伸出之評價為○,焊接性之評價為×。 The inter-wafer gap of the package produced using the underfill film of Comparative Example 3 was 36 μm, and the underfill film had a compression ratio of 10%. Further, the evaluation of the solder extension of the package was ○, and the evaluation of the weldability was ×.
<比較例4> <Comparative Example 4>
如表1所示,調配丙烯酸橡膠聚合物(品名:Teisan Resin SG-P3,長瀨化成公司製造)15.0質量份、丙烯酸樹脂(品名:DCP-A,新中村化學公司製造)47.5質量份、起始劑(品名:Perbutyl Z,日本油脂公司製造)0.5質量份、填料A(品名:SO-E5,Admatechs公司製造)31.5質量份、及填料B(品名:艾羅技RY200,日本艾羅技公司製造)5.0質量份,而製備聚合成分之環氧樹脂與丙烯酸樹脂之比為0:100的底部填充膜之樹脂組成物。利用棒式塗佈機將其塗佈於經剝離處理之PET(Polyethylene terephthalate),利用80℃之烘箱乾燥3分鐘,製作厚度40μm之底部填充膜(保護剝離PET(25μm)/底部填充膜(40μm)/基底剝離PET(50μm))。 As shown in Table 1, 15.0 parts by mass of acrylic rubber polymer (product name: Teisan Resin SG-P3, manufactured by Nagase Chemical Co., Ltd.) and acrylic resin (product name: DCP-A, manufactured by Shin-Nakamura Chemical Co., Ltd.) were blended with 47.5 parts by mass. Starting agent (product name: Perbutyl Z, manufactured by Nippon Oil & Fats Co., Ltd.) 0.5 parts by mass, filler A (product name: SO-E5, manufactured by Admatechs Co., Ltd.) 31.5 parts by mass, and filler B (product name: Aerotech RY200, manufactured by Japan Aerotech Co., Ltd.) 5.0 parts by mass, and a resin composition of an underfill film in which a ratio of an epoxy resin to an acrylic resin of a polymerization component was 0:100 was prepared. It was applied to a peeled PET (Polyethylene terephthalate) by a bar coater, and dried in an oven at 80 ° C for 3 minutes to prepare an underfill film having a thickness of 40 μm (protective peeling PET (25 μm) / underfill film (40 μm). ) / substrate peeling PET (50 μm)).
使用比較例4之底部填充膜製作之構裝體的晶片間之間隙為38μm,底部填充膜之壓縮率為5%。又,構裝體的焊料伸出之評價為○,焊接性之評價為×。 The gap between the wafers of the package produced using the underfill film of Comparative Example 4 was 38 μm, and the underfill film had a compression ratio of 5%. Further, the evaluation of the solder extension of the package was ○, and the evaluation of the weldability was ×.
<比較例5> <Comparative Example 5>
如表1所示,調配苯氧基樹脂(品名:PKHH,Union Carbide公司製造) 15.0質量份、環氧樹脂(品名:HP7200H,大日本油墨化學公司製造)15.0質量份、酸酐(品名:MH-700,新日本理化公司製造)9.0質量份、咪唑(品名:2MZ-A,四國化成工業公司製造)0.3質量份、丙烯酸樹脂(品名:DCP-A,新中村化學公司製造)23.7質量份、起始劑(品名:Perbutyl Z,日本油脂公司製造)0.3質量份、填料A(品名:SO-E5,Admatechs公司製造)31.5質量份、及填料B(品名:艾羅技RY200,日本艾羅技公司製造)5.0質量份,而製備聚合成分之環氧樹脂與丙烯酸樹脂之比為50:50的底部填充膜之樹脂組成物。利用棒式塗佈機將其塗佈於經剝離處理之PET(Polyethylene terephthalate),利用80℃之烘箱乾燥3分鐘,製作厚度40μm之底部填充膜(保護剝離PET(25μm)/底部填充膜(40μm)/基底剝離PET(50μm))。 As shown in Table 1, phenoxy resin (product name: PKHH, manufactured by Union Carbide) 15.0 parts by mass, epoxy resin (product name: HP7200H, manufactured by Dainippon Ink Chemical Co., Ltd.) 15.0 parts by mass, acid anhydride (product name: MH-700, manufactured by Nippon Chemical Co., Ltd.) 9.0 parts by mass, imidazole (product name: 2MZ-A, four (manufactured by National Chemical Industry Co., Ltd.) 0.3 parts by mass, acrylic resin (product name: DCP-A, manufactured by Shin-Nakamura Chemical Co., Ltd.) 23.7 parts by mass, starting agent (product name: Perbutyl Z, manufactured by Nippon Oil & Fats Co., Ltd.) 0.3 parts by mass, filler A ( Product name: SO-E5, manufactured by Admatechs Inc., 31.5 parts by mass, and filler B (product name: Aerotech RY200, manufactured by Japan Aerotech Corporation) 5.0 parts by mass, and the ratio of epoxy resin to acrylic resin for preparing a polymer component is 50: A resin composition of 50 underfill film. It was applied to a peeled PET (Polyethylene terephthalate) by a bar coater, and dried in an oven at 80 ° C for 3 minutes to prepare an underfill film having a thickness of 40 μm (protective peeling PET (25 μm) / underfill film (40 μm). ) / substrate peeling PET (50 μm)).
使用比較例5之底部填充膜製作之構裝體的晶片間之間隙為22μm,底部填充膜之壓縮率為45%。又,構裝體的焊料伸出之評價為×,焊接性之評價為○。 The gap between the wafers of the package produced using the underfill film of Comparative Example 5 was 22 μm, and the underfill film had a compression ratio of 45%. Further, the solder extension of the package was evaluated as ×, and the solderability was evaluated as ○.
<比較例6> <Comparative Example 6>
如表1所示,調配聚丁二烯(品名:TEAI-1000,日本曹達公司製造)15.0質量份、環氧樹脂(品名:HP7200H,大日本油墨化學公司製造)15.0質量份、酸酐(品名:MH-700,新日本理化公司製造)9.0質量份、咪唑(品名:2MZ-A,四國化成工業公司製造)0.3質量份、丙烯酸樹脂(品名:DCP-A,新中村化學公司製造)23.7質量份、起始劑(品名:Perbutyl Z,日本油脂公司製造)0.3質量份、填料A(品名:SO-E5,Admatechs公司製造)31.5質量份、及填料B(品名:艾羅技RY200,日本艾羅技公司製造) 5.0質量份,而製備聚合成分之環氧樹脂與丙烯酸樹脂之比為50:50的底部填充膜之樹脂組成物。利用棒式塗佈機將其塗佈於經剝離處理之PET(Polyethylene terephthalate),利用80℃之烘箱乾燥3分鐘,製作厚度40μm之底部填充膜(保護剝離PET(25μm)/底部填充膜(40μm)/基底剝離PET(50μm))。 As shown in Table 1, 15.0 parts by mass of polybutadiene (product name: TEAI-1000, manufactured by Japan Soda Co., Ltd.), epoxy resin (product name: HP7200H, manufactured by Dainippon Ink Chemical Co., Ltd.), 15.0 parts by mass, and anhydride (product name: MH-700, manufactured by Nippon Chemical and Chemical Co., Ltd.) 9.0 parts by mass, imidazole (product name: 2MZ-A, manufactured by Shikoku Chemical Industry Co., Ltd.) 0.3 parts by mass, acrylic resin (product name: DCP-A, manufactured by Shin-Nakamura Chemical Co., Ltd.) 23.7 quality Parts, starter (product name: Perbutyl Z, manufactured by Nippon Oil & Fats Co., Ltd.) 0.3 parts by mass, filler A (product name: SO-E5, manufactured by Admatechs Co., Ltd.) 31.5 parts by mass, and filler B (product name: Aerotech RY200, Japan Ai Luoji Made by the company) 5.0 parts by mass, and a resin composition of an underfill film having a ratio of an epoxy resin to an acrylic resin of 50:50 was prepared. It was applied to a peeled PET (Polyethylene terephthalate) by a bar coater, and dried in an oven at 80 ° C for 3 minutes to prepare an underfill film having a thickness of 40 μm (protective peeling PET (25 μm) / underfill film (40 μm). ) / substrate peeling PET (50 μm)).
使用比較例6之底部填充膜製作之構裝體的晶片間之間隙為20μm,底部填充膜之壓縮率為50%。又,構裝體的焊料伸出之評價為×,焊接性之評價為○。 The gap between the wafers of the package produced using the underfill film of Comparative Example 6 was 20 μm, and the underfill film had a compression ratio of 50%. Further, the solder extension of the package was evaluated as ×, and the solderability was evaluated as ○.
比較例1、2中,由於硬化反應相對較快之丙烯酸的調配比率小,故而壓縮率高,過度壓碎焊料、焊料伸出多。比較例3、4中,由於丙烯酸之調配比率大,故於壓碎焊料前發生硬化,而無法獲得良好之焊接。又,比較例5、6中,由於分別調配苯氧基樹脂、聚丁二烯作為膜形成樹脂,故過度壓碎焊料。 In Comparative Examples 1 and 2, since the blending ratio of acrylic acid having a relatively fast curing reaction was small, the compression ratio was high, and the solder was excessively crushed and the solder was excessively stretched. In Comparative Examples 3 and 4, since the blending ratio of acrylic acid was large, hardening occurred before the solder was crushed, and good soldering could not be obtained. Further, in Comparative Examples 5 and 6, since the phenoxy resin and the polybutadiene were separately blended as the film-forming resin, the solder was excessively crushed.
實施例1~3中,環氧樹脂與酸酐之合計質量、與丙烯酸樹脂與有機過氧化物之合計質量的比為7:3~3:7,由於調配丙烯酸橡膠聚合物作為膜形成樹脂,可抑制焊料之過度壓碎而實現良好之焊接性。 In the first to third embodiments, the ratio of the total mass of the epoxy resin to the acid anhydride and the total mass of the acrylic resin and the organic peroxide is from 7:3 to 3:7, and the acrylic rubber polymer is formulated as a film-forming resin. Suppresses excessive crushing of the solder to achieve good weldability.
Claims (15)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2013201612A JP2015070042A (en) | 2013-09-27 | 2013-09-27 | Underfill material and method for manufacturing semiconductor device using the same |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW201534631A true TW201534631A (en) | 2015-09-16 |
Family
ID=52743022
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW103131084A TW201534631A (en) | 2013-09-27 | 2014-09-10 | Bottom filling material and method of manufacturing semiconductor device using same |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JP2015070042A (en) |
| TW (1) | TW201534631A (en) |
| WO (1) | WO2015045878A1 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2017122193A (en) * | 2016-01-08 | 2017-07-13 | 日立化成株式会社 | Adhesive for semiconductor and method for manufacturing semiconductor device |
| CN112969307B (en) * | 2021-02-01 | 2024-02-09 | 深圳瑞君新材料技术有限公司 | Preparation method of carbon-based filling material |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013175546A (en) * | 2012-02-24 | 2013-09-05 | Dexerials Corp | Underfill material, and method of manufacturing semiconductor device using the same |
| JP6047888B2 (en) * | 2012-02-24 | 2016-12-21 | 日立化成株式会社 | Adhesive for semiconductor and method for manufacturing semiconductor device |
| JP5908306B2 (en) * | 2012-03-01 | 2016-04-26 | 積水化学工業株式会社 | Semiconductor bonding adhesive and semiconductor bonding adhesive film |
-
2013
- 2013-09-27 JP JP2013201612A patent/JP2015070042A/en active Pending
-
2014
- 2014-09-10 TW TW103131084A patent/TW201534631A/en unknown
- 2014-09-10 WO PCT/JP2014/073966 patent/WO2015045878A1/en not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| JP2015070042A (en) | 2015-04-13 |
| WO2015045878A1 (en) | 2015-04-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI552294B (en) | A circuit-connecting material, and a method of manufacturing the semiconductor device using the same | |
| JP6438790B2 (en) | Semiconductor device manufacturing method and underfill film | |
| TWI695458B (en) | Bottom filler material and method of manufacturing semiconductor device using the same | |
| JP6069143B2 (en) | Underfill material and method for manufacturing semiconductor device using the same | |
| TWI611526B (en) | Bottom filling material and method of manufacturing semiconductor device using same | |
| US10062625B2 (en) | Underfill material and method for manufacturing semiconductor device using the same | |
| TWI649842B (en) | Bottom filling material and manufacturing method of semiconductor device using the same | |
| TW201534631A (en) | Bottom filling material and method of manufacturing semiconductor device using same |