TW201407696A - 安裝方法 - Google Patents
安裝方法 Download PDFInfo
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- TW201407696A TW201407696A TW102110936A TW102110936A TW201407696A TW 201407696 A TW201407696 A TW 201407696A TW 102110936 A TW102110936 A TW 102110936A TW 102110936 A TW102110936 A TW 102110936A TW 201407696 A TW201407696 A TW 201407696A
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- wafer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K20/00—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
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Abstract
本發明係一種在基板上安裝複數個晶片的安裝方法,包含:暫時接合步驟,其將複數個晶片暫時接合於基板上;以及正式接合步驟,其將暫時接合於基板上的複數個晶片正式接合於基板上。暫時接合步驟,依照欲安裝於基板上之複數個晶片的數目,重複進行由第1階段與第2階段所構成的第1基本步驟。第1階段,將基板的第1金屬層與晶片的第2金屬層二者的位置對準。第2階段,使第2金屬層與第1金屬層藉由固相擴散接合而暫時接合。正式接合步驟,其依照基板上的複數個晶片的數目,重複進行由第3階段與第4階段所構成的第2基本步驟。第3階段,識別出暫時接合於基板上的晶片的位置。第4階段,使第2金屬層與第1金屬層液相擴散接合,藉此將其正式接合。
Description
本發明係關於一種在基板上安裝複數個晶片的安裝方法。
自以往,在基板上安裝複數個晶片的安裝方法已為人所習知(例如,日本專利公開2009-130293號公報)。該文獻所記載的安裝方法包含:基板載置步驟,其在晶片結合裝置的平台的表面側載置基板;以及接合步驟,其使晶片與平台的表面側所載置的基板彼此的接合面接觸,並從晶片側加熱,將晶片與基板彼此的接合面加熱,使兩者接合。
在基板載置步驟中,以在基板中的晶片的接合預定區域與平台之間隔設隔熱層的形式將基板載置於平台的表面側。關於晶片,例如為在厚度方向的兩面上形成電極(圖中未顯示)的LED晶片。該LED晶片,由背面側(接近基板側)的電極所構成的晶片側接合用電極係由AuSn所形成。另外,關於基板,例如用矽晶圓所形成者。該基板,在各晶片的接合預定區域(搭載位置),形成晶片襯墊部作為基板側接合用電極。晶片襯墊部,具有Ti膜以及在該Ti膜上所形成的Au膜的堆疊構造,表面側的部位由Au形成。
接合步驟,係將既定的過程,因應安裝於晶圓的LED晶片的個數,反覆進行。在既定的過程中,利用在晶片結合裝置的頭部所設置的吸附夾頭吸附保持LED晶片,並利用頭部的加熱器隔著吸附夾頭將LED晶片加熱到既
定的接合溫度,在此狀態下,使晶片側接合用電極與基板側接合用電極二者的接合面之間互相接觸,從頭部側對LED晶片施加既定時間的適當壓力,使晶片側接合用電極與基板側接合用電極共晶接合。既定的接合溫度,例如,係比晶片側接合用電極的材料(亦即AuSn)的熔融溫度更高的溫度。另外,適當的壓力,例如係2kg/cm2~50kg/cm2。另外,既定時間,例如係10秒左右。
另外,吾人推測,上述文獻所記載的安裝方法,在利用吸附夾頭吸附晶片之前,必須利用晶片結合裝置的識別裝置以高精度識別晶片。再者,吾人推測,上述文獻所記載的安裝方法,在使晶片側接合用電極與基板側接合用電極二者的接觸面互相接觸之前,必須利用識別裝置以高精度識別在平台的表面側的基板上的接合預定區域,以將晶片與基板的位置對準。因此,上述的安裝方法,難以使生產線的安裝步驟的作業時間縮短,且難以提高安裝步驟的處理量。另外,識別裝置,一般係由相機、影像處理部以及監視器所構成。
於是,本發明之目的在於提供一種可使作業時間縮短的安裝方法。
本發明的安裝方法,係一種在基板上安裝複數個晶片的安裝方法,其特徵為包含:暫時接合步驟,其將該複數個晶片暫時接合於該基板上;以及正式接合步驟,其將暫時接合於該基板上的該複數個晶片正式接合於該基板上;該暫時接合步驟,依照欲安裝於該基板上的該複數個晶片的數目,重複進行由第1階段與第2階段所構成的第1基本步驟;該第1階段,將該基板的第1金屬層與該晶片的第2金屬層二者的位置對準;該第2階段,在該第1階段之後從該晶片側加壓,使該晶片的該第2金屬層與該基板的該第1金屬層固相擴散接合,藉此將該晶片暫時接合於該基板上;該正式接合步驟,依照該基板上的該複數個晶片的數目,重複進行由第3階段與第4階段所構成的第2基本步驟;該第3階段,識別出暫時接合於該基板上的該晶片的位
置;該第4階段,在該第3階段之後從該晶片側加壓,使該晶片的該第2金屬層與該基板的該第1金屬層液相擴散接合,藉此將該晶片正式接合於該基板上。
在該安裝方法中,該固相擴散接合宜在第1既定溫度下進行;該液相擴散接合,宜藉由從該晶片側與該基板側的至少其中一側的加熱,而在比該第1既定溫度更高的第2既定溫度下進行。
在該安裝方法中,該第1既定溫度宜為該第1金屬層以及該第2金屬層不會熔融的溫度;該第2既定溫度宜為該第1金屬層以及該第2金屬層會熔融的溫度。
在該安裝方法中,該固相擴散接合宜為超音波接合或是表面活性化接合。
本發明的安裝方法,具有可縮短作業時間的功效。
1‧‧‧基板
2‧‧‧晶片
2a‧‧‧第1電極
2b‧‧‧第2電極
3a‧‧‧平台
3b‧‧‧平台
4a‧‧‧結合頭
4b‧‧‧結合頭
5a‧‧‧夾頭
5b‧‧‧夾頭
11‧‧‧第1金屬層
11a‧‧‧第1層
11b‧‧‧第2層
11c‧‧‧Sn層
11d‧‧‧Au層
11e‧‧‧AuSn層
21‧‧‧第2金屬層
21a‧‧‧Au層
31‧‧‧接合層
以下更進一步詳細記述本發明的較佳實施態樣。本發明的其他特徵以及優點,可根據以下的詳細記述以及所附圖式更進一步清楚理解。
圖1A係說明實施態樣的安裝方法的概略立體圖。
圖1B係說明實施態樣的安裝方法的概略剖面圖。
圖1C係說明實施態樣的安裝方法的概略立體圖。
圖1D係說明實施態樣的安裝方法的概略剖面圖。
圖1E係說明實施態樣的安裝方法的概略立體圖。
圖1F係說明實施態樣的安裝方法的概略剖面圖。
圖2A係在實施態樣的安裝方法中的第1階段的說明圖。
圖2B係在實施態樣的安裝方法中的正式接合步驟的說明圖。
圖3A係在實施態樣的安裝方法中的基板上的晶片的安裝態樣的說明
圖。
圖3B係在實施態樣的安裝方法中的基板上的晶片的安裝態樣的說明圖。
圖4係在實施態樣的安裝方法中的另一第1基本步驟的說明圖。
圖5係在實施態樣的安裝方法中的另一第1基本步驟的說明圖。
圖6A係在實施態樣的安裝方法中的另一第1基本步驟的說明圖。
圖6B係在實施態樣的安裝方法中的另一第1基本步驟的說明圖。
以下,根據圖1A~圖6B說明本實施態樣的安裝方法。
本實施態樣的安裝方法,如圖1E以及1F所示的,係在基板1上安裝複數個晶片2的安裝方法。該安裝方法包含:在基板1上將複數個晶片2分別暫時接合的暫時接合步驟(參照圖1A以及1B);以及將暫時接合於基板1上的複數個晶片2分別正式接合於基板1上的正式接合步驟(參照圖1C以及1D)。在該安裝方法中,比起暫時接合之後而言,在正式接合之後,基板1與複數個晶片2的接合強度較高。
暫時接合步驟,依照欲安裝於基板1上之複數個晶片2的數目,重複進行第1基本步驟。亦即,第1基本步驟,對基板1上的複數個晶片2個別進行。第1基本步驟係由第1階段以及第2階段所構成。
第1階段,如圖2A所示的,將基板1的第1金屬層11與晶片2的第2金屬層21二者的位置對準。
第2階段,如圖1B所示的,在第1階段之後從晶片2側加壓,使晶片2的第2金屬層21與基板1的第1金屬層11在第1既定溫度下固相擴散接合,藉此將晶片2暫時接合於基板1上。固相擴散接合,係使晶片2的第2金屬層21與基板1的第1金屬層11二者的接合面之間以固相狀態接合的方法。第1既定溫度,設定成第2金屬層21以及第1金屬層11不會熔融的溫度。暫時接合,係
指在正式接合之前,於基板1的既定位置上,用以將晶片2保持在就定位之狀態的接合。
正式接合步驟,如圖1D以及圖2B所示的,依照基板1上的複數個晶片2的數目,重複進行第2基本步驟。亦即,第2基本步驟,對基板1上的複數個晶片2個別進行。第2基本步驟係由第3階段以及第4階段所構成。
第3階段,識別暫時接合於基板1上的晶片2的位置。
第4階段,在第3階段之後從晶片2側加壓,使晶片2的第2金屬層21與基板1的第1金屬層11在第2既定溫度下液相擴散接合,藉此將晶片2正式接合於基板1上。藉此,晶片2,隔著由第2金屬層21與第1金屬層11的合金層所構成的接合層31接合於基板1上。正式接合,係指使晶片2與基板1的接合狀態成為接合強度較高且穩定之接合狀態的最終接合。第2既定溫度設定成第2金屬層21以及第1金屬層11會熔融的溫度。因此,第2既定溫度係設定成比第1既定溫度相對更高的溫度。
暫時接合步驟與正式接合步驟,可分別用不同的設備進行。另外,在生產線中,在基板1上安裝複數個晶片2的安裝步驟中,複數片基板1會處於在製中之狀態。相對於此,本實施態樣的安裝方法,由於暫時接合步驟與正式接合步驟可分別用不同的設備進行,故可對彼此相異的2片基板1平行進行暫時接合步驟與正式接合步驟。在此,暫時接合步驟,由於在第2階段中係藉由將第2金屬層21與第1金屬層11固相擴散接合而暫時接合,故比起在第1階段之後接著進行液相擴散接合的情況而言,可縮短所需要的時間(作業時間)。另外,正式接合步驟,由於係在複數個晶片2暫時接合於基板1上的狀態下在第3階段中識別晶片2的位置,故無須像第1階段那樣以高精度識別並拾取晶片2,比起像第1階段那樣以高精度識別晶片2以及基板1的情況而言,只要簡單地識別晶片2即可。藉此,正式接合步驟,比起在第1階段之後接著進行液相擴散接合的情況而言,可縮短所需要的時間。因此,本實施態樣的安裝方法,藉由使暫時接合步驟與正式接合步驟平行進行,可縮短安裝步驟的作業時間,進而能夠提高安裝步驟的處理量。另外,吾
人更認為,上述的日本專利公開2009-130293號公報所記載的安裝方法,由於係利用頭部的加熱器隔著吸附夾頭將LED晶片加熱到既定的接合溫度,並在此狀態下,使晶片側接合用電極與基板側接合用電極二者的接合面之間互相接觸,故有時會因為熱波動或熱膨脹等因素使晶片側接合用電極與基板側接合用電極難以以高精度對準位置。相對於此,本實施態樣的安裝方法,由於係在比進行正式接合的第2既定溫度相對更低的第1既定溫度下進行暫時接合,故高精度的位置對準變得比較容易。
暫時接合步驟與正式接合步驟,例如,可使用2個晶片結合裝置,作為各自的設備。各晶片結合裝置具備:結合頭、平台、識別裝置、控制裝置等。結合頭、平台以及識別裝置被控制裝置所控制。控制裝置包含:藉由在微電腦中安裝適當程式所構成的主控制部;以及根據主控制部的指示分別控制結合頭、平台以及識別裝置的個別控制部。識別裝置係由相機、影像處理部以及監視器所構成。另外,晶片結合裝置的構造,並無特別限定。另外,分別進行暫時接合步驟以及正式接合步驟的各設備,並不限於晶片結合裝置。
以下為了方便說明,將進行暫時接合步驟的晶片結合裝置稱為第1晶片結合裝置,將進行正式接合步驟的晶片結合裝置稱為第2晶片結合裝置。另外,第1晶片結合裝置與第2晶片結合裝置,可為相同構造,亦可為不同構造。
關於基板1,例如,可採用由矽晶圓所形成且在複數個晶片2的搭載預定區域分別設置第1金屬層11的晶圓。基板1,當為由矽晶圓所形成的晶圓時,宜在矽晶圓的表面上形成由矽氧化膜等所構成的絶緣膜。第1金屬層11,例如,可由無助焊劑的AuSn膜所構成。無助焊劑的AuSn層,例如,可利用電鍍法或濺鍍法等方法形成。亦可在第1金屬層11與絶緣膜之間,例如,隔設阻障層以及該阻障層的基底層。當第1金屬層11為AuSn膜,且絶緣膜為矽氧化膜時,關於阻障層的材料,例如,可採用Pt、Pd等的白金族的材料。另外,在阻障層與絶緣膜之間所隔設的基底層的材料,例如,可採用Ti、Ni
等。
關於矽晶圓,例如,可使用直徑為50mm~300mm,厚度為200μm~1000μm左右者。
基板1的材料,不限於矽,例如,亦可為氮化鋁或氧化鋁等。當基板1的材料採用矽時,基板1宜具備上述的絶緣膜,惟當基板1的材料採用氮化鋁或氧化鋁等的絶緣材料時,亦可不在基板1上設置絶緣膜。
關於晶片2,例如,可採用LED晶片。關於LED晶片,例如,可使用晶片尺寸為0.3mm正方(0.3mm×0.3mm)、0.45mm正方或1mm正方等尺寸者。另外,LED晶片的平面形狀,不限於正方形,例如,亦可為長方形等形狀。當LED晶片的平面形狀為長方形時,LED晶片的晶片尺寸可用例如0.5mm×0.24mm等尺寸者。
當晶片2為LED晶片時,LED晶片的發光波長,並無特別限定。因此,LED晶片可採用例如紫外LED晶片、紫色LED晶片、藍色LED晶片、綠色LED晶片、黄色LED晶片、橙色LED晶片、紅色LED晶片等。另外,LED晶片亦可採用白色LED晶片。
關於晶片2,如圖3A所示的,可採用在主表面側形成第1電極2a,在背面側形成第2電極2b的LED晶片。該晶片2,可為在第2電極2b上堆疊第2金屬層21(在圖3A中未顯示)者,可為第2電極2b的最表面側構成第2金屬層21(在圖3A中未顯示)者,亦可為第2電極2b構成第2金屬層21(在圖3A中未顯示)者。另外,在圖3A的安裝態樣中,第1電極2a與第2電極2b,一方為陽極電極,另一方為陰極電極。
另外,關於晶片2,如圖3B所示的,可採用在厚度方向的一面側形成第1電極2a以及第2電極2b的LED晶片。亦即,在圖3B的晶片2的底面,第1電極2a以及第2電極2b雙方互相隔著既定的間隔形成。該晶片2,可為在第1電
極2a以及第2電極2b分別堆疊第2金屬層21(圖3B中未顯示)者,可為第1電極2a以及第2電極2b各自的最表面側構成第2金屬層21(圖3B中未顯示)者,亦可為第1電極2a以及第2電極2b各自構成第2金屬層21(圖3B中未顯示)者。另外,在圖3B的安裝態樣中,第1電極2a與第2電極2b,一方為陽極電極,另一方為陰極電極。
關於第2金屬層21以及第1金屬層11各自的材料,係採用無助焊劑的材料。
在晶片2中,關於第2金屬層21的材料,例如,可採用無助焊劑的Au。無助焊劑的Au層,例如,可利用電鍍法、濺鍍法或蒸鍍法等方法形成。
晶片2的第2金屬層21與基板1的第1金屬層11的材料組合,不限於Au-AuSn,例如,亦可為AuSn-Au。當晶片2的第2金屬層21與基板1的第1金屬層11的材料組合為Au-AuSn或AuSn-Au時,例如,在將安裝了複數個晶片2的基板1,或從安裝了複數個晶片2的基板1分割出來的模組,使用SuAgCu二次安裝於母板等構件時,可防止接合層31再次熔融。
另外,晶片2的第2金屬層21與基板1的第1金屬層11的材料組合,亦可為AuGe-Au、Au-AuGe、SnBi-Sn、Sn-SnBi、SnCu-Cu、Cu-SnCu等。
當晶片2採用LED晶片,且第2金屬層21與第1金屬層11液相擴散接合所形成的接合層31為AuSn層時,不限於上述的例子,例如,亦可考慮形成圖4~圖6B其中任一種的構造例。在圖4所示的構造例中,晶片2的第2金屬層21為Au層21a,基板1的第1金屬層11係由第1層11a以及第2層11b所構成,第1層11a係由Sn層或AuSn層所構成,第2層11b係由在該第1層11a上的Au層所構成。藉此,基板1便可抑制在第1金屬層11中的Sn層氧化。
在圖5所示的構造例中,晶片2的第2金屬層21為Au層21a,基板1的第1
金屬層11為Sn層11c與Au層11d交互堆疊且最表層為Au層11d的多層構造。藉此,基板1便可抑制在第1金屬層11中的Sn層11c氧化。另外,正式接合步驟,在使Sn熔融之際的AuSn的形成變得更容易。
在圖6A以及圖6B所示的構造例中,晶片2的第2金屬層21為Au層21a,基板1的第1金屬層11為平面形狀形成了格子狀狹縫的AuSn層11e。藉此,正式接合步驟,在使AuSn層11e熔融之際,可抑制接合的起點(合金化的起點)參差不齊,並減少接合強度的差異、接合面積的差異、未接合區域等問題。
另外,在圖4~圖6B的構造例中,第1金屬層11的構造與第2金屬層21的構造亦可相反。
晶片2,不限於LED晶片。晶片2,例如,亦可為雷射二極體晶片、光二極體晶片、GaN系HEMT(high electron mobility transistor,高速電子遷移電晶體)晶片、MEMS(micro electro mechanical systems,微機電系統)晶片、紅外線感測晶片、IC晶片等。關於MEMS晶片,例如,可採用加速度感測晶片、壓力感測晶片等。
晶片2,就晶片尺寸而言並無特別限定,例如可使用0.2mm正方~5mm正方左右者。另外,晶片2在俯視下的外周圍形狀,不限於正方形,例如,亦可為長方形。
晶片2,就厚度而言並無特別限定,例如可使用0.1mm~1mm左右者。
暫時接合步驟,係在將基板1載置於第1晶片結合裝置的平台3a(參照圖1A以及1B)的表面側的第1基板載置步驟之後進行。平台3a在周圍部位形成吸附上述表面側所載置之基板1用的複數個吸氣孔(圖中未顯示)。藉此,第1晶片結合裝置便可在吸附平台3a的上述表面側所載置之基板1的狀態下保持基板1。
暫時接合步驟的第1階段,係相對於基板1將晶片2的位置對準。更具體說明之,第1階段,例如,係在將晶圓膠帶(粘著性樹脂膠帶)或晶片托盤等構件所保持的晶片2利用第1晶片結合裝置的夾頭5a真空吸附並拾取之前,利用第1晶片結合裝置的識別裝置(圖中未顯示)以高精度識別作為拾取對象的晶片2。之後,利用識別裝置以高精度識別在第1晶片結合裝置的平台3a的表面側的基板1上的接合預定區域,並將夾頭5a所真空吸附之晶片2與基板1的位置對準(例如,進行修正晶片2的態勢的晶片對準)。關於粘著性樹脂膠帶,例如,可使用紫外線硬化型的切割膠帶或熱硬化型的切割膠帶等。另外,粘著性樹脂膠帶,係在切割時以強粘著力保持晶片2,惟若在切割後利用紫外線照射或紅外線照射使粘著性降低,便可提高拾取性。
暫時接合步驟的第2階段,係使晶片2與基板1二者的接合面之間互相接觸,從晶片2側加壓,使晶片2的第2金屬層21與基板1的第1金屬層11在第1既定溫度下固相擴散接合。本實施態樣的安裝方法,係利用該固相擴散接合,將晶片2與基板1暫時接合。在第2階段中,係利用結合頭4a的加熱器(圖中未顯示)隔著夾頭5a將晶片2加熱到第1既定溫度。在第2階段中,係將晶片2加熱到比第1既定溫度更高一點的溫度,之後藉由使晶片2與基板1二者的接合面之間互相接觸而變成第1既定溫度,惟亦可在使晶片2與基板1二者的接合面之間互相接觸之後再加熱到第1既定溫度。
固相擴散接合,例如,宜為超音波接合或是表面活性化接合。藉此,在第2階段中,由於即使晶片2或基板1的加熱溫度比較低也能夠暫時接合,故即使在暫時接合前將晶片2與基板1的至少其中一方加熱的狀態下,也能夠以高精度對準位置。
超音波接合,係利用超音波振動所進行的固相擴散接合。關於超音波接合,宜為根據既定的加熱狀態利用壓力與超音波振動接合的超音波併用熱壓合。超音波併用熱壓合,比起利用壓力與超音波振動而在常溫下接合的情況而言,可使接合強度提高。另外,超音波併用熱壓合,比起熱壓合而言,可在更低溫接合。
表面活性化接合,係在接合前對彼此的接合表面以氬氣的電漿、離子束或是原子束在真空中照射,使各接合表面清淨化、活性化,之後使接合表面之間互相接觸,在第1既定溫度下施加適當的負荷而直接接合。第1既定溫度,宜為不會對晶片2造成熱損害的溫度。例如當晶片2為LED晶片時,第1既定溫度,宜為LED晶片的接面溫度不超過最大接面溫度的溫度,且設定在常溫~100℃左右的範圍內。在此,表面活性化接合,例如,若將第1既定溫度設定在例如80℃~100℃的範圍內,比起常溫的情況而言,更可使接合強度提高。另外,表面活性化接合,不限於氬氣的電漿、離子束或是原子束,例如,亦可利用氦氣或氖氣等氣體的電漿、離子束或是原子束。
另外,進行固相擴散接合的第2階段,在接合時將晶片2與基板1的至少其中一方加熱,可使接合強度提高。
第2階段,宜不在空氣環境中進行,而是在經過控制的氣體環境中進行。關於經過控制的氣體環境,例如,惰性氣體環境、真空環境、還原性氣體環境等。關於惰性氣體環境,可舉例如N2氣體環境、氬氣氣體環境等。關於還原性氣體環境,可舉例如H2氣體環境。第2階段,藉由使氣體環境為惰性氣體環境或是真空環境,便可抑制氧化。另外,第2階段,藉由使氣體環境為還原性氣體環境,便可將不需要的氧化物除去。
正式接合步驟,係在將基板1載置於第2晶片結合裝置的平台3b(參照圖1C以及1D)的表面側的第2基板載置步驟之後進行。平台3b在周圍部位形成了吸附上述表面側所載置之基板1用的複數個吸氣孔(圖中未顯示)。藉此,第2晶片結合裝置便可在吸附平台3b的上述表面側所載置之基板1的狀態下保持基板1。
在正式接合步驟的第3階段中,識別出暫時接合於基板1上的晶片2的位置。更具體說明之,在第3階段中,利用第2晶片結合裝置的識別裝置(圖中未顯示)簡單地識別出第2晶片結合裝置的平台3b所吸附的基板1上的晶
片2,並將結合頭4b的夾頭5b與晶片2二者的位置對準。另外,第2晶片結合裝置可簡單地識別出晶片2即可,故比起以高精度識別晶片2的情況而言,可使影像處理部的影像處理更簡略化,進而能夠縮短識別所需要的時間。
在正式接合步驟的第4階段中,從晶片2側加壓,在使第2金屬層21以及第1金屬層11熔融的第2既定溫度下,將晶片2正式接合於基板1上。更具體說明之,在第4階段中,利用第2晶片結合裝置的結合頭4b從晶片2側加熱,使晶片2與基板1液相擴散接合。液相擴散接合,係在使晶片2的第1金屬層21與基板1的第1金屬層11的至少其中一方暫時熔融、液化之後,利用擴散使其等溫固化的方法。在此,係使晶片2的第2金屬層21與基板1的第1金屬層11共晶接合。共晶接合,係在液相擴散接合之中對於液化利用共晶反應的接合方法。
在第4階段中,使第2晶片結合裝置的結合頭4b所設置的夾頭5b與晶片2接觸,利用結合頭4b的加熱器(圖中未顯示)隔著夾頭5b將晶片2加熱到第2既定溫度,在此狀態下,從結合頭4b側對晶片2以既定時間施加適當的既定壓力。藉此,在第4階段中,使晶片2的第2金屬層21與基板1的第1金屬層11共晶接合。第2既定溫度,例如,當第2金屬層21的材料為Au,第1金屬層11的材料為AuSn時,只要設定成比AuSn的熔融溫度更高的溫度即可。既定壓力,例如,適當設定在2kg/cm2~50kg/cm2左右的範圍內即可。另外,既定時間,例如,適當設定在0.5秒~10秒左右的範圍內即可。
第4階段,宜不在空氣環境中進行,而是在經過控制的氣體環境中進行。關於經過控制的氣體環境,例如,惰性氣體環境、真空環境、還原性氣體環境等。關於惰性氣體環境,可舉例如N2氣體環境、氬氣氣體環境等。關於還原性氣體環境,可舉例如H2氣體環境。在第4階段中,藉由使氣體環境為惰性氣體環境或是真空環境,便可抑制氧化。另外,在第4階段中,藉由使氣體環境為還原性氣體環境,便可將不需要的氧化物除去。
在第4階段中,不僅從晶片2側進行加熱,更利用平台3b的加熱器(圖
中未顯示)隔著平台3b從基板1側進行加熱,惟並不限於此,亦可僅從晶片2側或基板1側進行加熱。在此,當第2金屬層21的材料為AuSn,第1金屬層11的材料為Au時,宜以比起基板1側而言晶片2側的溫度更高的方式,分別設定結合頭4b的加熱器以及平台3b的加熱器的溫度。另外,平台3b的加熱器的溫度,宜設定在AuSn的熔點以下。這是因為,在晶片2安裝後若AuSn再度熔融,以高精度安裝的晶片2會有產生位置偏差之虞。
進行液相擴散接合時的接合條件,宜設定成接合界面的空隙率(未接合率)在例如20%以下。空隙率,例如,可規定為:在所期望的接合區域的面積(例如所期望的接合層31的面積)中所占的未接合區域的面積的比例。所期望的接合區域的面積以及未接合區域的面積,例如,可在進行過液相擴散接合之後,例如,從利用超音波顯微鏡進行觀察所得到的超音波顯微鏡像圖推測之。
本實施態樣的安裝方法,藉由在暫時接合之後進行正式接合,可使接合強度提高,同時可減少空隙。藉此,本實施態樣的安裝方法,可降低晶片2與基板1之間的熱阻,同時降低熱阻的差異。
以上說明的本實施態樣的安裝方法包含:暫時接合步驟,其將複數個晶片2暫時接合於基板1上;以及正式接合步驟,其將暫時接合於基板1上的複數個晶片2正式接合於基板1上。在此,暫時接合步驟,依照欲安裝於基板1上之複數個晶片2的數目,重複進行由第1階段以及第2階段所構成的第1基本步驟。第1階段,將基板1的第1金屬層11與晶片2的第2金屬層21二者的位置對準。第2階段,將第2金屬層21與第1金屬層11藉由固相擴散接合的方式暫時接合。另外,正式接合步驟,依照基板1上的複數個晶片2的數目,重複進行由第3階段與第4階段所構成的第2基本步驟。第3階段,識別出暫時接合於基板1上的晶片2的位置。第4階段,使第2金屬層21與第1金屬層11液相擴散接合,藉此將其正式接合。因此,本實施態樣的安裝方法,由於暫時接合步驟與正式接合步驟使用不同的設備進行,故可對彼此相異的2片基板1平行進行暫時接合步驟與正式接合步驟。因此,本實施態樣的安裝方
法,可縮短安裝步驟的作業時間。
在該安裝方法中,宜使固相擴散接合在第1既定溫度下進行,並使液相擴散接合藉由從晶片2側以及基板1側的至少其中一側的加熱而在比第1既定溫度更高的第2既定溫度下進行。藉此,該安裝方法,在晶片2與基板1正式接合的前後,可防止晶片2的位置產生偏差,另外,亦可使基板1上的複數個晶片2的熱履歷一致。
另外,在安裝方法中,藉由採用從矽晶圓所形成的晶圓作為基板1,可縮小第1金屬層11的基底的表面粗糙度,並可縮小第1金屬層11的表面粗糙度。因此,該安裝方法,可抑制因為第1金屬層11的表面粗糙度而導致在暫時接合或正式接合時產生空隙,進而使接合強度提高。關於第1金屬層11的表面粗糙度,例如,日本工業規格JIS B 0601-2001(國際標準化機構ISO 4287-1997)所規定的算術平均粗糙度Ra宜在10nm以下,更宜在數nm以下。
茲根據若干較佳實施態樣記述本發明,惟在不超出本發明的原本的精神以及範圍(亦即請求範圍)的情況下,本領域從業人員可思及各種修正以及變化。
1‧‧‧基板
2‧‧‧晶片
3a‧‧‧平台
3b‧‧‧平台
4a‧‧‧結合頭
4b‧‧‧結合頭
5a‧‧‧夾頭
5b‧‧‧夾頭
11‧‧‧第1金屬層
21‧‧‧第2金屬層
31‧‧‧接合層
Claims (4)
- 一種安裝方法,用以在基板上安裝複數個晶片,其特徵為包含:暫時接合步驟,將該複數個晶片暫時接合於該基板上;以及正式接合步驟,將暫時接合於該基板上的該複數個晶片正式接合於該基板上;該暫時接合步驟,依照欲安裝於該基板上的該複數個晶片的數目,重複進行由第1階段與第2階段所構成的第1基本步驟;該第1階段,將該基板的第1金屬層與該晶片的第2金屬層二者的位置對準;該第2階段,在該第1階段之後,從該晶片側加壓,使該晶片的該第2金屬層與該基板的該第1金屬層固相擴散接合,藉此將該晶片暫時接合於該基板上;該正式接合步驟,依照該基板上的該複數個晶片的數目,重複進行由第3階段與第4階段所構成的第2基本步驟;該第3階段,識別出暫時接合於該基板上的該晶片的位置;該第4階段,在該第3階段之後,從該晶片側加壓,使該晶片的該第2金屬層與該基板的該第1金屬層液相擴散接合,藉此將該晶片正式接合於該基板上。
- 如申請專利範圍第1項之安裝方法,其中,該固相擴散接合在第1既定溫度下進行;該液相擴散接合,藉由從該晶片側以及該基板側的至少其中一側的加熱,而在比該第1既定溫度更高的第2既定溫度下進行。
- 如申請專利範圍第2項之安裝方法,其中,該第1既定溫度為該第1金屬層以及該第2金屬層不會熔融的溫度;該第2既定溫度為該第1金屬層以及該第2金屬層熔融的溫度。
- 如申請專利範圍第1至3項中任一項之安裝方法,其中,該固相擴散接合為超音波接合或是表面活性化接合。
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| CN113948408A (zh) * | 2020-07-17 | 2022-01-18 | 郑官植 | 无助焊剂倒装芯片封装件的制造装置及制造方法 |
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| TWI699858B (zh) * | 2018-04-20 | 2020-07-21 | 台灣積體電路製造股份有限公司 | 接合方法及用於執行其的接合設備 |
| US11342302B2 (en) | 2018-04-20 | 2022-05-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bonding with pre-deoxide process and apparatus for performing the same |
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| CN113948408A (zh) * | 2020-07-17 | 2022-01-18 | 郑官植 | 无助焊剂倒装芯片封装件的制造装置及制造方法 |
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| US20150287696A1 (en) | 2015-10-08 |
| US9508679B2 (en) | 2016-11-29 |
| KR20150013899A (ko) | 2015-02-05 |
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| EP2884526A4 (en) | 2015-12-30 |
| JP6044885B2 (ja) | 2016-12-14 |
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| CN104520976A (zh) | 2015-04-15 |
| WO2014024343A1 (ja) | 2014-02-13 |
| EP2884526A1 (en) | 2015-06-17 |
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