TW201351855A - Voltage converter with soft start circuitry - Google Patents

Abstract

A voltage converter with a soft start circuitry is provided. The converter receives an input voltage to generate a regulated output voltage. In one embodiment of the present invention, the converter comprises an output pad, a soft start pad, and a control circuitry. The regulated output voltage is sent from the output pad. The soft start pad is selectively coupled to a first capacitor outside the control circuitry. The control circuitry is implemented as an integrated circuitry, and the control circuitry comprises a second capacitor, an error amplifier, and the soft start circuitry. The capacitance of the first capacitor is larger than that of the second capacitor. The soft start circuitry in the present invention provides a soft start time interval based on the connection of the first capacitor.

Description

Voltage converter with slow start circuit

The present invention relates to a voltage converter having a slow start circuit.

A DC to DC voltage converter can be used to regulate an input voltage to a stable output voltage to supply the current required by the load. In general, the DC to DC voltage converter is divided into a boost converter, a buck converter, and a buck-boost voltage converter according to the input voltage and the output voltage value. Buck-boost converter). FIG. 1 is a schematic diagram showing the architecture of a typical boost voltage converter 10. Referring to FIG. 1, the boost voltage converter 10 includes an input capacitor C _IN , an inductor L, two power switching elements SW ₁ and SW ₂ , an output capacitor C _OUT and a control circuit 12, wherein the control circuit 28 and The power switching elements SW _A and SW _B are implemented in the form of an integrated circuit. The control circuit 12 is configured to provide two driving signals D ₁ and D ₂ for controlling the two power switching elements SW ₁ and SW ₂ such that the power switching elements SW ₁ and SW ₂ can be alternately turned on and off.

Referring to FIG. 1, the control circuit 12 includes an error amplifier 122, a compensation network 124, a comparator 126, an oscillating circuit 128, and a Pulse Width Modulation (PWM) circuit 130. The compensation network 124 is used to compensate for the stability of the error amplifier 122. The oscillating circuit 128 is configured to generate a clock signal osc to the pulse width modulation circuit 130 and generate a sawtooth signal saw to the comparator 126. Osc the clock signal for providing the control circuit 12 switches the timing of the rising edge of the clock signal osc will make the power switching element SW ₁ is turned on and that the other power switching element SW ₂ is turned off. The boost voltage converter 10 further includes a voltage dividing circuit 14 for detecting a change in the output voltage V _OUT . The voltage dividing circuit 14 divides the output voltage V _OUT by two series resistors R ₁ and R ₂ to generate a corresponding feedback voltage V _FB . The error amplifier 122 generates a corresponding output voltage V _E based on the voltage difference between the reference voltage V _REF and the feedback voltage V _FB . The comparator 126 generates a pulse wave signal after comparing the output voltage V _E transmitted from the error amplifier 10 with the sawtooth wave signal V _SAW . The pulse wave signal is transmitted to the pulse width modulation circuit 130 to generate corresponding drive signals D ₁ and D ₂ . The inductor L is charged or discharged by driving the signals D ₁ and D ₂ alternately turning on or off the power switching elements SW ₁ and SW ₂ , and the boosting voltage converter 10 can generate a required load current and a stable output. Voltage.

Referring to Figure 1, in a conventional architecture, the boost voltage converter 10 further includes a soft-start pad 132 to provide a slow start function. At the initial stage of system startup, since the initial value of the output voltage V _OUT is much lower than the voltage value at the time of stabilization, the on-time of the power switching element SW ₁ is high. In this case, the increase in the inductor current will exceed its equilibrium value in a short period of time, resulting in excessive inrush current and output voltage overshoot at the beginning of the system startup. To improve this situation, the control circuit 12 of Figure 1 includes an internal current source I _S that is coupled to an external capacitor C _SS to provide a slow start time interval. During this slow start interval, the voltage on the slow-start pad 132 will slowly rise linearly until the voltage is greater than the reference voltage V _REF . Thus, the control circuit 12 may control the conduction time of switch SW ₁ such that the output voltage V _OUT will gradually increase, thus achieving the soft-start function.

However, in the conventional architecture, an additional slow-start pad is required to connect the external Capacitance, and the setting of external capacitors also increases the overall area and cost of the board. Therefore, it is necessary to propose an improved control circuit to support the slow start function, thereby improving the voltage overshoot and the inrush current at the beginning of the system startup.

SUMMARY OF THE INVENTION An object of the present invention is to provide a voltage converter which can improve an excessive inrush current and an output voltage overshoot condition at the initial stage of system startup. The voltage converter receives an input voltage and thereby regulates the generation of an output voltage.

To achieve the above objects, an embodiment of the voltage converter of the present invention includes an output pad, a slow-start pad, and a control circuit. The output pad is for outputting the output voltage. The slow-start pad is selectively coupled to one of the first capacitors external to the control circuit. The control circuit is implemented in the form of an integrated circuit, wherein the control circuit includes a second capacitor, an error amplifier and a slow start circuit. The error amplifier has a first positive phase input terminal receiving a reference voltage, a second positive phase input terminal coupled to the slow start pad, a third positive phase input terminal coupled to the second capacitor, and receiving One of the feedback voltages associated with the output voltage is an inverting input and an output providing an error voltage. The slow start circuit has a first end coupled to the second capacitor and a second end coupled to the slow start pad. The capacitance of the first capacitor is greater than the capacitance of the second capacitor. The slow start circuit provides a slow start time interval according to the connection condition of the first capacitor.

The direction discussed herein is a voltage converter that improves the excessive inrush current and output voltage overshoot conditions at the beginning of system startup. for In order to thoroughly understand the present invention, detailed steps and structures are set forth in the following description. Obviously, the implementation of the present invention is not limited to the specific details familiar to those skilled in the relevant art. On the other hand, well-known structures or steps are not described in detail to avoid unnecessarily limiting the invention. The preferred embodiments of the present invention are described in detail below, but the present invention may be widely practiced in other embodiments, and the scope of the present invention is not limited by the scope of the following patents. .

2 shows a block diagram of a voltage converter 20 that can improve excessive inrush current and output voltage overshoot conditions in conjunction with an embodiment of the present invention. The voltage converter 20 is configured to receive an input voltage by V _IN to adjust to generate an output voltage V _OUT . Referring to FIG. 2, the voltage converter 20 includes an input capacitor C ₁ , an inductor L ₁ , two switches SW _A and SW _B , an output capacitor C ₂ , a control circuit 28 , and a voltage dividing circuit 24 . The control circuit 28 is operative to provide two drive signals for controlling the power switching elements SW _A and SW ₂ such that the switches SW _A and SW _B can be alternately turned on and off. The voltage converter 20 of FIG. 2 includes elements 124, 126, 128 and 130 of the conventional voltage converter 10 shown in FIG. 1, and the operation of the elements 124, 126, 128 and 130 will not be repeated here. In addition, the control circuit 28 adds a slow start circuit 282, and in the control circuit 28, an error amplifier 284 replaces the error amplifier 122 in the conventional control circuit 12 of FIG.

In the present embodiment, the control circuit 28 and the power switching elements SW _A and SW _B are implemented in the form of an integrated circuit. However, the invention should not be limited thereto. In other embodiments, power switching elements SW _A and SW _B may be external components. Referring to FIG. 2, an input pad 22 is coupled to the inductor L ₁ , another input pad 29 is coupled to the voltage dividing circuit 24 , and an output pad 26 is configured to transmit the output voltage V _OUT . The voltage dividing circuit 24 is composed of two series resistors R _A and R _B for dividing the output voltage V _OUT to generate a corresponding feedback voltage V _FB . The control circuit 28 includes an internal capacitor C _SSIN , the slow start circuit 282 and the error amplifier 284 , wherein the capacitor C _{SSIN is} connected to the slow start circuit 282 , and the slow start circuit 282 is selected by a slow start pad 30 . Sexually connected to an external capacitor C _SSEXT . The error amplifier 284 has a first positive phase input terminal receiving a reference voltage V _REF , a second positive phase input terminal coupled to the slow start pad 30 , and a third positive phase coupled to the capacitor C _SSIN . The input terminal receives an inverting input terminal of the feedback voltage V _FB and an output terminal for providing an error voltage V _ERR . In addition, the slow start circuit 282 has a first end coupled to the capacitor C _SSIN and a second end coupled to the slow start pad 30 .

Referring to FIG. 2, the slow start circuit 282 provides a slow start time interval according to the connection condition of the external capacitor C _SSEXT . During this slow start time interval, the slow start voltage SS ₁ (SS ₂ ) causes the feedback voltage V _FB to follow its change by the control of the error amplifier 284. Therefore, the output voltage V _OUT is smoothly increased to achieve a slow start function, thereby minimizing the excessive inrush current condition at the initial stage of system startup. When the slow start voltage SS ₁ (SS ₂ ) is greater than the reference voltage V _REF , the slow start voltage SS ₁ (SS ₂ ) no longer dominates the control of the output voltage V _OUT . Alternatively, the feedback voltage V _FB and the reference voltage V _REF will regulate the output voltage V _OUT to a target value via the negative feedback control of the error amplifier 284.

3 shows a detailed circuit diagram of the slow start circuit 282 incorporating an embodiment of the present invention. Referring to Figure 3, the slow start _1, I _2, and the I _3, a switching element 2822 and a comparator circuit 282 includes a current source circuit I 2824. The current source I _{1 is} coupled to the slow start pad 30 . The current source I _{2 is} coupled to the switching element 2822. The current source I _{3 is} coupled to the capacitor C _SSIN . The switching element 2822 is configured to selectively couple the current source I ₂ to the capacitor C _SSIN according to the output signal CM of the comparison circuit 2824. The comparison circuit 2824 has a first input terminal for receiving a predetermined voltage V _SET , a second input terminal coupled to the slow start pad 30 , and an output terminal for providing the output signal CM .

4A and 4B show several circuit configurations in which the predetermined voltage V _SET may be formed. Referring to FIG. 4A, the predetermined voltage V _SET can be composed of a current source I _S1 and a P-type transistor MP which is extremely short-circuited by a gate-turn. Therefore, the voltage level of the predetermined voltage V _SET is approximately VDD - V _{GS (MP)} . Referring to FIG. 4B, the predetermined voltage V _SET can be composed of a current source I _S2 and a resistor R _C . Therefore, the voltage level of the predetermined voltage V _SET is determined by the value of the current source I _S2 and the resistor R _C .

The operation of the slow start circuit 282 will now be described in conjunction with Figures 2, 3 and 4A. Referring to FIG. 3, when the slow-start pad 30 is in a floating state (that is, the slow-start pad 30 is not connected to the external capacitor C _SSEXT ), the voltage level on the slow-start pad 30 is due to the current source I _{1 .} It will be pulled up to the level of the voltage source V _DD . Since the voltage level of the predetermined voltage V _SET is substantially VDD - V _{GS (MP)} , the comparison circuit 2824 outputs a signal CM having a logic 0, so that the switching element 2822 is turned off. Therefore, the voltage signal SS ₁ on the capacitor C _SSIN rises linearly slowly only via the current source I ₃ . Since the level of the voltage signal SS ₂ is greater than the level of the voltage signal SS ₁ during the slow start time interval, the feedback voltage V _FB in FIG. 2 will follow the change of the voltage signal SS ₁ during the time interval, thereby achieving relaxation. The function that is activated.

On the other hand, when the external capacitor C _SSEXT is connected to the slow-start pad 30, the voltage level on the slow-start pad 30 is linearly increased by charging the current source I ₁ . In general, the capacitance of the external capacitor C _SSEXT is greater than the capacitance of the internal capacitor C _SSIN . Therefore, in this embodiment, the current value of the current source I ₁ is preferably substantially equal to the current value of the current source I ₂ , and the current value of the current source I ₁ is preferably greater than the current source I ₃ . Current value. However, the invention should not be limited thereto. The capacitance of the external capacitor C _SSEXT may be greater than ten times the capacitance of the internal capacitor C _SSIN . In another embodiment, the capacitance of the external capacitor C _SSEXT is selected to be above nF, and the capacitance of the internal capacitor C _SSIN is selected to be a pF or so. Therefore, in this embodiment, the current value of the current source I ₁ is preferably substantially identical to the value of the current source current I ₂ and the current value I of the current source ₃ is visible and the capacitance ratio of the capacitance _C SSEXT of C _SSIN And make adjustments. Referring to FIG. 3, when the voltage level on the slow-start pad 30 is less than VDD-V _{GS (MP)} , the comparison circuit 2824 outputs a signal CM having a logic 1 such that the switching element 2822 is turned on. Therefore, the voltage signal SS ₁ on the capacitor C _SSIN is simultaneously charged via the current source I ₂ and the current source I ₃ to rapidly rise to the level of the voltage source V _DD , so that the voltage signal SS _{2 is} in the slow start time interval. the level will be less than the voltage level signal SS _1. Therefore, during this time interval, the feedback voltage V _{FB in} FIG. 2 will follow the change of the voltage signal SS ₂ , thereby achieving the function of slow start.

In addition, during the slow start time interval, when the level of the voltage signal SS ₂ rises to VDD-V _{GS (MP)} , the comparison circuit 2824 outputs a signal CM having a logic 0, so that the switching element 2822 is turned off. Therefore, the voltage signal SS ₁ on the capacitor C _SSIN is maintained at the level of the voltage source V _DD via the current source I ₃ . Since the switching element 2822 is in an off state, the current source I _{2 is} not coupled to the capacitor C _SSIN , thereby reducing power loss.

In the above embodiment, the embodiment of the present invention and its function are described by taking the step-up voltage converter 20 as an example, but the invention should not be limited thereto. For example, the buck voltage converter and the buck-boost voltage converter have the same or approximately configured control circuit, so the present invention can also be applied thereto. In addition, the circuit disclosed in the present invention may also be implemented on a Flyback or Forward voltage converter or an AC to DC voltage converter.

The technical and technical features of the present invention have been disclosed as above, and those skilled in the art can still make various substitutions and modifications without departing from the spirit and scope of the invention. Therefore, the scope of the invention should be construed as not limited by the scope of the invention, and the invention is intended to be

10‧‧‧Boost voltage converter

12‧‧‧Control circuit

122‧‧‧Error amplifier

124‧‧‧Compensation Network

126‧‧‧ comparator

128‧‧‧ oscillating circuit

130‧‧‧ pulse width modulation circuit

132‧‧‧Slow start pad

14‧‧‧voltage circuit

20‧‧‧Voltage Converter

22‧‧‧ input pad

24‧‧‧voltage circuit

26‧‧‧Output pad

28‧‧‧Control circuit

282‧‧‧ Slow start circuit

2822‧‧‧Switching elements

2824‧‧‧Comparative circuit

284‧‧‧Error amplifier

29‧‧‧ input pad

30‧‧‧Slow start pad

C _IN , C _OUT , C ₁ ,

C ₂ , C _SSIN , C _SSEXT ‧‧‧ capacitor

I ₁ , I ₂ , I ₃ ,

I _S , I _S1 , I _S2 ‧‧‧ current source

L, L ₁ ‧‧‧Inductance

M _P ‧‧‧O crystal

R ₁ , R ₂ ,

R _A , R _B , R _C ‧‧‧resistance

SW ₁ , SW ₂ , SW _A , SW _B ‧‧‧Power switching components

1 is a schematic structural diagram of a typical step-up voltage converter; FIG. 2 is a schematic diagram showing the structure of a voltage converter capable of improving excessive inrush current and output voltage overshoot in combination with an embodiment of the present invention; A detailed circuit diagram of the slow-start switching circuit in conjunction with an embodiment of the present invention; and Figures 4A and 4B show several circuit configurations that may form the predetermined voltage.

20‧‧‧Voltage Converter

22‧‧‧ input pad

24‧‧‧voltage circuit

26‧‧‧Output pad

28‧‧‧Control circuit

282‧‧‧ Slow start circuit

284‧‧‧Error amplifier

29‧‧‧ input pad

30‧‧‧Slow start pad

C ₁ , C ₂ , C _SSIN ,

C _SSEXT ‧‧‧ capacitor

L ₁ ‧‧‧Inductance

R _A , R _B ‧‧‧resistance

SW _A , SW _B ‧‧‧Power switching components

Claims (10)

A voltage converter for receiving an input voltage for regulating an output voltage, the voltage converter comprising: an output pad for outputting the output voltage; and a slow start pad selectively coupled to a control circuit a first capacitor of the external; and the control circuit is implemented in the form of an integrated circuit, the control circuit comprising: a second capacitor; an error amplifier having a first positive phase input receiving a reference voltage a second positive phase input coupled to the slow start pad, a third positive phase input coupled to the second capacitor, and an inverting input receiving a feedback voltage associated with the output voltage And an output terminal for providing an error voltage; and a slow start circuit having a first end coupled to the second capacitor and a second end coupled to the slow start pad; wherein the capacitance of the first capacitor The value is greater than the capacitance of the second capacitor; and wherein the slow start circuit is based on the connection condition of the first capacitor to provide a slow start time interval. The voltage converter of claim 1, wherein the slow start circuit comprises: a first current source coupled to the slow start pad; a second current source coupled to a switching element; and a third current source coupled Connected to the second capacitor in the control circuit; the switching element is configured to selectively couple the second current source to the second capacitor according to a comparison signal; A comparison circuit has a first input receiving a predetermined voltage, a second input coupled to the slow-start pad, and an output providing the comparison signal. A voltage converter according to claim 2, wherein the voltage level of the predetermined voltage is determined by a fourth current source and a P-type transistor whose gate-turn is short-circuited. The voltage converter of claim 2, wherein the current value of the first current source is substantially the same as the current value of the second current source, and the current value of the first current source is greater than the current value of the third current source. The voltage converter of claim 2, wherein a capacitance of the first capacitor is greater than ten times a capacitance of the second capacitor, and a current value of the first current source is substantially the same as a current value of the second current source, The current value of the first current source is greater than ten times the current value of the third current source. The voltage converter of claim 4, wherein when the first capacitor is not coupled to the slow start pad, the slow start interval is determined by a capacitance of the second capacitor, a current value of the third current source, and the reference The voltage level of the voltage is determined. The voltage converter of claim 6, wherein the switching element is in an off state when a voltage level of the second input is greater than a voltage level of the predetermined voltage. The voltage converter of claim 4, wherein when the first capacitor is coupled to the slow start pad, the slow start interval is determined by a capacitance of the first capacitor, a current value of the first current source, and the reference voltage The voltage level is determined. The voltage converter of claim 8, wherein the switching element is in an off state when a voltage level of the second input is greater than a voltage level of the predetermined voltage. A voltage converter according to claim 1, wherein the voltage converter is a step-up voltage converter, a buck voltage converter or a buck-boost voltage converter