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TW201005959A - Photodiode structure and method of manufacturing the same - Google Patents

Photodiode structure and method of manufacturing the same Download PDF

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Publication number
TW201005959A
TW201005959A TW97128755A TW97128755A TW201005959A TW 201005959 A TW201005959 A TW 201005959A TW 97128755 A TW97128755 A TW 97128755A TW 97128755 A TW97128755 A TW 97128755A TW 201005959 A TW201005959 A TW 201005959A
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Taiwan
Prior art keywords
substrate
conductive layer
layer
electrode
back side
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TW97128755A
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Chinese (zh)
Inventor
Tai-Hui Liu
Chan-Shin Wu
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Solapoint Corp
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Priority to TW97128755A priority Critical patent/TW201005959A/en
Publication of TW201005959A publication Critical patent/TW201005959A/en

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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

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Abstract

A photodiode structure and methods of manufacturing the same are provided. The method includes providing a substrate defining a front side and a back side; sequentially forming an epitaxy layer and a first conductive layer on the front side; etching the back side of the substrate through the epitaxy layer to form a trench exposing the first conductive layer, the trench defining a side wall; forming an insulting layer over the side wall, the insulating layer defining an opening exposing the first conductive layer; forming a second conductive layer on the back side, the second conductive layer having a first electrode and a second electrode isolated from etch other, wherein the first electrode is over the insulating layer and filling up the opening to connect the first conductive layer.

Description

201005959 九、發明說明: 【發明所屬之技術領域】 本發明係關於一種光電二極體結構及其製造方法,更具體地 是關於覆晶型的光電二極體結構及其製造方法。 【先前技術】 光電二極體之原理係基於半導體的光生伏特效應,以將光能 1轉為電能》光電二極體包含不同電性半導體之p_N接面。在光 線照射下’光被P-N接面所吸收而產生電流。一般而言,光電二 極體結構之N型電極係設置於光電二極體結構的向光侧,p型電 極則設置於背光側,其對外連接通常是利用打線。 一圖1A例不習知之光電二極體元件100之俯視圖,圖1B例 不沿圖1A之1-1’線的剖面圖。如圖所示,光電二極體元件 包含具有P_N接面的吸光層11〇 ;設置於其向光侧❾n型電極 120 ;及設置於背光側的p型電極13〇。N型電極包含一第一 ‘隱’用以傳輸照光所產生的電流;及一第二部分12〇b, 12〇a ° W 140 } N ^ 士始夕接。打線的位置通常設置於第二部们鳥。為使 J光:ίί:進:第二部分120b需有夠寬廣的面積’此將減 ⑽的·=可技_,降低光電二極體結構 進行結構140也會造成光電二極體元件議 製法來改“知二:以,需要一種新穎的光電二極體結構及其 201005959 【發明内容】 有鑑於上述之需求’本發明於一方面係提供一種具有埋孔之 覆晶型的光電一極體結構的製作方法。在此所稱埋孔係指埋在向 光铡下方的溝渠。透過本發明之埋孔,p型對外接觸電極及N型 對外接觸電極可設置在光電二極體結構的背光側。而且,埋孔的 尺寸可因應製程能力而儘可能地縮小,不需要為了配合打線而有 占據過大的面積的問題,可大幅增加光電二極體結構的效能。 依據一實施例,本發明係提供一種光電二極體結構的製造方 法,包含:舞供一基板,該基板定義一前側及一背侧;依序形成 一磊晶層及一第一導電層於該基板之該前側;蝕刻該基板之該背 侧並穿透該蟲晶層以形成-溝渠,該溝渠定義—侧壁並露出該第 一導電層;形成一絕緣層覆蓋該侧壁,該絕緣層定義一開口露出 該第-導電層;形成-第二導電層於該基板之該背側,該第二導 電層包含相互隔離的一第一電極及一第二電極,該第一電極覆蓋 該絕緣層並填充該開口以連接該第一導電層。 依據另一實施例,本發明之方法除上述步驟外,更包含在該 侧該基板之該背侧的步驟之前與該依序形成該蟲晶層及該第 -導電層的步狀後研雜基板找背_使紐厚度低於5〇 以下,有利於散熱。 依據更一貫施例,本發明之方法除上述步驟外,更包含:在 該基板之該背_—就位置上形_賴·及侧上述之光電 二極體結構以形成複數個光電二極體元件,其中該溝渠得以位在 -6- 201005959 該複數個光電二極體元件之其中之一的一角落、—中心位置或其 他合適位置。換言之,該溝渠可以形成在基板背侧的任一位置二 依據更另一實施例’本發明之方法除上述步驟外,更包含: 在該基板之該背側的預定位置上形成複數個該溝渠;及切割上述 之光電二極體結構以形成複數個光電二極體元件,A中該^數個 光電二極體元件之其中之-可具有一個以上的該溝渠:基板背 側的任一位置。 本梦明於另-方面係提供具有埋孔之覆晶型的光電二極體 元件。本發明之發光二極體元件至少具有以下優點: (1) 將向光侧的接觸電極透過埋孔移到背光侧,可減少向光 側之導電層所占面積而增加向光侧之可曝光面積。 (2) 埋孔可位於光電一極體元件之任何位置,不再受限於光 電二極體元件雜’增加電路料雜,対使電轉曝光面積 的比例最佳化。 ⑶Pi與N型電極都設在背面可免除打線程序,簡化势程 有利於大量生產。 < 依據一實施例,本發明提供一種光電二極體元件,包含:一 基板’定義-前側及-背側;-蠢晶層及一第一導電層依序疊設 於该基板之該前侧;一溝渠穿透該基板及該磊晶層,該溝渠定義 -側壁並露出該第-導電層;—絕緣層覆蓋該繼,親緣層定 義-開口露出該第-導電層;及—第二導電層設置於該基板之該 月側,5亥第一導電層包含相互隔離的一第一電極及一第二電極, 201005959 該第一電極覆蓋該絕緣層並填充該開口以連接該第一導電層。 依據另一實施例,本發明之光電二極體元件除了如上述外, 更包含使該溝渠位在該光電二極體元件之該背側的一角落、一中 心位置或其他合適位置。換言之,該溝渠可以形成在基板背側的 任一位置。 依據更另一實施例,,本發明之光電二極體元件除了如上述 ® 外,更包含:使光電二極體元件具有一個以上的該溝渠於基板背 侧的任一位置。 【實施方式】 以下將參考所附圖式示範本發明之較佳實施例。所附圖式中 相似結構係採用相同的結構符號。應注意為清楚呈現本發明,所 附圖式中之各結構並非按照實物之比例纷製,而且為避免模糊本 發明之内容,以下說明亦省略習知之零組件、相關材料、及其相 關處理技術。 圖2A至2G係根據一第一實施例,例示本發明光電二極體結 ,2000^製作過程。首先參考圖2A,提供一基板·,基板朋 定義岫側2⑻a及一背侧2〇〇b。基板2〇〇可為GaAs或其他合適 族材料製成。接著,利用有機金屬氣相i晶法(MOCVD) „半導體蟲晶層210於基板200之前側200a上。半導體蟲晶層 士可^具有複數個ρ·η接面的m_v族半導體多層結構。舉例而 5 ’半導體#石晶層210可包含InGaP層、GaAs層及InGaAs層。 -8- 201005959 依據本實施例,半導體蟲晶層⑽的厚度較佳約為5颇 =然後’形成-第-導電層220疊在半導晶層21〇的上方。 ’ -導電層⑽較料具有_的導,其伽彡成如網路般的 導驗日層21G的表面,用以傳輸半導體蠢晶 層2H)所產生的電流。製作圖案化的第—導電層細可藉 之沉積或金屬雜技術,沿著半導龄晶層21()的麵形成丘形 的導電層’然後再以習知微·刻來建立所要_案 ς ❹ 層210之材料可為任何合適金屬,如紹、銅紹、銅、金、銀、 鈦、鍺、或鎳,其較佳的厚度範圍為1/zm至1〇_,特佳為3 //111至5#111〇 - 、參考圖2B,翻轉圖2A所示之結構,使基板2〇0之背側面向 上並研磨基板200之背侧2〇〇b以降低基板2〇〇厚度。較佳而+, 經研磨後之基板200,之厚度係以小於5〇_為佳。 ° 參考圖2C ’在基板200,之背侧200b上先定義一預定位置, ❹如圖2C之虛線。至〇’所示。採用習知之乾蝕刻或濕蝕刻技術,-姓刻基板200於此預定位置。此蝕刻穿透基板2〇〇,及半導體磊晶 層210停止於第-導電層22〇而形成一溝渠23〇。溝渠咖定^ 一|則壁231及露出第一導電層22〇的一底表面232。溝渠23〇的 直徑較佳約50#m至200ym,其中以1〇〇ym為特佳。 #渠23〇完成之後’接著即執行絕緣層24〇,的形成程序。絕 緣層240,將覆蓋側壁231且定義一開口 25〇使底下的第一導電層 220露出。較佳而言,參考圖2D,此程序可先形成—共形絕緣^ 201005959 覆蓋基板200之背侧200b及溝渠23〇之側壁231與底表面 232。共形絕緣層24〇之材料可為氮切、氧化料其他合適材 料。可用習知之方法,如電漿加強化學氣相沉積法(pECvD)或原 子層積法(ALD)來執行此步驟。依據本實施例,共形絕緣層24〇 的厚度較佳在500埃至1500埃之間。接著,參考圖2E ,採用習 知之微影餘刻技術圖案化共形絕緣層24〇,移除共形絕緣層24〇 之一部分以露出底下之基板2〇〇之背側2〇〇b並建立開口 250以露 出第一導電層220。如圖2E所示,經圖案化之共形絕緣層24〇稱 ❹為、絕緣層240’。絕緣層240’係用來隔離基板200,與後續所要形成 的第一電極260a。 · 絕緣層240’完成後,接著即執行第二導電層26〇,的形成程 序。第一導電層260’形成於基板200’之背侧200b。第二導電層 260’包含相互隔離的一第一電極26〇a及一第二電極26〇b,第一電 極260a覆蓋絕緣層24〇,並填充開口 25〇以連接第一導電層22〇。 較佳而言,此程序可先形成一共形第二導電層260覆蓋基板2〇〇, ❿ ·之背侧200b、絕緣層240,及開口 250,如圖2F所示。然後,再 移除共形第二導電層260之一部分以形成第二導電層260,。第二 導電層260’包含相互隔離的第一電極260a及第二電極260b,其 中第二電極26〇b係直接接觸基板200’,如圖2G所示。應注意第 一電極260a與第二電極260b之間係以空隔相互隔離。製作共形 第二導電層260可藉由習知之沉積或金屬濺鍍技術,沿著圖2E 所形成之結構之表面形成共形的導電層’然後再以習知微影蝕刻 移除不要的共形的導電層來建立所要的圖案。共形第二導電層 260之材料可為任何合適金屬,如鋁、銅、金、銀、鈦、鍺、或 201005959 鎳等’其較佳的厚度範圍為lym至10ym,其中以3μιη至5以 m為特佳。在此實施例中,第一電極260a即作為Ν型(或Ρ型) 對外接觸電極;而第二電極260b即為P型(或N型)對外接觸電 極’第一電極260a與第二電極260b電性相反所以必需互相隔離。 圖2G中所示之箭頭代表第一導電層220之表面朝向光。 圖2G顯示本發明之光電二極體結構2000。如圖所示,光電 二極體結構2〇⑻包含基板200’ ’定義前侧200a為向光側及背側 ® 200b為背光侧。光電二極體結構2000更包含蟲晶層210及第一 導電層220依序疊設於基板200,之前側200a上;溝渠230穿透基 板200’及磊晶層210’溝渠230定義側壁231並露出第一導電層 220 ;絕緣層240’覆蓋側壁231 ’絕緣層240’定義開口 250露出第 一導電層220 ;及第二導電層260’設置於基板2〇〇,之背側2〇〇b, 第二導電層260’包含相互隔離的第一電極260a及第二電極 260b’第一電極260a覆蓋絕緣層240’並填充開口 250以連接第一 導電層220〇除上述外,光電二極體結構2〇〇〇還可包含其他特徵、 魯 其相關材料與細節可參考前述說明。熟此技藝者應可理解,光電 二極體結構2000在後續製程步驟中將可進一步切割為複數個晶 片,本文稱為光電二極體元件,其同樣具有上述之各種特徵。201005959 IX. Description of the Invention: [Technical Field] The present invention relates to a photodiode structure and a method of fabricating the same, and more particularly to a flip-chip type photodiode structure and a method of fabricating the same. [Prior Art] The principle of the photodiode is based on the photovoltaic effect of the semiconductor to convert the light energy into electrical energy. The photodiode includes the p_N junction of different electrical semiconductors. Under the illumination of the light, the light is absorbed by the P-N junction to generate a current. In general, the N-type electrode structure of the photodiode structure is disposed on the light-directing side of the photodiode structure, and the p-type electrode is disposed on the backlight side, and the external connection is usually performed by wire bonding. Fig. 1A is a plan view of a conventional photodiode element 100, and Fig. 1B is a cross-sectional view taken along line 1-1' of Fig. 1A. As shown in the figure, the photodiode element includes a light absorbing layer 11 具有 having a P_N junction, a ❾n-type electrode 120 disposed on the light side thereof, and a p-type electrode 13 设置 disposed on the backlight side. The N-type electrode includes a first 'hidden' for transmitting the current generated by the illumination; and a second portion 12〇b, 12〇a ° W 140 } N ^ begins. The position of the line is usually set in the second bird. In order to make J light: ίί: enter: the second part 120b needs to have a wide area 'this will reduce (10) ·= _ _, reduce the structure of the photodiode structure 140 will also cause the photodiode component discussion method To change "Knowledge 2: I need a novel photodiode structure and its 201005959. [Invention] In view of the above needs, the present invention provides a flip-chip type photodiode having a buried via. The method for fabricating a structure, referred to herein as a buried channel, refers to a trench buried under the pupil. Through the buried via of the present invention, the p-type external contact electrode and the N-type external contact electrode can be disposed in a backlight of the photodiode structure. Moreover, the size of the buried via can be reduced as much as possible in accordance with the process capability, and there is no need to occupy an excessive area in order to match the wire bonding, and the performance of the photodiode structure can be greatly increased. According to an embodiment, the present invention The invention provides a method for manufacturing a photodiode structure, comprising: dancing a substrate, the substrate defining a front side and a back side; sequentially forming an epitaxial layer and a first conductive layer on the front side of the substrate Etching the back side of the substrate and penetrating the germane layer to form a trench, the trench defining a sidewall and exposing the first conductive layer; forming an insulating layer covering the sidewall, the insulating layer defining an opening to expose the a first conductive layer; a second conductive layer on the back side of the substrate, the second conductive layer includes a first electrode and a second electrode separated from each other, the first electrode covering the insulating layer and filling the opening In order to connect the first conductive layer, according to another embodiment, in addition to the above steps, the method of the present invention further comprises forming the crystal layer and the first layer before the step of the back side of the substrate on the side. After the step of the conductive layer, the substrate is found to have a thickness of less than 5 ,, which is advantageous for heat dissipation. According to a more consistent embodiment, the method of the present invention comprises: in addition to the above steps, the back of the substrate _ - forming a plurality of photodiode elements in the form of a photodiode structure as described above, wherein the trench is located at -6 - 201005959, one of the plurality of photodiode elements a corner, a central location or In a suitable position, in other words, the trench may be formed at any position on the back side of the substrate. According to still another embodiment, the method of the present invention includes, in addition to the above steps, a method of forming a predetermined position on the back side of the substrate. a plurality of the trenches; and cutting the photodiode structure to form a plurality of photodiode elements, wherein one of the plurality of photodiode elements in A may have more than one of the trenches: a back side of the substrate Any position of the present invention provides a photodiode element having a buried-hole flip-chip type in another aspect. The light-emitting diode element of the present invention has at least the following advantages: (1) contact to the light side The electrode is moved to the backlight side through the buried hole, which can reduce the area occupied by the conductive layer on the light side and increase the exposure area to the light side. (2) The buried hole can be located at any position of the photodiode element, and is no longer limited. In the photodiode component, the circuit is mixed, and the ratio of the area of the electro-expansion exposure is optimized. (3) Both Pi and N-type electrodes are provided on the back to eliminate the wire-drawing process, simplifying the potential range and facilitating mass production. According to an embodiment, the present invention provides a photodiode device comprising: a substrate 'definition-front side and a back side; - a stray layer and a first conductive layer are sequentially stacked on the front side of the substrate a trench; the trench penetrates the substrate and the epitaxial layer, the trench defines a sidewall and exposes the first conductive layer; the insulating layer covers the gate, the edge layer defines an opening to expose the first conductive layer; and - the second The conductive layer is disposed on the moon side of the substrate, and the first conductive layer includes a first electrode and a second electrode separated from each other. 201005959 The first electrode covers the insulating layer and fills the opening to connect the first conductive Floor. In accordance with another embodiment, the photodiode element of the present invention, in addition to the above, further includes positioning the trench at a corner, a center location, or other suitable location on the back side of the photodiode element. In other words, the trench can be formed at any position on the back side of the substrate. According to still another embodiment, the photodiode device of the present invention further comprises, in addition to the above ®, the photodiode element having one or more of the trenches at any position on the back side of the substrate. [Embodiment] Hereinafter, preferred embodiments of the present invention will be exemplified with reference to the accompanying drawings. Similar structures in the drawings have the same structural symbols. It should be noted that the present invention is not limited to the actual proportions of the present invention, and in order to avoid obscuring the contents of the present invention, the following description also omits conventional components, related materials, and related processing techniques. . 2A to 2G illustrate a photodiode junction of the present invention, according to a first embodiment. Referring first to Figure 2A, a substrate is provided, which defines a side 2 (8) a and a back side 2 〇〇 b. The substrate 2 can be made of GaAs or other suitable family of materials. Next, an organometallic vapor phase i crystal method (MOCVD) is used to "the semiconductor crystal layer 210 on the front side 200a of the substrate 200. The semiconductor germanium layer can have a plurality of m_v semiconductor multilayer structures having a plurality of p·n junctions. The 5 'semiconductor #石层层 210 may comprise an InGaP layer, a GaAs layer and an InGaAs layer. -8- 201005959 According to this embodiment, the thickness of the semiconductor crystal layer (10) is preferably about 5 s = then 'form-first-conducting The layer 220 is stacked above the semi-conductive layer 21〇. The conductive layer (10) has a conduction of _, which is a network-like surface of the inspection layer 21G for transmitting the semiconductor stray layer 2H. The generated current. The patterned first conductive layer can be formed by a deposition or metal hybrid technique, forming a hill-shaped conductive layer along the surface of the semi-conductive layer 21 () and then using a conventional micro- The material of layer 210 may be any suitable metal, such as sho, copper, gold, silver, titanium, tantalum, or nickel, preferably having a thickness ranging from 1/zm to 1 〇. _, especially good for 3 //111 to 5#111〇-, referring to FIG. 2B, flipping the structure shown in FIG. 2A to make the back side of the substrate 2〇0 The back side 2b of the substrate 200 is polished and polished to reduce the thickness of the substrate 2. Preferably, +, the thickness of the substrate 200 after polishing is preferably less than 5 Å. ° Referring to FIG. 2C 'on the substrate 200, a predetermined position is defined on the back side 200b, as shown by the dashed line in Fig. 2C. As shown in Fig. 2, using a conventional dry etching or wet etching technique, the substrate 200 is named at this predetermined position. The substrate 2〇〇 and the semiconductor epitaxial layer 210 stop at the first conductive layer 22〇 to form a trench 23〇. The trench 231 defines a wall 231 and a bottom surface 232 exposing the first conductive layer 22〇. The diameter of 23 turns is preferably about 50#m to 200ym, with 1〇〇ym being particularly good. After the completion of the channel 23〇, the formation process of the insulating layer 24〇 is performed. The insulating layer 240 will cover the sidewall 231. An opening 25 is defined to expose the underlying first conductive layer 220. Preferably, referring to FIG. 2D, the process can be formed first - conformal insulation ^ 201005959 covering the back side 200b of the substrate 200 and the sidewall 231 of the trench 23 And the bottom surface 232. The material of the conformal insulating layer 24〇 may be nitrogen cut, oxidized material and other suitable materials. This step is carried out by a conventional method such as plasma enhanced chemical vapor deposition (pECvD) or atomic layering (ALD). According to this embodiment, the thickness of the conformal insulating layer 24 is preferably from 500 Å to 1,500. Next, referring to FIG. 2E, the conformal insulating layer 24 is patterned using a conventional lithography technique, and a portion of the conformal insulating layer 24 is removed to expose the back side of the underlying substrate 2〇〇. 〇b and opening 250 is formed to expose first conductive layer 220. As shown in Fig. 2E, the patterned conformal insulating layer 24 is referred to as an insulating layer 240'. The insulating layer 240' is used to isolate the substrate 200 from the first electrode 260a to be formed later. After the insulating layer 240' is completed, the formation process of the second conductive layer 26 is performed. The first conductive layer 260' is formed on the back side 200b of the substrate 200'. The second conductive layer 260' includes a first electrode 26A and a second electrode 26A, which are separated from each other. The first electrode 260a covers the insulating layer 24A and fills the opening 25A to connect the first conductive layer 22A. Preferably, the process first forms a conformal second conductive layer 260 covering the back side 200b, the back side 200b, the insulating layer 240, and the opening 250, as shown in Figure 2F. Then, a portion of the conformal second conductive layer 260 is removed to form a second conductive layer 260. The second conductive layer 260' includes a first electrode 260a and a second electrode 260b that are isolated from each other, wherein the second electrode 26〇b directly contacts the substrate 200' as shown in Fig. 2G. It should be noted that the first electrode 260a and the second electrode 260b are isolated from each other by a space. The conformal second conductive layer 260 can be formed by a conventional deposition or metal sputtering technique to form a conformal conductive layer along the surface of the structure formed in FIG. 2E and then removed by conventional lithography etching. A conductive layer is formed to create the desired pattern. The material of the conformal second conductive layer 260 may be any suitable metal such as aluminum, copper, gold, silver, titanium, tantalum, or 201005959 nickel, etc., and its preferred thickness ranges from lym to 10 ym, wherein from 3 μm to 5 m is especially good. In this embodiment, the first electrode 260a is a Ν-type (or Ρ-type) external contact electrode; and the second electrode 260b is a P-type (or N-type) external contact electrode 'the first electrode 260a and the second electrode 260b Electrically opposite, they must be isolated from each other. The arrow shown in Fig. 2G represents the surface of the first conductive layer 220 facing the light. Figure 2G shows a photodiode structure 2000 of the present invention. As shown, the photodiode structure 2A (8) includes a substrate 200'' defining the front side 200a such that the light side and the back side ® 200b are the backlight side. The photodiode structure 2000 further includes a smectic layer 210 and a first conductive layer 220 sequentially stacked on the substrate 200, the front side 200a; the trench 230 penetrates the substrate 200' and the epitaxial layer 210' the trench 230 defines a sidewall 231 and Exposing the first conductive layer 220; the insulating layer 240' covers the sidewall 231' The insulating layer 240' defines the opening 250 to expose the first conductive layer 220; and the second conductive layer 260' is disposed on the substrate 2〇〇, the back side 2〇〇b The second conductive layer 260' includes the first electrode 260a and the second electrode 260b' separated from each other. The first electrode 260a covers the insulating layer 240' and fills the opening 250 to connect the first conductive layer 220. The photodiode is removed. Structure 2 can also include other features, and related materials and details can be referred to the foregoing description. It will be understood by those skilled in the art that the photodiode structure 2000 can be further diced into a plurality of wafers in a subsequent processing step, referred to herein as photodiode elements, which also have the various features described above.

在此應注意,本發明之光電二極體結構或光電二極體元件, 其弟一導電層也可為非共形的結構,如圖3A及圖3B之本發明第 二實施例示之光電二極體結構3〇〇〇。為使本說明書簡潔易懂,第 二實施例僅說明與第一實施例之相異處。換言之,第二實施例僅 顯示接續第一貫施例之圖2E之後的步驟,意即將圖2F及圖2Q 201005959 的程序改成圖3A與圖3B。如圖3A所示,可先形成一毯覆式第 二導電層360覆蓋基板200,之背側2〇〇b、絕緣層240,及開口 250。 可視需要執行研磨毯覆式第二導電層360之步驟以使其平坦化。 然後’如圖3B所示’移除毯覆式第二導電層360之一部分以形 成第二導電層360’。第二導電層360,包含相互隔離的第一電極 360a及第二電極360b,其中第一電極360a顯示以導電材料將溝 渠230完全填滿。 ❹ 圖4例示將第一實施例之光電二極體結構2〇〇〇切割後所產生 複數個光電二極體元件400之其中之一的俯視圖。沿圖4之j_j, 虛線之剖面即為圖2G所示之結構。如圖所示,第一導電層22〇 為具有圖案的導電層,其係形成如網路般的條狀結構分佈在半導 體磊晶層210的表面’用以傳輸半導體磊晶層21〇所產生的電流。 圖中以虛線所示之圓圈代表第一導電層挪底下之溝渠23〇(即埋 孔)。圖4顯示之複數個溝渠23〇分別位在基板2〇〇,之背侧的中心 點及周圍。圖5例示另-個光電二極體元件,,其第一導電層 520同樣為有圖案的結構。第一導電|㈣包含_第一部分偷曰, 用以傳輸照光所產絲電流;及—第二部分獅,㈣集中第一 部分fOa的電流。圖5之溝渠則系分佈在光電二極體元件㈣ 的角洛’因為無打線之必要,所以第二部分遍所占面積可滅 縮小。應注意本發明之溝_埋孔)之位置可在基板背側之 位置,其可視需要為單一個或複數個。 明之二本ΓΓί佳實施例而已,並非用以限定本發 申明專利關,凡其它未脫離本發明所揭示之精神下所完成 -12- 201005959It should be noted that the photodiode structure or the photodiode element of the present invention may also have a non-conformal structure, as shown in the second embodiment of the present invention as shown in FIG. 3A and FIG. 3B. The polar body structure is 3〇〇〇. In order to make the description simple and understandable, the second embodiment only illustrates differences from the first embodiment. In other words, the second embodiment only shows the steps following Fig. 2E following the first embodiment, i.e., the procedures of Fig. 2F and Fig. 2Q 201005959 are changed to Figs. 3A and 3B. As shown in FIG. 3A, a blanket second conductive layer 360 may be formed to cover the substrate 200, the back side 2b, the insulating layer 240, and the opening 250. The step of grinding the blanket second conductive layer 360 can be performed as needed to planarize it. Then, a portion of the blanket second conductive layer 360 is removed as shown in Fig. 3B to form a second conductive layer 360'. The second conductive layer 360 includes a first electrode 360a and a second electrode 360b that are isolated from each other, wherein the first electrode 360a displays that the trench 230 is completely filled with a conductive material. 4 is a plan view showing one of a plurality of photodiode elements 400 produced by cutting the photodiode structure 2 of the first embodiment. Along the j_j of Fig. 4, the cross section of the broken line is the structure shown in Fig. 2G. As shown, the first conductive layer 22 is a patterned conductive layer which is formed as a network-like strip structure distributed on the surface of the semiconductor epitaxial layer 210 for transporting the semiconductor epitaxial layer 21 Current. The circle indicated by a broken line in the figure represents the trench 23〇 (i.e., buried hole) under the first conductive layer. The plurality of trenches 23 shown in Fig. 4 are respectively located at the center point of the back side of the substrate 2, and around. Fig. 5 illustrates another photodiode element in which the first conductive layer 520 is also patterned. The first conductive | (4) contains _ the first part of the stealing, used to transmit the current produced by the illumination; and - the second part of the lion, (d) concentrates the current of the first part of fOa. The ditches in Fig. 5 are distributed in the corners of the photodiode element (4) because there is no need to wire, so the area occupied by the second part can be reduced. It should be noted that the position of the trench_buried hole of the present invention may be at the back side of the substrate, which may be single or plural as desired. The present invention is not intended to limit the scope of the present invention, and the others are not undone from the spirit of the present invention. -12- 201005959

之等效改魏修飾,均應包含在下狀申請厚度專利範圍内。 f®式簡單說明J 圖1A顯示習知之光電二極體元件之俯視圖; 圖1B例示沿圖1A之Μ’線的剖面圖; 圖2A至2G為本發明第一實施例之光電二極體結構之製作 過程的的剖面圖。 參The equivalent modification of the Wei modification shall be included in the patent scope of the lower application thickness. FIG. 1A is a plan view showing a conventional photodiode element; FIG. 1B is a cross-sectional view taken along line 图' of FIG. 1A; and FIGS. 2A to 2G are photodiode structures according to a first embodiment of the present invention; A cross-sectional view of the manufacturing process. Reference

圖3A至3B為本發明第二實施例之光電二極體結構之製作 過程的剖面圖。 圖4為本發明第一實施例之光電二極體結構切割後產生複數 個光電二極體元件之其中之一的俯視圖。 圖5為本發明另一實施例之光電二極體元件之俯視圖。 【主要元件符號說明】 100 光電二極體元件 110 吸光層 120 N型電極 120a第一部分 120b第二部分 130 P型電極 140 打線結構 200 基板 200’基板 200a前側 200b背側 2010059593A to 3B are cross-sectional views showing a process of fabricating a photodiode structure according to a second embodiment of the present invention. Fig. 4 is a plan view showing one of a plurality of photodiode elements after the photodiode structure is cut in the first embodiment of the present invention. Figure 5 is a plan view of a photodiode element in accordance with another embodiment of the present invention. [Major component symbol description] 100 Photodiode element 110 Light absorbing layer 120 N-type electrode 120a First part 120b Second part 130 P-type electrode 140 Wire structure 200 Substrate 200' Substrate 200a Front side 200b Back side 201005959

210 半導體遙晶層 220 第一導電層 230 溝渠 231 側壁 232 底表面 240 共形絕緣層 240, 絕緣層 250 開口 260 共形第二導電層 260, 第二f電層· 260a 第一電極 260b 第二電極 360 毯覆式第二導電層 360, 第二導電層 360a 第一電極 360b 第二電極 2000 光電二極體結構 3000 光電二極體結構 400 光電二極體元件 500 光電二極體元件 520 第一導電層 520a 第一部分 520b 第二部分 530 溝渠210 semiconductor remote layer 220 first conductive layer 230 trench 231 sidewall 232 bottom surface 240 conformal insulating layer 240, insulating layer 250 opening 260 conformal second conductive layer 260, second f electrical layer · 260a first electrode 260b second Electrode 360 blanket second conductive layer 360, second conductive layer 360a first electrode 360b second electrode 2000 photodiode structure 3000 photodiode structure 400 photodiode element 500 photodiode element 520 first Conductive layer 520a first portion 520b second portion 530 trench

Claims (1)

201005959 十、申請專利範圍: 1. 一種光電二極體結構的製造方法,包含: 提供一基板,該基板定義一前側及一背側; 依序形成一蟲晶層及一第一導電層於該基板之該前側; 蝕刻該基板之該背侧並穿透該磊晶層以形成一溝渠,該溝渠 定義一側壁並露出該第一導電層; 形成一絕緣層覆蓋該侧壁,該絕緣層定義一開口露出該第一 ❿導電層; • 形成一第二導電層於該基板之該背侧,該第二導電層包含相 互隔離的n極及-第三電極,該第―電極覆蓋該絕緣層並 填充該開口以連接該第一導電層。 2·如請求項丨所述之光電二極體結構的製造方法,其中該蝕刻 該基板之該背側的步驟之前與該依序形成該磊晶層及該第二X 層的步驟之後,更包含研磨該基板之該背側。201005959 X. Patent application scope: 1. A method for manufacturing a photodiode structure, comprising: providing a substrate defining a front side and a back side; sequentially forming a worm layer and a first conductive layer Etching the back side of the substrate; etching the back side of the substrate and penetrating the epitaxial layer to form a trench, the trench defining a sidewall and exposing the first conductive layer; forming an insulating layer covering the sidewall, the insulating layer defining An opening exposing the first conductive layer; a second conductive layer on the back side of the substrate, the second conductive layer comprising n-poles and a third electrode isolated from each other, the first electrode covering the insulating layer And filling the opening to connect the first conductive layer. 2. The method of fabricating a photodiode structure according to claim 1, wherein the step of etching the back side of the substrate and the step of sequentially forming the epitaxial layer and the second X layer are further The back side of the substrate is ground. 3. 如請求項1所述之光電二極體結構的製造方法,其 磨该基板之該背側的步驟之後,該基板之厚度變成小於如研 4. 如請求項1所述之光電二極體結構的製造方法, , 該絕緣層覆蓋該側壁的步驟係包含: 、該形成 形成一共形絕緣層覆蓋該第一導電層及該溝渠;及 移除該共形絕緣層之-部分以露出該第-導電層並形成該開 -15- 201005959 5.如請求項1所述之光電二極體結構的製造方法,其中該形成 該第二導電層於該基板之該背側的步驟包含: 〃 形成-共形第二導電層覆蓋該基板之該背側、該絕緣層與該 開口;及 移除該共形第一導電層之一部分以形成相互隔離的該第一電 極及該第二電極,其中該第二電極係直接接觸該基板。 ❹ 6.如請求項1所述之光霄二極體結構的製造方法,其中該第一 電極係藉由該絕緣層與該基板隔離。 ^ 7. 如請求項1所述之光電二極體結構的製造方法,其中該磊晶 層包含複數個ρ-η接面。 8. 如請求項1所述之光電二極體結構的製造方法,其中在該形 成該第二導電層於該基板之該背側的步驟之後,更包含切割該基 ❹ 板以形成複數梱光電二極體元件。 9. 一種光電二極體元件,包含: 一基板,定義一前侧及一背側; 一蠢晶層及一第一導電層依序疊設於該基板之該前侧; 一溝渠穿透該基板及該磊晶層,該溝渠定義一側壁並露出該 第一導電層; 一絕緣層覆蓋該側壁,該絕緣層定義一開口露出該第一導電 層;及 -16- 201005959 第一導電層設置於該基板之該背侧,該第二導電層包含相 互隔離的一第一電極及一第二電極,該第一電極覆蓋該絕緣層並 填充該開口以連接該第一導電層。 10.如請求項9所述之光電二極體元件,其中該基板之厚度係小 於 50/zni。3. The method of fabricating a photodiode structure according to claim 1, after the step of grinding the back side of the substrate, the thickness of the substrate becomes smaller than that of the research 4. The photodiode of claim 1 The method for manufacturing the bulk structure, the step of covering the sidewall by the insulating layer comprises: forming a conformal insulating layer covering the first conductive layer and the trench; and removing a portion of the conformal insulating layer to expose the The method of manufacturing the photodiode structure of claim 1, wherein the step of forming the second conductive layer on the back side of the substrate comprises: Forming a conformal second conductive layer covering the back side of the substrate, the insulating layer and the opening; and removing a portion of the conformal first conductive layer to form the first electrode and the second electrode that are isolated from each other, Wherein the second electrode is in direct contact with the substrate. 6. The method of fabricating a pupil diode structure according to claim 1, wherein the first electrode is isolated from the substrate by the insulating layer. The method of fabricating a photodiode structure according to claim 1, wherein the epitaxial layer comprises a plurality of p-n junctions. 8. The method of fabricating a photodiode structure according to claim 1, wherein after the step of forming the second conductive layer on the back side of the substrate, further comprising cutting the base plate to form a plurality of germanium photoelectrics. Diode component. A photodiode device comprising: a substrate defining a front side and a back side; a doped layer and a first conductive layer are sequentially stacked on the front side of the substrate; a substrate and the epitaxial layer, the trench defining a sidewall and exposing the first conductive layer; an insulating layer covering the sidewall, the insulating layer defining an opening to expose the first conductive layer; and - 16-201005959 first conductive layer setting On the back side of the substrate, the second conductive layer includes a first electrode and a second electrode separated from each other, the first electrode covering the insulating layer and filling the opening to connect the first conductive layer. 10. The photodiode element of claim 9, wherein the substrate has a thickness of less than 50/zni. U.如請求項9所述之光電二極體元件’其中該第二電極係直接接 觸該基板。 如請求項9所述之光電二極體元件,其中該第—電極係藉由 該絕緣層與該基板隔離。 13·如請求項9所述之光電二極體元件’其中該溝渠位在該光電 一極體元件的一角落。 ® Κ·如請求項9所述之光電二極體元件,其中該溝渠位在該光電 一4虽體元件的一中心位置。 -17-U. The photodiode element of claim 9 wherein the second electrode is in direct contact with the substrate. The photodiode element of claim 9, wherein the first electrode is isolated from the substrate by the insulating layer. 13. The photodiode element of claim 9 wherein the trench is at a corner of the photodiode element. The photodiode element of claim 9, wherein the trench is at a central location of the photo-electric component. -17-
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