201004365 九、發明說明： 【發明所屬之技術領域】 本發明係有關於一種同步裝置，更特別是有關於一種 聲音/影像信號之同步裝置。 【先前技術】 在數位廣播應用中，聲音/影像的同步是很重要的。一 傳送端傳送位元資料流至一接收端。此位元資料流包括基 本資料流封包（packetized elementary stream，PES)、傳 輸Μ料流（transport stream，TS)、以及程式資料流（program stream)。傳輸資料流TS内的程式時脈參考（programd〇ck reference，PCR )用來建立接收端的系統時脈（SyStem time clock ’ STC )。基本資料流封包PES所包含的呈現時間標 記（presentation time stamp，PTS)允許接收端識別基本資 料流封包PES的撥放時間。然而，傳送端的系統時脈STC 與接收端的系統時脈STC之間具有些微的差異。尤其是隨 著完成傳送所需的時間增加，系統時脈STC差異也會增 加。因此接收端的輸出緩衝器會操作在溢位（〇verf{〇w) 或緩衝不足（under-run)狀態。 在一般的聲音/影像同步機制中，接收端比本較身的系 統時脈stc以及所接收的呈現時間標記PTS。此比較與結 果差異允許聲音/影像同步機制來判斷撥放時間是否超越 或落後規劃時間。當撥放時_越規劃時間，接收端則停 止撥放聲音/影像。當撥放時間落後規劃時間，在輸出^ 器的-些封包則被吾棄。，然而，由於接收端的停止撥玫以 201004365 及資料封包的丟棄，晝面或聲音中明顯的中斷或斷裂會被 使用者察覺。 因此’期望提出一種聲音/影像信號的同步裝置及方 法’其聲音/影像撥放不會中斷或者資料封包不會被丟棄。 【發明内容】 本發明提供一種同步裝置，其具有系統時脈（system time dock ’ STC)，用以產生具有第一取樣速率之輸出資 料。此同步裝置包括記憶體、分離器、比較器、以及取樣 速率轉換器。分離器接收位元資料流，且自位元資料流擷 取基本資料流封包（packetized elementary stream，PES )。 分離器將基本資料流封包（PES)寫入至記憶體。比較器 自基本資料流封包（PES )獲得呈現時間標記（presentation time stamp，PTS)，且比較呈現時間標記（PTS)與系統 時脈（STC)。取樣速率轉換器具有轉換係數。取樣速率 轉換器對在記憶體之基本資料流封包（PES)進行取樣， 且根據基本資料流封包（PES)產生輸出資料。取樣速率 轉換器根據比較器之比較結果來改變轉換係數。 本發明又提供一種同步方法，適用於具有一系統時脈 (system time clock，STC)之裝置，且此裝置產生輸出資 料。此同步方法包括：接收一位元資料流；自位元資料流 擷取一基本資料流封包（packetized elementary stream， PES);將基本資料流封包（PES)寫入至記憶體；以第一 取樣速率對記憶體内之基本資料流封包（PES)進行取樣； 自基本資料流封包（PES )獲得一呈現時間標記 7 201004365 (presentation time stamp，PTS );比較呈現時間標記（PTS ) 與系統時脈（STC);以及根據比較結果來改變第一取樣 速率之值。 為使本發明之上述目的、特徵和優點能更明顯易懂， 下文特舉一較佳實施例，並配合所附圖式，作詳細說明如 下。 【實施方式】 第1圖係表示根據本發明實施例之同步裝置。參閱第 1圖’同步裝置1包括分離器（demultiplexer) 10、記憶體 11、比較器12、以及取樣率轉換器（sampling rate converter，SRC) 13。分離器10接收來自傳送端（第}圖 中未顯示）位元資料流S10。位元資料流S10包括基本資 料流封包（packetized elementary stream，PES)、傳輸資 料流（transport stream，TS)、以及程式資料流（program stream) 〇傳輸資料流TS内的程式時脈參考（program cl〇ck reference，PCR)用來建立接收端的系統時脈（system time clock ’ STC)。基本資料流封包PES所包含的呈現時間標 記（presentation time stamp，PTS )允許接收端識別基本資 料流封包PES的撥放時間。 分離器10自位元資料流S10擷取基本資料流封包 PES ’且將寫入至記憶體11。比較器12自基本資料流封包 PES獲付壬現時間標§己PTS ’且比較呈現時間標記ρτι§以 及同步裝置1的系統時脈（system time clock，STC )。SRC 13具有轉換係數（converting factor)。SRC 13以取樣速 8 201004365 率Rio對記憶體11内的基本資料流封包PES取樣以產生 取樣資料。SRC 13藉由以取樣速率Rji對該取樣信號進行 取樣來產生輸出資料Sout。SRC 13的轉換係數定義為取樣 速率R10對R11之比例。SRC 13根據比較器12之結果來 改變轉換係數。 接著，將說明同步裝置1之詳細操作。參閱第1圖， SRC 13包括计鼻單元130，其定義一個變化值。透過比較 ^ 呈現時間標記PTS與系統時脈STC，比較器12判斷此兩 者間的差異是否超過一預設範圍。當呈現時間標記pTS與 糸統時脈STC間的差異超過此預設範圍，比較器12輸出 才曰示彳§號S11。假使呈現時間標記PTS與系統時脈stc間 的差異超過預設範圍且呈現時間標記PTS超前系統時脈 STC，SRC 13根據指示信號S11而以上述變化值來減少轉 換係數。換句話说，取樣速率R1 〇的值減少以取樣美本資 料流封包PES。假使呈現時間標記PTS與系統時脈STC間 的差異超過預設範圍且呈現時間標記PTS落後系統時酿 STC，SRC 13根據指示信號Sn而以上述變化值來增加減201004365 IX. Description of the Invention: [Technical Field] The present invention relates to a synchronizing apparatus, and more particularly to a synchronizing apparatus for an audio/video signal. [Prior Art] In digital broadcasting applications, sound/image synchronization is important. A transmitting end transmits the bit stream to a receiving end. The bit stream includes a packetized elementary stream (PES), a transport stream (TS), and a program stream. The program clock reference (PCR) in the transport stream TS is used to establish the system clock of the receiver (SyStem time clock 'STC). The presentation time stamp (PTS) included in the basic data stream packet PES allows the receiving end to identify the playback time of the basic data stream packet PES. However, there is a slight difference between the system clock STC at the transmitting end and the system clock STC at the receiving end. In particular, as the time required to complete the transfer increases, the system clock STC difference increases. Therefore, the output buffer of the receiver will operate in an overflow (〇verf{〇w) or under-run state. In a general sound/image synchronization mechanism, the receiving end is clocked by the system clock stc and the received presentation time stamp PTS. This comparison and result difference allows the sound/image synchronization mechanism to determine if the playback time is beyond or behind the planned time. When the time is set, the receiving time stops the sound/image. When the time of the release is behind the planning time, some of the packets on the output are discarded. However, due to the stop of the receiving end, the 201004365 and the data packet are discarded, and the obvious interruption or break in the face or sound will be perceived by the user. Therefore, it is desirable to propose a synchronizing apparatus and method for sound/video signals whose sound/image playback is not interrupted or data packets are not discarded. SUMMARY OF THE INVENTION The present invention provides a synchronization device having a system time dock (STC) for generating an output data having a first sampling rate. The synchronization device includes a memory, a splitter, a comparator, and a sample rate converter. The splitter receives the bit stream, and extracts a packetized elementary stream (PES) from the bit stream. The splitter writes a basic stream packet (PES) to the memory. The comparator obtains a presentation time stamp (PTS) from the basic data stream packet (PES) and compares the presentation time stamp (PTS) with the system clock (STC). The sample rate converter has a conversion factor. The sample rate converter samples the basic stream packet (PES) in the memory and generates the output data based on the basic stream packet (PES). The sampling rate converter changes the conversion factor based on the comparison result of the comparator. The present invention further provides a synchronization method suitable for a device having a system time clock (STC), and the device generates output data. The synchronization method includes: receiving a bit stream; extracting a packetized elementary stream (PES) from the bit stream; writing a basic stream packet (PES) to the memory; The rate samples the basic data stream packet (PES) in the memory; obtains a presentation time stamp (PTS) from the basic data stream packet (PES); compares the presentation time stamp (PTS) with the system clock. (STC); and changing the value of the first sampling rate based on the comparison result. The above described objects, features, and advantages of the invention will be apparent from the description and appended claims [Embodiment] Fig. 1 is a diagram showing a synchronizing apparatus according to an embodiment of the present invention. Referring to Fig. 1, the synchronizing device 1 includes a demultiplexer 10, a memory 11, a comparator 12, and a sampling rate converter (SRC) 13. The splitter 10 receives the bit stream S10 from the transmitting end (not shown). The bit data stream S10 includes a packetized elementary stream (PES), a transport stream (TS), and a program stream, and a program clock reference in the transport stream TS (program cl 〇ck reference, PCR) is used to establish the system time clock 'STC' at the receiving end. The presentation time stamp (PTS) included in the basic data stream packet PES allows the receiving end to identify the playback time of the basic data stream packet PES. The splitter 10 retrieves the basic stream packet PES' from the bitstream stream S10 and writes it to the memory 11. The comparator 12 receives the current time stamp from the basic data stream packet PES and compares the time stamp ρτι§ with the system time clock (STC) of the synchronization device 1. The SRC 13 has a converting factor. The SRC 13 samples the basic data stream packet PES in the memory 11 at a sampling rate of 8 201004365 rate Rio to generate sampled data. The SRC 13 generates an output data Sout by sampling the sampled signal at a sampling rate Rji. The conversion factor of SRC 13 is defined as the ratio of sampling rate R10 to R11. The SRC 13 changes the conversion factor based on the result of the comparator 12. Next, the detailed operation of the synchronizing device 1 will be explained. Referring to Figure 1, the SRC 13 includes a nose unit 130 that defines a variation value. By comparing the presence time stamp PTS with the system clock STC, the comparator 12 determines whether the difference between the two exceeds a predetermined range. When the difference between the presentation time stamp pTS and the system clock STC exceeds the preset range, the output of the comparator 12 indicates the 彳§ S11. If the difference between the presentation time stamp PTS and the system clock stc exceeds the preset range and the presentation time stamp PTS advances the system clock STC, the SRC 13 reduces the conversion coefficient by the above-described change value in accordance with the indication signal S11. In other words, the value of the sampling rate R1 减少 is reduced to sample the US current stream packet PES. If the difference between the presentation time stamp PTS and the system clock STC exceeds the preset range and the presentation time stamp PTS is behind the system, the SRC 13 increases or decreases according to the indication signal Sn by the above change value.
少轉換係數。換句話說，取樣速率R10的值減少以^樣基 本資料流封包PES。 7 A 第2圖係表示根據本發明實施例之同步方法。參閱第 1及2圖，同步裝置1具有其本身的]系統時脈STc。分離 益10接收位元資料流S10 (步驟S20)，且自位元資料济 S10擷取基本資料流封包PES (步驟S21)。分離哭 且將獲得的基本資料流封包PES寫入至記憶體u (步驟 9 201004365 S22)。SRC 13以取樣速率R10對記憶體11中的基本資料 流封包PES取樣（步驟S23 )，且產生取樣資料（步驟S24 )。 SRC 13藉由以取樣速率R11對取樣信號進行取，且產生具 有取樣速率R11之輸出資料Sout (步驟S25)。比較器^ 自基本資料流封包PES獲得呈現時間標記prps (步驟 S26) ’且判斷此呈現時間標記PTS與系統時脈STC間的 差異是否超過一預設範圍（步驟S27)。當比較器判斷出 呈現時間標記PTS與系統時脈STC間的差異超過預設範圍 (Yes)，比較器12則判斷呈現時間標記PTS是否超前系 統時脈STC (步驟S28)。假使比較器12判斷出呈現時間 標記PTS超前系統時脈STC，SRC 13降低取樣速率 之值（步驟S29)。假使比較器12判斷出呈現時間標記pTs 落後系統時脈STC，SRC 13則增加取樣速率Rl〇的值。 a根據本發明實施例之同步裝置1及方法，當呈現時間 才^ η己PTS與系統時脈STC間的差異超過預設範圍，基本資 料流封包PES之取樣速率R10由SRC 13來改變，使得記 隐，12不會刼作在溢位（〇verfl〇w)或緩衝不足（而和^皿） ，恕。因^此，呈現時間標記PTS與系統時脈STC間的差異 :二直„預設範圍内’其中，此預設範圍係根據系統 而求而②定且不會影響同步。本發明之同步裝置1不會停 撥放耷θ /衫像或者丟棄資料封包，使得在同步程序中聲 曰/影像信號可連續的撥放。 本發月雖以車父佳實施例揭露如上，然其並非用以限定 發月的Ιε«圍，任何所屬技術領域中具有通常知識者，在 10 201004365 不脫離本發明之精神和範圍内，當可做些許的更動與潤 飾，因此本發明之保護範圍當視後附之申請專利範圍所界 定者為準。 11 201004365 【圖式簡單說明】 第1圖表示根據本發明實施例之同步裝置；以及 第2圖表示根據本發明實施例之同步方法。 【主要元件符號說明】 1〜同步裝置； 10〜分離器； 11〜記憶體； 12〜比較器； 13〜取樣速率轉換器（SRC); 130〜計算單元。 . 12Less conversion factor. In other words, the value of the sampling rate R10 is reduced to encapsulate the PES in a basic data stream. 7 A Fig. 2 shows a synchronization method according to an embodiment of the present invention. Referring to Figures 1 and 2, the synchronizing device 1 has its own system clock STc. The separation 10 receives the bit stream S10 (step S20), and extracts the basic stream packet PES from the bit table S10 (step S21). Separate the cry and write the obtained basic stream packet PES to the memory u (step 9 201004365 S22). The SRC 13 samples the basic stream packet PES in the memory 11 at the sampling rate R10 (step S23), and generates sampling data (step S24). The SRC 13 takes the sampled signal at the sampling rate R11 and produces an output data Sout having the sampling rate R11 (step S25). The comparator obtains the presentation time stamp prps (step S26) from the basic data stream packet PES and determines whether the difference between the presentation time stamp PTS and the system clock STC exceeds a predetermined range (step S27). When the comparator judges that the difference between the presentation time stamp PTS and the system clock STC exceeds the preset range (Yes), the comparator 12 judges whether or not the presentation time stamp PTS is ahead of the system clock STC (step S28). If the comparator 12 judges that the presentation time stamp PTS advances the system clock STC, the SRC 13 lowers the value of the sampling rate (step S29). If the comparator 12 determines that the presentation time stamp pTs is behind the system clock STC, the SRC 13 increases the value of the sampling rate R1〇. According to the synchronization apparatus 1 and method of the embodiment of the present invention, when the difference between the presentation time and the system clock STC exceeds the preset range, the sampling rate R10 of the basic data stream packet PES is changed by the SRC 13 so that Remember, 12 will not work in the overflow (〇 verfl〇w) or insufficient buffer (and and ^ dish), forgive. Because of this, the difference between the time stamp PTS and the system clock STC is presented: two straight within the preset range, wherein the preset range is determined according to the system and does not affect the synchronization. The synchronization device of the present invention 1 will not stop dialing θ / shirt image or discard the data packet, so that the sonar / video signal can be continuously played in the synchronization program. Although this month's photo is disclosed in the car master embodiment, it is not used限定 « « , , , , , , , , , , , , , , , , , , , , , , 10 10 10 10 10 10 10 10 10 10 10 10 10 10 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 The definition of the scope of the patent application shall prevail. 11 201004365 [Simplified description of the drawings] Fig. 1 shows a synchronizing apparatus according to an embodiment of the present invention; and Fig. 2 shows a synchronizing method according to an embodiment of the present invention. 】 1~ Sync device; 10~ splitter; 11~ memory; 12~ comparator; 13~ sample rate converter (SRC); 130~ calculation unit.