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TW200746421A - Semiconductor device including a channel with a non-semiconductor monolayer and associated methods - Google Patents

Semiconductor device including a channel with a non-semiconductor monolayer and associated methods

Info

Publication number
TW200746421A
TW200746421A TW095125958A TW95125958A TW200746421A TW 200746421 A TW200746421 A TW 200746421A TW 095125958 A TW095125958 A TW 095125958A TW 95125958 A TW95125958 A TW 95125958A TW 200746421 A TW200746421 A TW 200746421A
Authority
TW
Taiwan
Prior art keywords
channel
semiconductor
gate
monolayer
monolayers
Prior art date
Application number
TW095125958A
Other languages
Chinese (zh)
Inventor
Robert J Mears
Marek Hytha
Scott A Kreps
Original Assignee
Mears R J Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/457,315 external-priority patent/US20070020833A1/en
Priority claimed from US11/457,299 external-priority patent/US20070012910A1/en
Application filed by Mears R J Llc filed Critical Mears R J Llc
Publication of TW200746421A publication Critical patent/TW200746421A/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/81—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation
    • H10D62/815—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW]
    • H10D62/8161—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW] potential variation due to variations in composition or crystallinity, e.g. heterojunction superlattices
    • H10D62/8162—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW] potential variation due to variations in composition or crystallinity, e.g. heterojunction superlattices having quantum effects only in the vertical direction, i.e. layered structures having quantum effects solely resulting from vertical potential variation
    • H10D62/8163—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW] potential variation due to variations in composition or crystallinity, e.g. heterojunction superlattices having quantum effects only in the vertical direction, i.e. layered structures having quantum effects solely resulting from vertical potential variation comprising long-range structurally-disordered materials, e.g. one-dimensional vertical amorphous superlattices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/751—Insulated-gate field-effect transistors [IGFET] having composition variations in the channel regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/81—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation
    • H10D62/815—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW]
    • H10D62/8161—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW] potential variation due to variations in composition or crystallinity, e.g. heterojunction superlattices
    • H10D62/8162—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW] potential variation due to variations in composition or crystallinity, e.g. heterojunction superlattices having quantum effects only in the vertical direction, i.e. layered structures having quantum effects solely resulting from vertical potential variation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

A semiconductor device may include a semiconductor substrate, and at least one metal oxide semiconductor field-effect transistor (MOSFET) thereon. The MOSFET may include spaced-apart source and drain regions, a channel between the source and drain regions, and a gate overlying the channel defining an interface therewith. The gate may include a gate dielectric overlying the channel and a gate electrode overlying the gate dielectric. The channel may include a plurality of stacked base semiconductor monolayers, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor monolayers. The at least one non-semiconductor monolayer may be positioned at depth of about 4-100 monolayers relative to the interface between the channel and the gate dielectric.
TW095125958A 2005-07-15 2006-07-14 Semiconductor device including a channel with a non-semiconductor monolayer and associated methods TW200746421A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US69994905P 2005-07-15 2005-07-15
US11/457,315 US20070020833A1 (en) 2003-06-26 2006-07-13 Method for Making a Semiconductor Device Including a Channel with a Non-Semiconductor Layer Monolayer
US11/457,299 US20070012910A1 (en) 2003-06-26 2006-07-13 Semiconductor Device Including a Channel with a Non-Semiconductor Layer Monolayer

Publications (1)

Publication Number Publication Date
TW200746421A true TW200746421A (en) 2007-12-16

Family

ID=37102478

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095125958A TW200746421A (en) 2005-07-15 2006-07-14 Semiconductor device including a channel with a non-semiconductor monolayer and associated methods

Country Status (6)

Country Link
EP (1) EP1905093A1 (en)
JP (1) JP2009500874A (en)
AU (1) AU2006270126A1 (en)
CA (1) CA2612132A1 (en)
TW (1) TW200746421A (en)
WO (1) WO2007011790A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI760113B (en) * 2020-02-26 2022-04-01 美商安托梅拉公司 Semiconductor device including a superlattice with different non-semiconductor material monolayers and associated methods

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015191561A1 (en) 2014-06-09 2015-12-17 Mears Technologies, Inc. Semiconductor devices with enhanced deterministic doping and related methods
US9722046B2 (en) * 2014-11-25 2017-08-01 Atomera Incorporated Semiconductor device including a superlattice and replacement metal gate structure and related methods
EP3284106B1 (en) 2015-05-15 2021-12-22 Atomera Incorporated Methods of forming semiconductor devices with superlattice layers providing halo implant peak confinement
US9721790B2 (en) 2015-06-02 2017-08-01 Atomera Incorporated Method for making enhanced semiconductor structures in single wafer processing chamber with desired uniformity control
US9558939B1 (en) 2016-01-15 2017-01-31 Atomera Incorporated Methods for making a semiconductor device including atomic layer structures using N2O as an oxygen source
US10410880B2 (en) 2017-05-16 2019-09-10 Atomera Incorporated Semiconductor device including a superlattice as a gettering layer
US11329154B2 (en) * 2019-04-23 2022-05-10 Atomera Incorporated Semiconductor device including a superlattice and an asymmetric channel and related methods

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2709374B2 (en) * 1986-10-08 1998-02-04 株式会社 半導体エネルギー研究所 Insulated gate field effect semiconductor device
US4908678A (en) * 1986-10-08 1990-03-13 Semiconductor Energy Laboratory Co., Ltd. FET with a super lattice channel
US6958486B2 (en) * 2003-06-26 2005-10-25 Rj Mears, Llc Semiconductor device including band-engineered superlattice

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI760113B (en) * 2020-02-26 2022-04-01 美商安托梅拉公司 Semiconductor device including a superlattice with different non-semiconductor material monolayers and associated methods
TWI852012B (en) * 2020-02-26 2024-08-11 美商安托梅拉公司 Semiconductor device including a superlattice with different non-semiconductor material monolayers and associated methods

Also Published As

Publication number Publication date
CA2612132A1 (en) 2007-01-25
JP2009500874A (en) 2009-01-08
AU2006270126A1 (en) 2007-01-25
EP1905093A1 (en) 2008-04-02
WO2007011790A1 (en) 2007-01-25

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