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TW200721463A - Memory device with improved performance and method of manufacturing such a memory device - Google Patents

Memory device with improved performance and method of manufacturing such a memory device

Info

Publication number
TW200721463A
TW200721463A TW095134841A TW95134841A TW200721463A TW 200721463 A TW200721463 A TW 200721463A TW 095134841 A TW095134841 A TW 095134841A TW 95134841 A TW95134841 A TW 95134841A TW 200721463 A TW200721463 A TW 200721463A
Authority
TW
Taiwan
Prior art keywords
layer
charge
memory device
current
insulating layer
Prior art date
Application number
TW095134841A
Other languages
English (en)
Inventor
Schaijk Robertus Theodorus Fransiscus Van
Tello Pablo Garcia
Michiel Slotboom
Original Assignee
Koninkl Philips Electronics Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv filed Critical Koninkl Philips Electronics Nv
Publication of TW200721463A publication Critical patent/TW200721463A/zh

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/751Insulated-gate field-effect transistors [IGFET] having composition variations in the channel regions
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/14Circuits for erasing electrically, e.g. erase voltage switching circuits
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0413Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having charge-trapping gate insulators, e.g. MNOS transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/69IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/791Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/792Arrangements for exerting mechanical stress on the crystal lattice of the channel regions comprising applied insulating layers, e.g. stress liners
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/791Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/797Arrangements for exerting mechanical stress on the crystal lattice of the channel regions being in source or drain regions, e.g. SiGe source or drain

Landscapes

  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
TW095134841A 2005-09-23 2006-09-20 Memory device with improved performance and method of manufacturing such a memory device TW200721463A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP05108804 2005-09-23

Publications (1)

Publication Number Publication Date
TW200721463A true TW200721463A (en) 2007-06-01

Family

ID=37889200

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095134841A TW200721463A (en) 2005-09-23 2006-09-20 Memory device with improved performance and method of manufacturing such a memory device

Country Status (6)

Country Link
US (1) US20090179254A1 (zh)
EP (1) EP1938359A2 (zh)
JP (1) JP2009514194A (zh)
CN (1) CN101563783A (zh)
TW (1) TW200721463A (zh)
WO (1) WO2007034376A2 (zh)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008102451A1 (ja) * 2007-02-22 2008-08-28 Fujitsu Microelectronics Limited 半導体装置及びその製造方法
US9299568B2 (en) 2007-05-25 2016-03-29 Cypress Semiconductor Corporation SONOS ONO stack scaling
US8614124B2 (en) 2007-05-25 2013-12-24 Cypress Semiconductor Corporation SONOS ONO stack scaling
US9431549B2 (en) 2007-12-12 2016-08-30 Cypress Semiconductor Corporation Nonvolatile charge trap memory device having a high dielectric constant blocking region
US9102522B2 (en) 2009-04-24 2015-08-11 Cypress Semiconductor Corporation Method of ONO integration into logic CMOS flow
US8071453B1 (en) 2009-04-24 2011-12-06 Cypress Semiconductor Corporation Method of ONO integration into MOS flow
CN102543887A (zh) * 2012-02-28 2012-07-04 上海华力微电子有限公司 一种通过改变沟道应力提高sonos器件工作速度的方法
KR102146640B1 (ko) * 2012-07-01 2020-08-21 롱지튜드 플래쉬 메모리 솔루션즈 리미티드 비휘발성 전하 트랩 메모리 디바이스를 제조하기 위한 라디칼 산화 프로세스
US8796098B1 (en) * 2013-02-26 2014-08-05 Cypress Semiconductor Corporation Embedded SONOS based memory cells
US9245742B2 (en) 2013-12-18 2016-01-26 Asm Ip Holding B.V. Sulfur-containing thin films
US9711350B2 (en) * 2015-06-03 2017-07-18 Asm Ip Holding B.V. Methods for semiconductor passivation by nitridation
US9711396B2 (en) 2015-06-16 2017-07-18 Asm Ip Holding B.V. Method for forming metal chalcogenide thin films on a semiconductor device
US9741815B2 (en) 2015-06-16 2017-08-22 Asm Ip Holding B.V. Metal selenide and metal telluride thin films for semiconductor device applications
CN113871527A (zh) * 2021-09-27 2021-12-31 北京大学 一种叠层电荷俘获型突触晶体管及其制备方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4001851B2 (ja) * 2002-08-23 2007-10-31 松下電器産業株式会社 不揮発性メモリ
US6797567B2 (en) * 2002-12-24 2004-09-28 Macronix International Co., Ltd. High-K tunneling dielectric for read only memory device and fabrication method thereof
JP4489359B2 (ja) * 2003-01-31 2010-06-23 株式会社ルネサステクノロジ 不揮発性半導体記憶装置
US6713810B1 (en) * 2003-02-10 2004-03-30 Micron Technology, Inc. Non-volatile devices, and electronic systems comprising non-volatile devices
US7297634B2 (en) * 2003-06-06 2007-11-20 Marvell World Trade Ltd. Method and apparatus for semiconductor device and semiconductor memory device
KR20040107967A (ko) * 2003-06-16 2004-12-23 삼성전자주식회사 Sonos메모리 소자 및 그 정보 소거방법
US6891192B2 (en) * 2003-08-04 2005-05-10 International Business Machines Corporation Structure and method of making strained semiconductor CMOS transistors having lattice-mismatched semiconductor regions underlying source and drain regions
US20050167730A1 (en) * 2004-02-03 2005-08-04 Chien-Hsing Lee Cell structure of nonvolatile memory device
US7179745B1 (en) * 2004-06-04 2007-02-20 Advanced Micro Devices, Inc. Method for offsetting a silicide process from a gate electrode of a semiconductor device
US7321145B2 (en) * 2005-10-13 2008-01-22 Macronix International Co., Ltd. Method and apparatus for operating nonvolatile memory cells with modified band structure

Also Published As

Publication number Publication date
WO2007034376A2 (en) 2007-03-29
WO2007034376A3 (en) 2008-11-20
JP2009514194A (ja) 2009-04-02
CN101563783A (zh) 2009-10-21
EP1938359A2 (en) 2008-07-02
US20090179254A1 (en) 2009-07-16

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