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TW200627543A - Plasma etching method - Google Patents

Plasma etching method

Info

Publication number
TW200627543A
TW200627543A TW094143030A TW94143030A TW200627543A TW 200627543 A TW200627543 A TW 200627543A TW 094143030 A TW094143030 A TW 094143030A TW 94143030 A TW94143030 A TW 94143030A TW 200627543 A TW200627543 A TW 200627543A
Authority
TW
Taiwan
Prior art keywords
layer
plasma
plasma processing
etching
plasma etching
Prior art date
Application number
TW094143030A
Other languages
Chinese (zh)
Other versions
TWI420588B (en
Inventor
Shinya Morikita
Masaharu Sugiyama
Atsushi Kawabata
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Publication of TW200627543A publication Critical patent/TW200627543A/en
Application granted granted Critical
Publication of TWI420588B publication Critical patent/TWI420588B/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02057—Cleaning during device manufacture
    • H01L21/02068—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
    • H01L21/02071—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers the processing being a delineation, e.g. RIE, of conductive layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

In a vacuum processing chamber, an etching is performed on an object to be processed having at least a mask layer formed in a predetermined pattern and a Ti layer, as a layer to be etched, formed under the mask layer. During the etching, a first plasma processing is carried out to etch the Ti layer by using a plasma of an etching gas containing a fluorine compound at an inner pressure of the chamber of 4 Pa or less. Subsequently, a second plasma processing for dry cleaning is performed by using a plasma of a cleaning gas after the first plasma processing is completed. At this time, a deposit containing a Ti compound produced during the plasma processing is removed.
TW094143030A 2004-12-07 2005-12-06 Plasma etching method TWI420588B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004353976A JP2006165246A (en) 2004-12-07 2004-12-07 Plasma etching method

Publications (2)

Publication Number Publication Date
TW200627543A true TW200627543A (en) 2006-08-01
TWI420588B TWI420588B (en) 2013-12-21

Family

ID=36666919

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094143030A TWI420588B (en) 2004-12-07 2005-12-06 Plasma etching method

Country Status (4)

Country Link
JP (1) JP2006165246A (en)
KR (1) KR100798160B1 (en)
CN (1) CN100413035C (en)
TW (1) TWI420588B (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101211753B (en) * 2006-12-29 2011-03-16 联华电子股份有限公司 semiconductor process
KR101139189B1 (en) * 2007-03-29 2012-04-26 도쿄엘렉트론가부시키가이샤 Plasma etching method, plasma processing apparatus, control program and computer redable storage medium
KR20120014699A (en) * 2010-08-10 2012-02-20 주식회사 하이닉스반도체 Manufacturing Method of Semiconductor Device
CN102820224A (en) * 2011-06-09 2012-12-12 上海中科高等研究院 Interface layer treatment method for TFT (thin film transistor) dry etching process
JP5982223B2 (en) * 2012-08-27 2016-08-31 東京エレクトロン株式会社 Plasma processing method and plasma processing apparatus
JP6422262B2 (en) 2013-10-24 2018-11-14 東京エレクトロン株式会社 Plasma processing method and plasma processing apparatus
JP6504827B2 (en) * 2015-01-16 2019-04-24 東京エレクトロン株式会社 Etching method
JP2016157793A (en) * 2015-02-24 2016-09-01 東京エレクトロン株式会社 Etching method

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1994000251A1 (en) * 1992-06-22 1994-01-06 Lam Research Corporation A plasma cleaning method for removing residues in a plasma treatment chamber
JPH08319586A (en) * 1995-05-24 1996-12-03 Nec Yamagata Ltd Method for cleaning vacuum treating device
JP3476638B2 (en) * 1996-12-20 2003-12-10 東京エレクトロン株式会社 CVD film forming method
WO1998042012A1 (en) * 1997-03-17 1998-09-24 Matsushita Electric Industrial Co., Ltd. Method and device for plasma treatment
JP3626833B2 (en) * 1997-05-22 2005-03-09 東京エレクトロン株式会社 Film forming apparatus and film forming method
JPH11140675A (en) * 1997-11-14 1999-05-25 Sony Corp How to clean the vacuum chamber
US6635185B2 (en) * 1997-12-31 2003-10-21 Alliedsignal Inc. Method of etching and cleaning using fluorinated carbonyl compounds
KR100281129B1 (en) * 1998-12-17 2001-03-02 김영환 Wiring formation method
US6703265B2 (en) * 2000-08-02 2004-03-09 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of manufacturing the same
JP4815724B2 (en) * 2000-09-08 2011-11-16 東京エレクトロン株式会社 Shower head structure and film forming apparatus
JP4717295B2 (en) * 2000-10-04 2011-07-06 株式会社半導体エネルギー研究所 Dry etching apparatus and etching method
KR100378064B1 (en) * 2000-12-27 2003-03-29 동부전자 주식회사 Method for providing a metal layer in a semiconductor device
JP2004200378A (en) * 2002-12-18 2004-07-15 Semiconductor Energy Lab Co Ltd Method for manufacturing semiconductor device

Also Published As

Publication number Publication date
JP2006165246A (en) 2006-06-22
TWI420588B (en) 2013-12-21
CN1787183A (en) 2006-06-14
CN100413035C (en) 2008-08-20
KR100798160B1 (en) 2008-01-28
KR20060063736A (en) 2006-06-12

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees