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TW200603529A - Image processor - Google Patents

Image processor

Info

Publication number
TW200603529A
TW200603529A TW094112144A TW94112144A TW200603529A TW 200603529 A TW200603529 A TW 200603529A TW 094112144 A TW094112144 A TW 094112144A TW 94112144 A TW94112144 A TW 94112144A TW 200603529 A TW200603529 A TW 200603529A
Authority
TW
Taiwan
Prior art keywords
data
image
cpu
bus
transmitting
Prior art date
Application number
TW094112144A
Other languages
Chinese (zh)
Inventor
Yo Sawamura
Tetsuya Takemura
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Publication of TW200603529A publication Critical patent/TW200603529A/en

Links

Landscapes

  • Digital Computer Display Output (AREA)
  • Compression Of Band Width Or Redundancy In Fax (AREA)
  • Image Processing (AREA)
  • Controls And Circuits For Display Device (AREA)

Abstract

The present invention provides an image processor that increases a speed of entire image processing by efficiently operating a CPU. In the image processor (1), a high-speed bus (10) and a peripheral bus (12) are connected via a bus bridge (11). The CPU (13) for performing calculation and control of image processing, a data transmitting/receiving FIFO memory (18) for transmitting and receiving image compression data to and from a host device (4), a frame memory (16) for storing image decompression data from an electronic camera (2), etc. and displaying the data on a display panel (3), and a compression/decompression circuit (17) for compressing the image decompression data and decompressing the image compression data are connected to the both buses (10, 12). The CPU (13) and the frame memory (16) are connected to the high-speed bus (10), and the data transmitting/receiving FIFO memory (18) is connected to the peripheral bus (12).
TW094112144A 2004-04-16 2005-04-15 Image processor TW200603529A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004122251 2004-04-16

Publications (1)

Publication Number Publication Date
TW200603529A true TW200603529A (en) 2006-01-16

Family

ID=37959856

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094112144A TW200603529A (en) 2004-04-16 2005-04-15 Image processor

Country Status (2)

Country Link
CN (1) CN100517459C (en)
TW (1) TW200603529A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8405668B2 (en) * 2010-11-19 2013-03-26 Apple Inc. Streaming translation in display pipe

Also Published As

Publication number Publication date
CN1942926A (en) 2007-04-04
CN100517459C (en) 2009-07-22

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