SU987766A2 - Three-phase inverter - Google Patents

Description

(54) THREE-PHASE INVERTER

one

The invention relates to a converter technique which can be used in the development of secondary power sources.

According to the main author. Ev, no. 8О12О7, there is a three-phase inverter containing a three-phase bridge of six controlled keys, connected to the input terminals, a push-pull converter cell, the first output of which is connected between the midpoint of the power supply and the zero point of the three-phase; loads, and the second via three AC keys is parallel to the load, a control circuit containing a generator, a two-phase converter, a ring scaling circuit, a pulse shaping unit made on four transformers, two transformers per phase, the output windings of which are connected to the control inputs of the four keys of the two phases of the three phase bridge; the first auxiliary {output windings of each phase are connected in series and connected to the control inputs of the AC switches; s phase and the second auxiliary output windings connected in series so that its output signals form the control kntsie third phase March 11 keys.

The disadvantage of such a device is that, in the form of a control signal, phase keys, with increasing

10 duration of fronts, there are short pulses in those moments when the keys must be closed.

The goal of isophene is to increase the reliability of the inverter operation by eliminating the appearance of false impulses. key management of the third phase.

The goal is achieved by the fact that the inverting control transition of each key of one of the phases is connected

Claims (1)

20 to additional, successively connected secondary windings of the transformers of the kmpuyas forming unit through a collector-emitter junction of an inserted transistor, shunted by a counter-diode, and the base-emitter junction of this transistor is coupled with a compensator, and its base through a resistor is connected to the middle output of the corresponding series-compensated transistor. windings. FIG. i presents the inverter circuit; ca fig. 2 diagrams of his work. The three-phase inverter soderzyugt isTOChSh1KI pitashsh 1 and 2 from the midpoint, three-phase bridge actuated 1shyuchey 3 - 8, two-volume: stnuyu preobrazovatel- Hjno 5gcheyku 9 Ikumi outputs 10N and one RS to toryh V1shyuchen -9lsdu midpoint tgatashga sources 1 and 2: and . zero-sense three-phase load 1Sh 12, KEY; 13-15 alternating current, 4ejLnn, i.e., some outputs to three-phase load, and others to output 10 of convertible cell 9, master oscillator 16, two-phase converters 17 and 18, controlled by master oscillator 16 (one of the converters controls the keys of the dual circuit ), KoiibTieByio scaling circuit 19, controlled by two-phase converters 17 and 18, an impulse shaping unit 71, executed on four transformers 20. -23, one whose strokes are connected to the control inputs of keys 3 - 6 and 13 and 14, transistors 24, diodes 25, shun converters 24 transistors 24, capacitors 2.6, connected in parallel to the base-emitter transitions of transistors 24, resistors 27, In the interconnecting base of transistors 24 and midpoint in series of secondary auxiliary windings of formers 20 - 23 connected to control inputs of keys 7, 8 and 1 of the third phase through the transistors 24. The device operates as follows. For the formation of the step voltage of the three phases, control signals and are required. For the 3-8 and 13-o15 yyuchych (flash 1), the shape of which is shown in FIG. 2 AK For the formation of all nine pulses, it is necessary to have four transformers with a voltage form, which is shown in FIG. 25, in the direction of the impulse control (Fig. 2a), is formed, by means of voltage stressing (Fig. 25, a) and sends to keys 12 (phase L). A control pulse is analogously generated (fkg. 2ij (35) H3 voltage, shown in Fig. 2E, e (e, u). To obtain a control pulse of the third phase (Fig. 23 or Fig. 2k), add up the two voltages (Fig. 2b, ei of Fig. 2 & E). However, with this formation (for example, Fig. 2c, e), there is a short pulse in the form at time b, which can open key 7 at the moment when it must be closed. The appearance of a short pulse is caused by a finite edge of pulses (Fig. 2B, e). To eliminate this unwanted pulse, a circuit consisting of from transistor 24, diode 25, capacitor 26 and resistor 27. In this case, the winding terminal with voltage (Fig. 2e) is connected via a resistor to the base-emitter junction of the transistor 24, shunted by a capacitor 26. Forma voltage on the capacitor 26 is shown in Fig. 2e (dotted line) .On the interval O - tnTpaH3HCTop 24 is closed by the voltage of the capacitor 26, and the short pulse at time -fc does not pass through the transistor 24; Key 7 will not open. Until the moment (fig. 2 h), the capacitor recharges, sends out 1oot transistor 24, and thereby prepares the path for the control pulse passing at the moment -fej. Similarly to the disassembled, the processes take place during the formation of control pulses of 1 stub 8 and 15 of the third phase. Diode 25 is slugged for locking 1-stitch over the control input of another half-wave control direction, if the keys are executed on transistors. TaioiM, the introduction of additional elements 24 - 27 allows you to eliminate spurious signals in the third-phase key control pulses and thereby increase the reliability of the proposed inverter. The invention is a three-phase inverter according to the author. St. No. 801207, about the fact that, in order to increase reliability by eliminating spurious control pulses, the control transition of each key of one of the phases is connected to additional serially connected secondary windings of transformers of the pulse shaping unit through the collector -emitter junction of an inserted transistor torched by a counter diode, with the base-emitter junction of this transistor it is shunted by a capacitor, and its base is connected through a resistor to the middle terminal of the Soogwegsg & Sources of information taken into account during the examination 1. USSR Copyright Certificate № 801207, cl. H 02 M 7/515, 1979. pg ff1 // J o-ti --L // P PG 0g / g /