SU1721765A1 - Two-stage inverter - Google Patents

Abstract

The invention relates to electrical engineering and can be used in secondary power supply and automation systems. The goal is to increase the efficiency and reliability of the inverter by protecting against overloads of the base circuits of power transistors at high input voltages. The push-pull inverter contains a push-pull transformer power amplifier with a midpoint. To the extreme terminals of the switching transformer 8 through the diodes 15 and 16 and the first resistors 13 and 14, respectively, are connected drains and gates of additional field-effect transistors 9 and 10 of the protection circuit against through-currents. The transistors 9 and 10 of the protection circuit against through-currents block the unlocking of one power transistor 1 (2) for the time of locking the other. T il.

Description

The invention relates to electrical engineering and can be used in secondary power supply systems and automation.

Known transistor inverters containing a master oscillator and power amplifier, made by a push-pull circuit on transistors.

The disadvantage of these inverters is the delay in locking transistors, due to the finite time of resorption of minority carriers in the base areas, which is why during the transient switching process of transistors a short circuit mode develops, leading to increased dynamic power losses.

Of the known technical solutions, the closest in technical essence to the proposed one is a voltage converter, which contains two power transistors, the collectors of which are connected to the ends of the primary winding of the output transformer, made with a midpoint, emitters to the first input terminal and to the middle point of the winding of the control transformer, the extreme terminals of which are connected through base resistors, shunted by reverse diodes, to the bases of power transistors connected to the first power terminals spomogatelnyh transistors opposing shoulders, while the control outputs - to the middle point of the resistive voltage dividers, the end terminals of which are connected to the first input terminal and to the collectors of transistors of opposite shoulders respectively. In this converter, dynamic power losses are reduced due to the active locking of one transistor while blocking the unlocking of another transistor.

However, when using higher input voltages, losses on resistors in the base circuits of auxiliary transistors of a bipolar structure reach a significant value and cannot be reduced due to the need to provide basic currents of auxiliary transistors, which reduces the efficiency of the converter. In addition, with increased input voltages of the primary source, the overestimated base currents of blocking the power transistors contribute to the emergence of local hot spots in the base region of the lockable transistor and the development of secondary breakdown, which reduces the reliability of the converter.

The purpose of the invention is to increase efficiency and reliability by protecting against overload in areas of high input voltage.

This goal is achieved by the fact that in a push-pull inverter containing power transistors, the collectors of which are connected to the ends of the primary winding of the output transformer, emitters to the first input terminal and to the middle point of the winding of the control transformer, the extreme terminals of which are connected to the bases of the power transistors connected to the first to the power terminals of the auxiliary transistors of the opposite arms, the second power terminals of which through diodes are connected to the extreme terminals of the control transformer winding, and The main leads are connected to the midpoints of the resistive voltage dividers, with the second input terminal connected to the midpoint of the primary winding of the output transformer, the auxiliary transistors are made in the form of field ones, and the extreme leads of the resistive voltage dividers are connected respectively to the collectors of power transistors and to the extreme leads of the control transformer winding and the same arms, and the directions of conductivity of the diodes and auxiliary transistors coincide.

The resistors in the gate circuits of field effect transistors used as auxiliary ones have a significant resistance value, and the ratio of these resistors is chosen so that the voltage across the drain and gate of these transistors is in phase at the initial moment of the transient process of locking the power transistor. Due to the choice of resistors in the gate circuits of field effect transistors of field auxiliary transistors of a significant resistance value, as well as the choice of their ratio, which ensures that the voltages at the drain and gate of these transistors are in phase, the power losses at these resistors are reduced and the degree of blocking of unlocking of one power transistor for the duration of locking of the other increases , which increases the efficiency of the inverter.

In the known inverter, the resistors in the base circuits of auxiliary transistors cannot be selected large in magnitude of resistance because of the need to ensure the base currents of these transistors (bipolar structure), therefore, the power losses at these resistors significantly exceed the losses in the proposed inverter, which reduces the efficiency devices compared to the proposed.

A positive effect is achieved by reducing power losses on the protection elements from through currents, which increases the efficiency, and eliminates overloads in circuits without power transistors during their shutdown, which increases reliability when inverting high input voltages. In the known device, with increased input voltages, losses on the protection circuits from through currents reach significant values, and secondary breakdown of the base areas can occur due to their overload with forced blocking currents and increased conversion frequencies.

The drawing shows a diagram of a two-cycle inverter.

The push-pull inverter consists of power transistors 1 and 2, the emitters of which are combined and connected to the first input terminal, the collectors are connected to the extreme terminals of the primary winding 3 of the output transformer 4, the middle terminal of which is connected to the second input terminal, the bases are connected through the resistors 5 and 6 to the extreme the windings of the control transformer 8 and to the sources of the auxiliary transistors 9 and 10 of the opposite arms, the gates of which are connected through the resistors 11 and 12 to the collectors of power transistors 1 and 2 and through the rubber tori 13 and 14 - to the respective ends of the winding 7 of the transformer 8, which through the diodes 15 and 16 are connected to the drains of the transistors 9 and 10. To the secondary winding 17 of the output transformer 4 connected to the load 18.

Push-pull inverter operates as follows.

The pulses from the winding 7 of the transformer come through resistors 5 and 6 to the base of the power transistors 1 and 2, alternately opening one of them, while closing the other. Due to the inertia of transistors 1 and 2, these transistors do not close instantly, but after a time determined by the resorption time of minority carriers. Therefore, to prevent the simultaneous transmission of currents by both transistors: additional transistors 9 and 10 serve as a transistor to which a voltage of unlocking polarity is applied, and a transistor that has not managed to close due to its inertia (so-called through currents).

Let the polarity on the winding 7 of the transformer 8 be such that the transistor 1 is open and the transistor 2 is closed. The diode 15 is in this non-conductive state, therefore, the additional transistor does not have an effect. The transistor 10 is closed through a divider on resistors 12 and 14 with a positive voltage at its gate, exceeding the voltage at its drain by an amount exceeding the cutoff voltage. When the polarity changes on the winding 7 of the transformer 8, a negative voltage is applied to the resistor 5 relative to the emitters of the transistors 1 and 2, and to the resistor 6 it is positive. Due to the finite absorption time of minority carriers, transistor 1 remains open for some time, while the transistor closes this transistor, the voltage on its collector remains small, as a result of which transistor 9 is in the open state and the negative voltage from winding 7 of transformer 8 is applied through a conductive diode 15, power the electrodes of the transistor 9 to the base of the transistor 2. Therefore, during the transition process of closing the transistor 1, the base of the transistor 2 is blocked and it It will melt in the closed state. The transistor 10 does not affect due to the non-conductive state of the diode 16. As the transistor 1 closes, the voltage across its collector, applied through the resistor 11 to the gate of the transistor 9, increases and when its value reaches the cut-off voltage, the specified transistor closes. In this case, the base of the transistor 2 is removed, which opens through the resistor 6. In the next half-cycle, the processes proceed similarly. The number of turns of the transformer winding 7, which determines the voltage on it, as well as the resistance value of resistors 5 and 6, are selected for reasons of saturation of the transistors 2 and 1 when they open, effectively blocking the bases of these transistors through dividers formed by the internal resistances of open transistors 9 and 10 and resistors 5 and 6, as well as permissible reverse voltages of the emitter junctions of transistors 1 and 2:

GR 15 + G siotke GR16 ~ L G siotkyu.

Re Rs ^{_ 1} 'where GR15, row - resistance of the diodes 15 and 16 in the conductive state;

1721765.

Gsiotke. ГсiotкЮ - drain-source resistance of open transistors 9 and 10;

Rs. R6 ~ resistance of resistors 5 and

6.

When this ratio is fulfilled on the bases of blocked transistors, the voltage on the basis of the unlockable transistor will be early zero or less than zero (negative) relative to the emitter during the transient process of closing the lockable transistor. The internal drain-source resistances of Gsiotke, GsiotkU and the input gate-source capacitance of transistors 9 and 10, connected according to the source followers circuit, have a minimum value when choosing the ratio of the resistances of the resistors 13 and 11, 14 and 12, forming voltage dividers:

R11 ”R13 and Rl2” Rl4, rfleRii, Ri2, Ri3H Rm-resistance of resistors 11-14.

With the indicated choice of the ratio of resistors, the growing voltage at the gate of transistor 9 (10) practically does not differ from the voltage at its drain at the initial moment of the transient process of locking one power transistor 1 (2), which ensures the in-phase change in voltage at the drain and gate of transistor 9 ( 10). When the common-mode voltage changes at the gate and drain of the source follower transistor, its input capacitance decreases and the output resistance decreases, which ensures inertialess transmission of the negative (relative to the emitter) voltage of the transformer 8 winding 7 through a conducting diode 15 (16) and a small internal drain-source resistance of the Zcuotk transistor 9 (10) to the base of transistor 2 (1), i.e. effective blocking of the unlocking of the transistor 2 (1) for the period of locking the transistor 1 (2), which reduces the dynamic losses of the inverter. The blocking of the bases of transistors 1 or 2 is removed when the voltage at the collectors of the lockable transistors reaches a significant value due to the threshold characteristic of transistors 9 and 10, which close at voltages exceeding the voltage of their cutoff. To expand the functionality of the proposed technical solution in the direction of high power, the quality of transistors 1 and 2 should be used transistors with a large current gain or composite transistors. In this case, the ratio of resistors 5 and 6 and internal resistances of open transistors 9 and 10 is easily ensured.

Thus, the proposed technical solution allows for effective blocking (protection) from overloads in the basic areas of power transistors with increased input voltages, as well as minimal losses on the protection elements, which increases the efficiency and reliability of the inverter.

Claims (1)

Claim A push-pull inverter containing two power transistors, the collectors of which are connected to the ends of the primary winding of the output transformer, emitters to the first input terminal and to the midpoint of the winding of the control transformer, the extreme terminals of which are connected through the base resistors to the bases of the power transistors connected to the first power terminals of the auxiliary transistors of opposite arms, the second power terminals of which are connected through diodes to the extreme terminals of the winding of the control transformer, and the control leads dy - to the midpoints of resistive voltage dividers, and the second input terminal is connected to the midpoint of the primary winding of the output transformer, characterized in that, in order to increase efficiency and reliability by protecting against overloads in the field of high input voltages, auxiliary transistors are made in the form of field, and the extreme terminals of the resistive voltage dividers are connected respectively to the collectors of power transistors and to the extreme terminals of the control transformer winding of the same arms, and the directions the conductivity of the diodes and auxiliary transistors are the same.