SU1626403A1 - Device for detecting validity loss during digital data transmission via communication lines - Google Patents

Abstract

The invention relates to telecommunications. The purpose of the invention is to determine the loss of confidence in the transmission of the alarm indication signal (SPAS). The device contains an inverter 1, a divider 2 frequencies into two, a divider 3 frequencies into three, drivers 4.1 and 4.2 pulses, SIAC detector 5, communication break detector b and switch 7, with detector 5 including the first and second one-oscillators with timing circuits from capacitors and resistors, detector 6 includes a one-shot with a capacitor and a resistor, and switch 7 includes an inverter and switch switch. SIAC, which is a sequence of logical units, is converted in inverter 1 to a sequence of logical zeros, from which driver 4.1, divider 3, and detector 5 extract error pulses of the form of a logical unit, arriving at the output of switch 7. Divider 2, driver 4.2, and detector 6 form a meander that arrives at the output of the switch 7 when the connection is interrupted. 5 Il. Yo

Description

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The invention relates to telecommunications and can be used in devices for monitoring and measuring the quality of transmission of digital information.

The purpose of the invention is to improve the accuracy of determining the loss of confidence in the transmission of the alarm indication signal (SIAS).

FIG. 1 shows the structural electrical circuit of the proposed device; in fig. 2 - structural electrical circuit of the SIAS detector; in fig. 3 is a structural electrical circuit for detecting communication interruptions; in fig. 4 - structural electrical circuit of the switch; in fig. 5 - time diagrams of signals at characteristic points of the device.

A device for determining the loss of confidence in the transmission of digital information over a communication line contains (FIG. 1) inverter 1, divider 2 frequencies into two, divider 3 frequencies into three, first 4.1 and second 4.2 pulse drivers, SIAS detector 5, 6 breaks detector and a switch 7, with the SIAS detector 5 (Fig. 2) containing the first 8.1 and second 8.2 one-shot with time-dependent circuits consisting of capacitors 9.1, 9.2 and resistors 10.1, 10.2, respectively. The interruption detector 6 (Fig. 3) contains a one-shot 11c time with a driver circuit consisting of a capacitor 12 and a resistor 13, and the switch 7 (Fig. 4) contains an inverter 14 and a switch 15.

The device works as follows.

The work is characterized by three situations (cases), which are determined by the presence or absence of an information signal at the input or the presence of SIAS.

Case 1 - Informational signal. At the input, the device receives an information signal (Fig. 5a). From the input of the device, the signal is fed to the inputs of the inverter 1 and the second driver 4.2 pulses. The output of the inverter 1 signal (Fig. 5D) is fed to the input of the first driver 4.1 pulses. The clock inputs of the clock inputs of the formers 4.1 and 4.2 pulses are received (Fig. 56).

With the coincidence of the clock pulse with potential Log. G at the inputs of one of the formers of 4.1 or 4.2 pulses, a negative pulse is formed at its output, which is equal in duration to the duration of the clock pulse. Consequently, at the output of the second pulse driver 4.2, pulses (Fig. 5c) are formed in those time intervals in which pulses arrive at the device, and at the output of the first generator 4.1, in the pauses between pulses (Fig. 5e). From the output of the first driver 4.1, the pulses arrive at the inputs of the divider 3 frequencies to three and the SIAC detector 5, which generates a control signal (Fig. 5h), prohibiting the operation of the divider 3 frequencies to three.

From the output of the second imaging device 4.2, the pulses arrive at the input of the detector 6 communication interruptions, which forms (Fig. 5d) a control signal (Log. 1). When this signal at the inputs of the inverter 14 1 and the switch 15, the switch 7 passes to the output signals from the first input. At the first input there is a constant potential, and therefore, at the output of the switch 7, there is also a constant potential. This indicates the absence of errors, i.e. The device does not extract errors from the information signal.

The frequency divider 2 by two works (Fig. 5k) continuously in all three cases,

Case 2 - Break. At the input of the device there is a potential Log. 0, at the output of the second driver 4.2, no pulses are formed (potential Log. 1). At the output of the detector 6 interruptions in communication, a potential Log is formed. O, with which switch 7 switches and passes the signal from the second input, i.e. the signal coming from the divider 2 frequency into two. At the same time, at the output of the switch 7 there is a signal of the square wave type with a frequency two times lower than the clock one (Fig. 5L), which carries information about the error probability equal to 0.5.

The first driver 4.1 pulses, the detector 5 SIAS and divider 3 frequency for three work the same as in case 1.

Case 3, - SIAS. For this case, there are two modes of operation: mode a - there are no errors in SIAC, mode b - there are errors in SIAS,

Mode a. At the input of the device there is a potential Log, 1, and at the output of the inverter 1 there is a Log. A. At the same time, pulses are generated at the output of the second driver of 4.2 pulses, and at the output of the first driver of 4.1 pulses are not formed (the potential of Log. 1 is set), the SIAC detector 5 generates a potential of Log at the output. 1, which removes the ban on divider 3 frequencies by three. At the output of the detector 6 interruptions in communication, a potential Log is formed. G, which switches the switch 7 and passes the signal from the first input (Fig. 5i),

Mode b. There are errors in SIAS. When an input pulse shaper 4.1 each pulse error at its output

a pulse is generated, which is fed to the inputs of the divider 3 frequencies by three and the detector 5 SIAS. Divider 3 divides the frequency of the input pulses into three and therefore, at its output, pulses are formed with a frequency three times lower than the frequency of the input pulses (error pulses). This division is done to compensate for the threefold increase in errors that occurs in the descrambler.

The SIAC detector 5 and the communication break detector b form the same control voltages as in mode a. The output of the switch 7 passes pulses with a frequency of three times lower than the frequency of the error pulses, the post falling on the device input.

Detector 5 SIAS has two modes of operation:

The first mode occurs when the time intervals between adjacent input pulses do not exceed the duration of the pulses generated by the first one-vibrator 8.1. This is observed when a device receives an information signal, i.e. normal operation, as well as in the event of a communication break.

The second mode occurs when the time intervals between adjacent input pulses exceed the duration of the pulses generated by the first one-vibrator 8.1, or there are no input pulses. This is observed when the SIAC device receives with or without errors.

The first mode. By the first input pulse, the first one-shot 8.1 is set to the Log state. T, i.e. at its output (Fig. 5g) a positive impulse is formed. The next input pulse arrives before the end of the output pulse and restarts the first one-shot 8.1, i.e. lengthens the output pulse. This restart of the first one-shot 8.1 is performed by each next pulse, which leads to an unlimited extension of the pulse at the output of this one-shot, i.e. the potential of the log is formed continuously. one.

The second one-shot 8.2 after the end of the formation of the pulse returns to the state Log, 6 and remains in this state indefinitely (while the input of the SIAC detector 5 pulses).

Second mode. When the input pulses disappear, the first one-shot 8.1

after completion of the pulse formation, it returns to the Log state. O, by which the second one-shot 8.2 is set to the Log state. 1. Such a state is preserved during the entire time of absence of input pulses.

Upon receipt of rare pulses (error pulses), the first one-shot 8.1 is switched to the Log state. 1. After the expiration of the time determined by the time constant of the capacitor circuit 9.1 and the resistor 10. 1, on the second terminal of which the supply voltage Vn is applied, the first one-oscillator 8.1 returns to the state

Log O, the second one-shot 8.2 during this time does not have time to return to the Log state. Oh, since its time constant of the capacitor circuit 9.2 and resistor 10.2 is longer than that of the one-shot 8.1, so it remains in the Log state. 1 for the entire time in the mode. The interruption detector 6 works in the same way as the first one-one 8.1 SIAC detector 5.

Claims (1)

Invention Formula A device for determining the loss of confidence in the transmission of digital information over a communication line, comprising an inverter, a frequency divider by two, whose input is an input of device clock pulses, and a frequency divider by three, differing in that for determining the loss of confidence in the transmission of the alarm indication signal, the first and second pulse formers, the alarm indication detector, the interruption detector of the communication and the switch are introduced, the input and output The inverter is connected to the signal inputs of the second and first pulse formers, the clock inputs of which are connected to the frequency divider input by two, and the output of the first pulse shaper is connected to the control input of the frequency divider by three, the signal input and the output of which is connected respectively to the output of the first pulse generator and to the first signal input of the switch, the second signal and control inputs of which are connected according to but with the output of the frequency divider by two and with the output a communication break detector, the input of which is connected to the output of the second pulse driver. FIG. 2 i Ј L-Ј figure 1 Lereryb svzvi - + T4G LT  I-g-- shishgschgtsi pjuuuuumj illsch 11ShLLLLPL1Sh1) KM) it andC v- - c-1PLG  -U-LTUT e 1ГШП1-LlnnnnnniUl well to l PJTGLGJJPJlJlLdGGLLGShlLJlm J g h - „- 1 i i Ј J J .. SchigM SPAS Errors one T4G LT -h-