SU1661664A1 - Frequency ratio meter - Google Patents

Abstract

The invention relates to a pulse technique and can be used in apparatus designed to automatically measure the ratio of the average pulse frequency. The aim of the invention is to expand the range of measured frequency ratios while maintaining a constant relative error. The goal set in the device for measuring the frequency ratio is achieved by introducing an AND 5 element, triggers 9, 10, a switch 14, a multi-bit selector-multiplexer 16, a multi-bit element AND 18, an element OR 19, and elements 20, 21, 23. In addition, the device contains a time selector 1, decade decimal counter 2, trigger 3, decoder 4, trigger 6, multiplexer selectors 7, 8, trigger 11, switches 12, 13, decadal frequency divider 13, pulse counter 17, driver 22, block 24 output. 1 il.

Description

a relative error, the goal in the device for measuring the ratio of frequencies is achieved by introducing an element of AND 5, triggers 9, Yu, switch 14, a multi-bit selector-multiplexer 16, a multi-bit element of AND 18, an element of OR 19. elements of AND 20 , 21, 23. Except

Moreover, the device contains a time selector 1, a decade decimal counter 2, trigger 3, decoder 4, trigger 6, multiplexer selectors 7, 8, trigger 11, switches 12, 13, decadal frequency divider 13, pulse counter 17, driver 22, block 24 output. 1 il.

The invention relates to a pulse technique and can be used in apparatus designed to automatically measure the ratio of the average pulse frequency.

The purpose of the invention is to expand the range of measured frequency ratios while maintaining a constant relative measurement error,

The drawing shows a block diagram of a device for measuring the frequency ratio.

The device for measuring the ratio of frequencies contains a time selector 1, decimal counter 2, trigger 3, decoder 4, element 5, trigger 6, selector multiplexers 7 and 8, triggers 9-11, switches 12-14, decade divider 15 frequencies, selector-multiplexer 16, decimal pulse counter 17, AND 18 element, OR 19 element, AND 20 and 21 elements, 22 pulse generator, And 23 element, 24 output pin, display bus 25, input buses 26 and 27.

The input bus 26, which receives the frequency f. (divisible) is connected to the first input of the time selector 1, the output of which is connected to the counting input of counter 2, the output of which is connected to the input of trigger 3, the direct output of which is connected to the corresponding input of output unit 24, the second input of which is connected to the output of the multidisc selector -multiplexer 16, the information inputs of which are connected to the outputs of the bits of counter 2, the discharge outputs of (t-1) -th and m-th decade of which are connected to the inputs of the decoder 4, the output of which is connected to the first inputs of the element And 5, the output of which an information input of the flip-flop 6, the forward output connected to

the first input of the switch 13, the output of which is connected to the information input of the trigger 11, the direct output of which is connected to the corresponding inputs of the switches 12-14, the second

the input of the time selector 1 and the first input of the imager 22, the first output of which is connected to the zeroing inputs of the counter 2, triggers 3 and 6, the counter 17, the bit outputs of which are connected to the control inputs of the selector multiplexers 7 and 8, with the corresponding inputs of the output unit 24 and an element 18, the second input of which is connected to the corresponding inputs of the switches 13 and 14, the output unit 24 and the forward output of the trigger 10, the inverse output of which. connected to the second input element And 5 and the corresponding input of the switch 14, the output of which is connected to the counting input of the counter 17, the output of the selector-multiplexer 8 is connected to the corresponding inputs of the switches 13 and 14, the output of the selector-multiplexer 7 is connected to the corresponding input of the switch 14, bus 25 display and input bus 27, which receives the frequency f2 (divider) are connected to the corresponding inputs

switch 12, the output of which is connected to the input of the decade splitter 15, the output of the corresponding bit of which is connected to the first input of the element OR 19 and the first input of the element 21, the second input of which is connected to the direct output of the trigger 9 and the second input of the element 20 , the first input of which is connected to the corresponding output of the counter 2 and the second

the input of the element OR 19, the output of which is connected to the R-input of the trigger 9, the S-input of which is connected to the inputs of zeroing the decade of the divider 15 and the second output of the driver 22, the second

the input of which is connected to the corresponding input of the switch 12, the first input of the AND 23 element and the inverted output of the trigger 11, the S-input of which is connected to the output of the AND 23 element, the second input of which is connected to the corresponding output of the divider 15, the outputs of the decades which are connected to the corresponding information inputs the selector-multiplexer 8, the output element And 18 is connected to the control input of the selector-multiplexer 16, the outputs of the elements And 20 and 21 are connected respectively to the S- and R-inputs of the trigger 10, t-e, (t + 1) -e, M exits decade decimal ika 2 are connected to respective data inputs of the multiplexer 7. selektora- M - total number of decades of the counter 2 ().

A digital printer, a display device, a digital display, etc. can be used as output unit 24. When displaying the mantissa of the measurement result in the form of m decimal digits, the output of the selector-multiplexer 16 is multi-bit and has m decimal digits (or 4t binary-decimal).

At the same time, the output of the selector-multiplexer 16 receives signals from the outputs m of the included 10-second decades of counter 2. The numbers of the decades are determined by the code of the signal present at the control input of the selector 16.

When initially turned on, the device may be in an arbitrary state. After the end of some transient process, the device automatically returns to the initial state, consisting in finding the triggers 10 and 11 in the unit state, and the triggers 3 and 6 in the zero state. At the same time, counter 2 and divider 15 also zero and the Account mode begins. We illustrate this with examples.

The trigger 11 is in the zero state (Indication mode). If the trigger 10 is also in the zero state, the trigger 11 will be set to one after the arrival of the pulse at the input of the And 23 element, i.e. no later than 10K pulses received on the bus 25. If trigger 10 is in one state and k m, then installation trigger 11 in one state is

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no later than 10 pulses received by bus 25, pulse received at input C of trigger 11 through switch 13. This completes the transient

The trigger 11 is in a single state (Account mode). If the trigger, the ger 10 is in the single state, and the trigger 9 is at zero, then the pulse received at the input of the divider 1 5 from the output of the m-th decade of the divider 15, the trigger 11 will be set to the Indication mode and then the process will proceed as described above. If trigger 9 is in a single state, then after n pulses arriving on bus 26 or bus 27, trigger 10 will change its state or remain in a single state. If trigger 10 is in the zero state, then trigger 6 after a certain number of pulses arriving on bus 26 will be set by a signal from the output of the decoder 4 into a single state and by a pulse from the output of multiplexer 8, trigger 11 will change its state to the Indicator mode . In this case, after the end of the Indication mode, the transition process is completed.

The measurement result obtained during the transition period will be incorrect and is not taken into account by the consumer. After the end of the transient process (transition from the Display mode to the Count mode), the device is set to the initial state by a signal generated by the shaper 22, and further measurements will be reliable.

The mode of operation of the device depends on the ratio of the frequencies f "and Ј ,. Let be

f. Ј „. then after n periods of sig1 l2

4 2. The cable entering the bus 27, the trigger 10 is set to the zero position. The choice of the number n (1 Ј n 10) depends on the regularity of the input signal and determines the number of bits of the counter 2 and divider 15, the outputs of which are connected to the inputs of the OR 19 element. A typical value of 8. The element OR 19, trigger 9 and elements AND 20 and 21 allow the trigger 10 to be set only by the first pulse generated at the low-order output of divider 15. After the trigger 10 is set to zero, the element 5 opens, the switch 14 connects the output of the selector-multiplexer 8 to the input of the counter 17, and the switch 13 allows the connection trigger input January 1-output selector multiplexer 8. After the arrival of ten pulses on bus 27 at the output of switch 14 is formed by a pulse counter 17, which translates into the following state. In this case, the selector-multiplexer 8 connects the input of the switch 14 to the output of the second decade of the divider 15. The next switching of the counter 17 is carried out after the arrival of one hundred pulses on the bus 27, etc. Thus, the counter 17 records the number defining the order of the number of pulses arriving on the bus 27. The multiplex d-element AND 18 is closed by the zero level present at the output of the trigger 10, i.e. At the control input of the multiplexer 16 selector there is a number code that corresponds to connecting the digits of the first m decades of counter 2 to the inputs of output terminal 24. The number m is determined by the required measurement error. Typical value, ..., 8.

The decoder 4 generates at its output an impulse when writing to the decimal counter 2 of such a number that in the (t-2) -th decade of the counter 2 the states of O are recorded, and in (t-1) -th and tth decades a certain number N is written. The choice of the number N when implementing a device is determined by the regularity of the input signals (O "C N 19). For regular signals N 9. After that, the trigger 6 changes its state and connects the output of the selector-multiplexer 8 to the input of the trigger 11 via a switch

rt

13. After the arrival at the input 27 10 pulses} where R is the mathematical order of the result of the measurement of the ratio of frequencies, the trigger 11 goes into the Indicator state. Thus, in a time equal to the duration of 10 pulses arriving at the bus 27, the counter 2 has L pulses. After 1 switching of the trigger 11 to the indication position, the time selector 1 is turned off, switch 12 is switched, AND 23 is turned on, pulses 12 go from bus 259 to where the indication signal arrives, to the input of divider 13. After the bus arrives 25 10k pulses, where k is decade number

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the divider 15, the output of which is connected to the input of the element 23, the trigger 11 is again set to the mode. The shaper 22 generates the zeroing pulses of the counters 2 and 17, the triggers 3 and 6, the divider 15 and setting the trigger state to one and repeats the measurement. The number k is determined by the required indication time and the pulse frequency arriving at bus 25.

Consider the case Ј ,, ± a (trigger 11 is in the Account position). Then, after n periods of the signal arriving at the bus 26, the trigger 10 is set to a single position. At the same time, the output of the selector-multiplexer 7 is connected to the input of the counter 17 through the switch 14, the element 5 also closes and the output of the divider 15 is connected to the input of the trigger 11 via the switch 13. After entering the bus 26 10 output pulses the selector-multiplexer 7, a pulse is generated, which transfers the counter 17 to the next state. In this case, the selector-multiplexer 7 connects the input of the switch 14 to the output (t + 1) -th decade of counter 2. The next switching of counter 17 will occur after the arrival on the bus 26 10m + pulses, etc. Thus, the counter 17 records the number that determines the order of the number of pulses arriving on the bus 26. The discharge outputs of the counter 17 are through an open element 18 connected to the control input of the selector-multiplexer 16. Therefore, if the counter 17 has the number S , then the discharge outputs (8 + 1) -th, ..., ..., (8 + t) -th decade of counter 2 are connected to the corresponding input of the output unit 24 through the selector-multiplexer 16. After the arrival of pulses on the bus 27 at the output (ha-1) -th decade of the splitter 15, a pulse is formed, which through the open switch 13 enters on od trigger 11, translating it into a position indication. Thus, during a time equal to the duration of the pulses arriving at the bus 27, the counter 2 counts „pulses.

The operation of the device in the Display mode is similar to the process described above.

The operation of the output unit 24 can be seen in the example of its execution, in the form of an indicating device with a digital display. In this case, the output unit 24 consists of a set of decoders and a set of digital indicators, which can be LED or liquid crystal arrays or gas-filled lamps. Each of the outputs of the decades of the selector-multiplexer 16 and the counter 17 is connected to the inputs of the corresponding decoder, the output of which is connected to a digital indicator. In addition, each of the outputs of these decades is a binary code of the decimal digit displayed by a digital indicator. The measurement result is counted after switching the trigger 11 to the Indication position and is presented in decimal form, where a is the number recorded in the m decades of counter 2 displayed in the output block 24 (the upper bits of the L2 number or the L number), b is the recorded in the counter 17. The sign of the order before the number b is determined by the position of the trigger 10. With the zero position of the trigger 10, the minus sign is displayed. From the position of the trigger 10, the position of the decimal number a can also change. When the counter 2 overflows, the trigger 3 overturns to the opposite state and in the output block 24, the Overflow indicator turns on.

In comparison with the known, the proposed device has a large range of measured frequency ratios. Indeed, if in the known device the first decimal counter contains m decades, and the frequency divider has q decades, then the lower limit of the measured frequency ratio is tf, / fj.7, and the top f, / fzc10. In this case, it is assumed that the outputs of all m decades of the first pulse counter are connected to the output unit, and the numbers recorded in these m decades are output on a digital display (output unit). A decrease in the number of decades displayed on the digital display (less than m) leads to an increase in the lower limit of the measured ratio. For the proposed device, the lower limit of the measured

ratios are also

L-o.pl

 and the upper limit at

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The digital display also shows m decimal places equal to f1 / f "

-rtM-fYlV

 ten . Thus, the gain in expanding the range of measured frequency ratios is 10 m. In particular, with m 3 and M 8, the gain is four decimal orders (10 times).

Claims (1)

Invention Formula A device for measuring the frequency ratio, containing a time selector, two decimal counters, three flip-flops, a decade frequency divider, two selector-multiplexers, two switches, an output unit, a decoder, two input buses, a display bus, a driver, the first output of which is connected to the zeroed the first and second decimal counters, the first and third triggers, the second output of the imaging unit is connected to the zeroing input of the ten-day frequency divider, the outputs of the decades of which are connected to the information inputs of the first village a multiplexer whose control input is connected to the bit outputs of the second decimal counter, the control input of the second selector-multiplexer and the corresponding inputs of the output unit, the first input of which through the serially connected first trigger, first decimal counter, time selector is connected to the first input bus device, the second input bus and the display bus of which is connected to the corresponding information inputs of the first switch, the output of which is connected to the counting input of a decad frequency divider, the output (t-1) of the tenth decade of which is connected to the corresponding input of the second switch, the direct output of the second trigger is connected to the second input of the time selector, the corresponding inputs of the first and second switches and the first input of the driver, the second input of which is connected to the corresponding input the first switch and with the inverse output of the second trigger, the information input of which is connected to the output of the second switch, the bit outputs (t −1) -th, t-th decade of the first decimal counter are connected to the corresponding yuschimi decoder inputs, the output of the first selector-multiplexer is connected to the corresponding input of the second switch, characterized in that, in order to expand the range of the ratio of measured frequencies, two triggers, four AND elements, a third switch, an OR element, a multi-bit element, are entered - a vector multiplexer, informational paths of which are connected to the corresponding bit outputs of the first ij o ten-meter counter, the corresponding inputs of the output unit are connected by 4 output buses of the multi-bit Selector multiplexer, control buses which are connected to. the output of the multi-bit element I, the second input of which is connected to the corresponding 4-input inputs of the output unit, the second and third switches and the direct output of the fifth trigger, the inverse output of which is connected to the corresponding input of the third switch and the second input of the first element I, the first the input of which is connected to the output of the decoder, the output of the first element I is connected to the information input of the third trigger, the direct output of which is connected to the corresponding input of the second switch, the output of the corresponding minor row decadic frequency divider coupled to the first input of the OR gate and the first input of the third AND gate, a second input coupled to a straight 0 five 0 the fourth trigger and the second input of the second element, the first input of which is connected to the output of the corresponding low-order first decimal counter and the second input of the OR element, the output of which is connected to the outgoing input of the fourth trigger, the input of which is 1m connected to the second output shaper, the second input of which is connected to the first input of the fourth element I, the second input of which is connected to the output of the corresponding decade of the ten-day frequency divider, the input setting to 1 of the second flip-flop ene yield a fourth AND gate, outputs cerned and third elements and connected respectively to the inputs of the mouth .. Q In I1 and U of the fifth trigger, the corresponding outputs of the decade of the first decimal counter are connected to the information inputs of the second collector-multiplexer, the output of which is connected to the corresponding input of the third switch, the output of which is connected to the counting input of the second counter, 0 which is connected to the corresponding inputs of the multi-bit element I, the output of the first multiplexer selector is connected to the corresponding input of the third switch, the third control input of which is connected to the forward output of the second trigger.