SU1543430A1 - Device for determining coordinates of centre of gravity of image - Google Patents

Abstract

The invention relates to automation and measurement technology and can be used in various monitoring devices, in particular in image recognition image processing systems, in robotics, in positioning devices. The device contains a matrix of photoconverters, two decoders, two counters, an analog-to-digital converter, four accumulating adders, two division blocks, two registers, an And element, a trigger, a control block. The purpose of the invention is to increase the speed of the device. The goal is achieved by simultaneously calculating the moments of inertia of the image of the zero and first orders, with the help of which the coordinates are determined. 1 hp f-ly, 4 ill., 1 tab.

Description

The invention relates to automation and measuring technology and can be used in various monitoring and measuring devices, in particular, in image processing systems, pattern recognition, in robotics, in positioning devices.

The purpose of the invention is to increase the speed of the device.

FIG. Figure 1 shows the block diagram of the device for determining the coordinates of the image center of the image; 2 shows a control unit of the device; Fig. 3 shows a flowchart for determining the coordinates of the image center of the image; in fig. 4 - element of combination logic.

The device for determining the coordinates of the center of gravity contains a matrix of 1 PVs, decoders 2 and 3, counters 4 and 5, an analog-to-digital converter (ADC) 6, accumulating adders 7-10, blocks 11 and 12 of the division, registers 13 and 14, inputs 15 and 16 devices for setting the number of rows of the matrix I of photovoltaics and setting the number of columns of the matrix 1 for home converters, respectively, inputs 17 (Xc) and 18 (Y), element I 19, trigger 20S control unit 21 and start input 22.

The control unit contains output 23-34, control inputs 35-37, pulse generator 38, AND 39, trigger 40, register 41, combinational logic element 42, ROM ROM 43.

The element of combinational logic contains the first 44, the second 45, the third

rd

DO 4ъ

ЈЈ

ABOUT

with

315

46 inverters, the element OR-HR 47, the first 48, the second 49, the third 50 And elements, the first 51-54, the second 55-58 Groups of And elements and the group of 60-63 Elements OR.

The device works as follows.

Before starting, the image of the object is projected onto the matrix 1 of the photo-converters, which contains n “cells, each of which converts the optical signal arriving at it into a directly proportional electrical signal. Definition (coordinates XC and CSS is produced at the same time.

Upon the arrival of the signal on bus 22 of the start-up of Jca control unit 21, register 41 is zeroed, trigger 40 enables the passage of pulses from generator 38 to synchronous input of register 41. The contents of ROM 43, addresses 0000, are retrieved (see table). At the outputs 23-26 (U1, U2, UZ, U4, Fig. 3) of the control unit 21 i and the output 17 of the ROM 43, single potentials appear, microoperations of the first block of the flow chart, i.e. counters 4 and 5 are recorded with the appropriate type number, trigger 20 is zeroed, accumulative adders and division blocks 11 and 12 are zeroed. Thus, the device is prepared for and (the moving state. The registers 13 and 14 are not zeroed because they can contain the results of previous coordinate values.

Sampling of the nth column of the matrix of photovoltaic cells begins, on the m-k cell. In each cycle from the output of the ADC 6, a new value of the nth column cells arrives at the inputs of accumulating adders 7 and 9, on which the tt-ro cell values accumulate. In the accumulating sum, the torus 10 adds (Y7, Fig. 3) the new values of accumulating adder 9. Thus, in accumulating adder 9, the value of the moment of inertia of the nth column relative to the (n, o) -th cell is accumulated. When selecting (n, o) -th cell at the output 35 of the decoder 2, a signal appears. After that, accumulator 8 accumulates in accumulator 8, accumulator 9 accumulates in zero, one is subtracted from counter 5, and value t is recorded in counter 4.

0

five

0

five

thirty

35

40

45

50

55

There is a similar sampling of the following (n-I) -ro column of cells.

After sampling the cells of the 0th column in the accumulating adder 7, the moment of inertia of the growth (zero order) of the image is found; in the accumulating adders 8 and 10, the values of the moments of inertia | l01 and p, 0 (first order) of the image are found.

Therefore, content from accumulating adders 7, 8, and 9 is overwritten into registers of division blocks 11 and 12, in which the first-order inertia moments are divided by the zero-inertia moment. The result is rewritten into registers 13 and 14.

The introduction of new nodes and constructive connections allows to increase the speed of the device.

Claims (2)

1. A device for determining the coordinates of the image image center containing a matrix of photoconverters, an analog-digital converter, two accumulating adders, the input of the first of which is connected to the output of an analog-digital converter, and the output is connected to the input of the second accumulating adder, the division unit, the first and the second information inputs of which are connected respectively) with the outputs of the first and second accumulating adders, two registers, the information input of the first register is connected to the information output the house of the division unit, the outputs of the first and second registers are the outputs of ye Tpof, two counters, the information input of the first of which is the input of the number of rows of the photovoltaic panel setting, Ј the information input of the second counter matrices of photoconverters, two decoders, the inputs of which are connected, respectively, to the outputs of the first and second counters, the control unit, the first input of which is the device start input, the first output of the control unit is connected to the write enable input of the first counter, the second, third, fourth, fifth, sixth, seventh and eighth outputs of the control unit are connected respectively to the write enable input of the second counter, the zeroing input of the first division unit, the sync input of the first accumulating adder, the synchronization input of the second accumulating adder, the subtraction input the first counter, the subtracting input of the second counter, the input of the recording of the first register, characterized in that, in order to increase the speed of the device, it contains the third and the last accumulating adders, the second dividing unit, the trigger and the element I, the output of which is connected to the second input of the control unit, the third and fourth inputs of which are connected respectively to the first information outputs of the first and second decoder, the ninth, tenth, eleventh and twelfth outputs of the control unit are connected respectively to the control input of the analog-digital converter, the synchronous input of the fourth accumulating adder, the control inputs of the first and second dividing units and the installation input in 1 trigger, the zeroing input of the third accumulating adder, the third output of the control unit is connected to the zeroing input of the second dividing unit, the fourth output of the control unit is connected to the synchronous input of the third accumulating adder, the second output of the control unit is connected to the inputs of zeroing, trigger, first, second and fourth accumulating adders, the eighth output of the control unit is connected to the write enable input of the second register, the outputs of the first decoder are connected to the first group of control inputs of the photo matrix reobrazovateley, a second group of which is coupled to the outputs of the second decoder, and output - with an information input of the analog-digital converter whose output is connected to the data input of the third accumulator whose output connected to the information input of the fourth accumulating adder, the output of which is connected to the first information input of the second division block, the information output of which is connected to the information input of the second register, the trigger output connected to the first input of the element P I, the second input of which is connected to the output of the dividing end of the dividing unit, the output of the dividing end of the second dividing unit is connected to the third input of the I element, the output of the first accumulating adder is connected to the second information input of the second dividing unit. 2. The device according to claim 1, about t 0, in that the control unit contains a clock pulse generator, an element trigger, a register, a combination element and a fixed memory block, the first to twelfth outputs of which are outputs of the control block, the thirteenth output of the fixed memory block is connected to the input set to 1 trigger, the zero input of which is connected to the register zero reset input and is the first input of the control unit, the output of the trigger is connected to the first input of the AND element, the other one of which is connected to the output of the generator, clock pulse, the output of the AND element is connected to the recorder's signal input, the outputs of which are connected to the corresponding address inputs of the permanent memory unit, the fourteenth to the twenty-first outputs of which are connected respectively to the first - eighth inputs of the element of the combinational logic, the ninth, tenth and eleventh inputs of which are are the second 5, the third and fourth inputs of the control unit, the outputs of the combinable logic element are connected to the corresponding information inputs of the register. t IM -OVOCO-jC iLn.P-UJW - - - OOOOOOOO ooo - - - - oooo -00 - - 00OO oh oh oh oh oh oh oooo - ooooo - oooooooooo- OOOOO - OOOO - ooo - oooooo - ooooooooo - o oooooooo - oo ooooooo - ooo ooooo - ooooo oooo - oooooo oooooo - oooo ooo - ooooooo o - ooooooooo -oooooooooo ---- ooooooo ooooo-o - ooo - ooo - oo - - about -ooo - oh oh oh yy & gzzdgzdzd oo - - ooooooo ooooo - o - ooo ooooo - ooooo oo - - o - o - ooo  S and n "Vl . fe §52§S :: .K: fc e gg N " I II