SU1205274A1 - Generator of single pulses - Google Patents

Description

The invention relates to impulse technology and can be used in computing and in automation systems.

The purpose of the invention is to increase the reliability of the former.

The device provides for the formation of single pulses with reference to the clock frequency and eliminates the possibility of the appearance of a false pulse when the shaper returns to its initial state and this increases the reliability of the shaper.

The drawing shows the functionality of an electric shaper circuit.

The shaper contains a trigger 1, the inputs of which are connected to pins 2 and 3 of a logic signal switch 4, input 5, intermediate 6 and output 7 triggers, four IS-HE elements 8-11, bus 12 clock pulses, output bus 13, resistors 14 and 15 and busbar voltage

 nor logical unit. I

The zero and single inputs of triggering trigger 1 are connected to normally closed and normally open contacts 2 and 3 of logic switch 4, the moving contact of which is connected to logical zero signal, contacts 2 and 3 are connected via resistor 14 and 15 to the voltage bar of the logical unit. The output of the trigger trigger 1 is connected to the zero inputs of the input and intermediate trigger 5 and to the input of the first element IS-HE 8, the other input of which is connected to the bus 12 clock pulses. The output of the first element IS-HE 8 is connected to a single input of the input trigger 5. and to the input of the second element IS-HE 9 whose other input is connected to the output of the input trigger 5. The output of the second element AND-HE 9 is connected to a single input of the intermediate trigger 6 and the input of the third element AND-NOT 10, the other input of which is connected to the output of intermediate trigger 6, to the zero input, output trigger 7 and to the input of the fourth AND-NOT element 11. The code of the third AND-NOT element 10 is connected to a single input output trigger 7, the inverse of which Connect to the other input of the fourth AND-NO element 11,

the output of which is connected to the output bus 13.

The shaper works as follows.

In the initial state, from pin 2 of switch 4 to the zero input of triggering trigger 1 a low level signal is sent, and to the single input of trigger trigger 1 from pin 3 via a resistor 14 from bus 15., it is a high level signal. In this case, the trigger trigger 1 is in the zero state, prohibiting the passage of clock pulses from input 12 through the first AND-NE element 8 and keeping the input and intermediate triggers 5 and 6 in the zero state, and the intermediate trigger 6 also holding the output state trigger 7 ..

When contact 2 is opened and contact 3 is closed, triggering trigger 1 is set to one state, allowing the passage of these pulses through the first AND-NE element 8. The high-level clock pulse passes through the first AND-HE element 8 and converts to the single state input trigger 5, which allows the passage of clock pulses through the second element AND-NOT 9-, low-level clock pulses (at input 12) pass through the second element AND-NOT 9 and the leading edge of the first one is transferred to the unit state exact trigger 6-, from the output of which the high level signal is fed to the zero input of the output trigger 7 and to the inputs of the third and fourth elements AND-NOT 10. and 11. At the other input of the fourth element AND-NOT 11 there is already a high level signal from the inverse output trigger output 7. At the same time, a low level signal is set at the output of the fourth element IS-NOT 11. The next highest-level clock pulse (at input 12) that follows this moment passes through the third element IS-HE 10 and converts the output trigger 7 into a single state. At the same time, at the output of the fourth element, And-Fffi 11, a high level signal is again set.

After the opening of contact 3 and the freezing of contact 2 of switch 4 is set to the zero state

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trigger trigger 1, which translates input and intermediate triggers 5 and 6 also to the zero state. Low level signal from intermediate trigger 6 output to the input of the fourth IS-NOT element t1 and keeps high signal level at its output. Setting the intermediate trigger 6 to the zero state causes the output trigger 7 to be set to the zero state, at the inverse output of which a high level signal is set, which is fed to another input of the fourth

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element AND NOT 11, the former returns to its original state.

Thus, a single pulse is formed on the output bus 1 3, the duration of which is equal to the duration of the low level clock pulse, while eliminating the possibility of a false pulse, as connecting the intermediate trigger output to the zero input of the output trigger ensures that the zero state of the output trigger only after the intermediate trigger is set to the zero state.

Claims (1)

A SINGLE PULSE SHAPER containing a trigger, the inputs of which are connected to the contacts of the logic level signal switch, and the output is connected to the zero inputs of the input and intermediate triggers and to the first input of the first AND-NOT element, the other input of which is connected to the clock bus, and the output to the input of the input trigger and the input of the second AND-NOT element, the other input of which is connected to the output of the input trigger, and the output of the AND-NOT element to the input of the third AND-NOT element and the single input of the intermediate trigger, the output of which o connected to another input of the third AND-NOT element, the output of which is connected to a single input of the output trigger, the zero input and output of which are connected respectively to the first and second inputs of the fourth AND-NOT element, characterized in that, in order to increase reliability, the intermediate output The trigger is connected to the zero input of the output trigger. n. SU 1205274> ΐ 1205274