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SG137754A1 - Antialiasing using multiple display heads of a graphics processor - Google Patents

Antialiasing using multiple display heads of a graphics processor

Info

Publication number
SG137754A1
SG137754A1 SG200703269-1A SG2007032691A SG137754A1 SG 137754 A1 SG137754 A1 SG 137754A1 SG 2007032691 A SG2007032691 A SG 2007032691A SG 137754 A1 SG137754 A1 SG 137754A1
Authority
SG
Singapore
Prior art keywords
pixel
display
graphics processor
pixels
master
Prior art date
Application number
SG200703269-1A
Inventor
Duncan A Riach
Brijesh Tripathi
Brett T Hannigan
Philip Browning Johnson
Original Assignee
Nvidia Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/383,048 external-priority patent/US8130227B2/en
Priority claimed from US11/680,554 external-priority patent/US20090085928A1/en
Application filed by Nvidia Corp filed Critical Nvidia Corp
Publication of SG137754A1 publication Critical patent/SG137754A1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/1423—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display
    • G06F3/1438—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display using more than one graphics controller
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T15/00—3D [Three Dimensional] image rendering
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T15/00—3D [Three Dimensional] image rendering
    • G06T15/50—Lighting effects
    • G06T15/503—Blending, e.g. for anti-aliasing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/1423—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display
    • G06F3/1431—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display using a single graphics controller
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/363—Graphics controllers

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Graphics (AREA)
  • Human Computer Interaction (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Image Generation (AREA)
  • Image Processing (AREA)
  • Controls And Circuits For Display Device (AREA)

Abstract

Multiple display heads of a single graphics processor are exploited to perform antialiasing and other processing tasks. In one embodiment, two display heads of the same graphics processor are coupled to each other in a master/slave configuration via a pixel transfer path. The "master" display head receives pixels from the "slave" display head in addition to its own pixels, and pixel selection logic in the master display head can blend the two pixels or select either one to the exclusion of the other. If the two pixels correspond to different sampling locations in the same display pixel, the blended pixel is an antialiased pixel.
SG200703269-1A 2006-05-12 2007-05-07 Antialiasing using multiple display heads of a graphics processor SG137754A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US74715406P 2006-05-12 2006-05-12
US11/383,048 US8130227B2 (en) 2006-05-12 2006-05-12 Distributed antialiasing in a multiprocessor graphics system
US11/680,554 US20090085928A1 (en) 2006-05-12 2007-02-28 Antialiasing using multiple display heads of a graphics processor

Publications (1)

Publication Number Publication Date
SG137754A1 true SG137754A1 (en) 2007-12-28

Family

ID=38219252

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200703269-1A SG137754A1 (en) 2006-05-12 2007-05-07 Antialiasing using multiple display heads of a graphics processor

Country Status (6)

Country Link
JP (1) JP4748483B2 (en)
KR (1) KR100890702B1 (en)
CN (1) CN101086830A (en)
DE (1) DE102007021546A1 (en)
GB (1) GB2438087B (en)
SG (1) SG137754A1 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8373708B2 (en) 2008-07-30 2013-02-12 Nvidia Corporation Video processing system, method, and computer program product for encrypting communications between a plurality of graphics processors
US8319780B2 (en) 2008-07-30 2012-11-27 Nvidia Corporation System, method, and computer program product for synchronizing operation of a first graphics processor and a second graphics processor in order to secure communication therebetween
JP4703695B2 (en) * 2008-08-28 2011-06-15 シャープ株式会社 Data creation device, data creation method, data creation program, drawing device, drawing method, and drawing program
US8681167B2 (en) * 2008-09-23 2014-03-25 Intel Corporation Processing pixel planes representing visual information
KR102443203B1 (en) * 2015-10-27 2022-09-15 삼성전자주식회사 Method for Operating Electronic Device and the Electronic Device
US10489878B2 (en) 2017-05-15 2019-11-26 Google Llc Configurable and programmable image processor unit
US11386034B2 (en) * 2020-10-30 2022-07-12 Xilinx, Inc. High throughput circuit architecture for hardware acceleration

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2325602A (en) * 1997-05-19 1998-11-25 Hewlett Packard Co Synchronisaton of frame buffer swapping among conmputer graphics pipelines in a multi-pipeline display system
US6412061B1 (en) * 1994-05-23 2002-06-25 Cirrus Logic, Inc. Dynamic pipelines with reusable logic elements controlled by a set of multiplexers for pipeline stage selection
US20020097241A1 (en) * 2000-08-18 2002-07-25 Mccormack Joel James System and method for producing an antialiased image using a merge buffer
US6882346B1 (en) * 2000-11-17 2005-04-19 Hewlett-Packard Development Company, L.P. System and method for efficiently rendering graphical data
WO2006055606A2 (en) * 2004-11-17 2006-05-26 Nvidia Corporation Connecting graphics adapters for scalable performance

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3209632B2 (en) * 1993-03-16 2001-09-17 松下電器産業株式会社 Weight averaging circuit
JP2970440B2 (en) * 1994-11-29 1999-11-02 松下電器産業株式会社 Image synthesis method and image synthesis device
JPH10124038A (en) * 1996-10-18 1998-05-15 Fujitsu General Ltd Image synthesis device
JP4505866B2 (en) * 1998-04-03 2010-07-21 ソニー株式会社 Image processing apparatus and video signal processing method
US6771264B1 (en) * 1998-08-20 2004-08-03 Apple Computer, Inc. Method and apparatus for performing tangent space lighting and bump mapping in a deferred shading graphics processor
JP2000099748A (en) 1998-09-17 2000-04-07 Ricoh Co Ltd Three-dimensional graphics processing apparatus and processing method thereof
US6181352B1 (en) * 1999-03-22 2001-01-30 Nvidia Corporation Graphics pipeline selectively providing multiple pixels or multiple textures
AUPQ593100A0 (en) * 2000-02-29 2000-03-23 Canon Kabushiki Kaisha Alpha-channel compositing system
US6567098B1 (en) * 2000-06-22 2003-05-20 International Business Machines Corporation Method and apparatus in a data processing system for full scene anti-aliasing
US7095386B2 (en) 2001-06-07 2006-08-22 Nvidia Corporation Graphics system including a plurality of heads
KR100441079B1 (en) * 2002-07-31 2004-07-21 학교법인연세대학교 apparatus and method for antialiasing
JP2004349842A (en) * 2003-05-20 2004-12-09 Fuji Photo Film Co Ltd Method and program for correcting composite image
US8212838B2 (en) * 2005-05-27 2012-07-03 Ati Technologies, Inc. Antialiasing system and method

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6412061B1 (en) * 1994-05-23 2002-06-25 Cirrus Logic, Inc. Dynamic pipelines with reusable logic elements controlled by a set of multiplexers for pipeline stage selection
GB2325602A (en) * 1997-05-19 1998-11-25 Hewlett Packard Co Synchronisaton of frame buffer swapping among conmputer graphics pipelines in a multi-pipeline display system
US20020097241A1 (en) * 2000-08-18 2002-07-25 Mccormack Joel James System and method for producing an antialiased image using a merge buffer
US6882346B1 (en) * 2000-11-17 2005-04-19 Hewlett-Packard Development Company, L.P. System and method for efficiently rendering graphical data
WO2006055606A2 (en) * 2004-11-17 2006-05-26 Nvidia Corporation Connecting graphics adapters for scalable performance

Also Published As

Publication number Publication date
DE102007021546A1 (en) 2007-12-06
GB0709101D0 (en) 2007-06-20
CN101086830A (en) 2007-12-12
KR20070109951A (en) 2007-11-15
KR100890702B1 (en) 2009-03-27
GB2438087A (en) 2007-11-14
JP4748483B2 (en) 2011-08-17
GB2438087B (en) 2011-05-18
GB2438087A8 (en) 2008-04-29
JP2007310883A (en) 2007-11-29

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