SG11201610771SA - Method of manufacturing a substrate - Google Patents
Method of manufacturing a substrateInfo
- Publication number
- SG11201610771SA SG11201610771SA SG11201610771SA SG11201610771SA SG11201610771SA SG 11201610771S A SG11201610771S A SG 11201610771SA SG 11201610771S A SG11201610771S A SG 11201610771SA SG 11201610771S A SG11201610771S A SG 11201610771SA SG 11201610771S A SG11201610771S A SG 11201610771SA
- Authority
- SG
- Singapore
- Prior art keywords
- substrate
- manufacturing
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000000758 substrate Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/08—Manufacture or treatment characterised by using material-based technologies using combinations of technologies, e.g. using both Si and SiC technologies or using both Si and Group III-V technologies
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
- H01L21/30612—Etching of AIIIBV compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
- H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/40—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
- H10D84/401—Combinations of FETs or IGBTs with BJTs
- H10D84/403—Combinations of FETs or IGBTs with BJTs and with one or more of diodes, resistors or capacitors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Recrystallisation Techniques (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Semiconductor Lasers (AREA)
- Element Separation (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201462021810P | 2014-07-08 | 2014-07-08 | |
| PCT/SG2015/050198 WO2016007088A1 (en) | 2014-07-08 | 2015-07-06 | Method of manufacturing a substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| SG11201610771SA true SG11201610771SA (en) | 2017-01-27 |
Family
ID=55064575
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| SG11201610771SA SG11201610771SA (en) | 2014-07-08 | 2015-07-06 | Method of manufacturing a substrate |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US10049947B2 (en) |
| JP (1) | JP6751385B2 (en) |
| CN (1) | CN107004639B (en) |
| SG (1) | SG11201610771SA (en) |
| WO (1) | WO2016007088A1 (en) |
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| TWI566328B (en) * | 2013-07-29 | 2017-01-11 | 高效電源轉換公司 | Gallium nitride transistor having a polysilicon layer for generating additional components |
| US10510560B2 (en) | 2015-09-04 | 2019-12-17 | Nanyang Technological University | Method of encapsulating a substrate |
| CN117198983A (en) * | 2015-11-20 | 2023-12-08 | 环球晶圆股份有限公司 | Manufacturing method for flattening semiconductor surfaces |
| KR20180114904A (en) * | 2016-01-20 | 2018-10-19 | 메사추세츠 인스티튜트 오브 테크놀로지 | Manufacturing of devices on carrier substrates |
| KR101787435B1 (en) | 2016-02-29 | 2017-10-19 | 피에스아이 주식회사 | Method for manufacturing nanorods |
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| DE102016109459B4 (en) * | 2016-05-23 | 2019-06-13 | X-Fab Semiconductor Foundries Ag | Optimized transfer print (transfer printing) between carrier substrates as process, carrier substrate and micro-technical component |
| CN109844938B (en) | 2016-08-12 | 2023-07-18 | Qorvo美国公司 | Wafer-level packaging with enhanced performance |
| US10109502B2 (en) | 2016-09-12 | 2018-10-23 | Qorvo Us, Inc. | Semiconductor package with reduced parasitic coupling effects and process for making the same |
| US10749518B2 (en) | 2016-11-18 | 2020-08-18 | Qorvo Us, Inc. | Stacked field-effect transistor switch |
| US10068831B2 (en) | 2016-12-09 | 2018-09-04 | Qorvo Us, Inc. | Thermally enhanced semiconductor package and process for making the same |
| JP7079940B2 (en) * | 2017-01-13 | 2022-06-03 | マサチューセッツ インスティテュート オブ テクノロジー | How to Form a Multilayer Structure for Pixelized Display and a Multilayer Structure for Pixelized Display |
| US10755992B2 (en) | 2017-07-06 | 2020-08-25 | Qorvo Us, Inc. | Wafer-level packaging for enhanced performance |
| US10784233B2 (en) | 2017-09-05 | 2020-09-22 | Qorvo Us, Inc. | Microelectronics package with self-aligned stacked-die assembly |
| CN109698154B (en) * | 2017-10-20 | 2020-12-15 | 中芯国际集成电路制造(上海)有限公司 | Chip packaging method and chip packaging structure |
| CN108054200A (en) * | 2017-12-21 | 2018-05-18 | 深圳市麦思浦半导体有限公司 | A kind of manufacturing method and controller of the substrate of power device |
| CN108321081B (en) * | 2018-02-01 | 2023-05-30 | 赵中阳 | Composite substrate and manufacturing method thereof |
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| US12046505B2 (en) | 2018-04-20 | 2024-07-23 | Qorvo Us, Inc. | RF devices with enhanced performance and methods of forming the same utilizing localized SOI formation |
| US10804246B2 (en) | 2018-06-11 | 2020-10-13 | Qorvo Us, Inc. | Microelectronics package with vertically stacked dies |
| CN112534553B (en) | 2018-07-02 | 2024-03-29 | Qorvo美国公司 | RF semiconductor device and method for manufacturing the same |
| US10964554B2 (en) | 2018-10-10 | 2021-03-30 | Qorvo Us, Inc. | Wafer-level fan-out package with enhanced performance |
| US11069590B2 (en) | 2018-10-10 | 2021-07-20 | Qorvo Us, Inc. | Wafer-level fan-out package with enhanced performance |
| CN109449172A (en) * | 2018-10-16 | 2019-03-08 | 德淮半导体有限公司 | Wafer bonding method |
| CN109346495A (en) * | 2018-11-21 | 2019-02-15 | 德淮半导体有限公司 | Wafer Bonding Method |
| US11646242B2 (en) | 2018-11-29 | 2023-05-09 | Qorvo Us, Inc. | Thermally enhanced semiconductor package with at least one heat extractor and process for making the same |
| US11851325B2 (en) * | 2018-11-30 | 2023-12-26 | Taiwan Semiconductor Manufacturing Co., Ltd. | Methods for wafer bonding |
| CN113632209A (en) | 2019-01-23 | 2021-11-09 | Qorvo美国公司 | RF semiconductor device and method of manufacturing the same |
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| CN109830484B (en) * | 2019-01-28 | 2020-10-16 | 浙江大学 | A kind of SOI structure and its manufacturing process |
| GB2602571B (en) | 2019-09-27 | 2024-07-24 | New Silicon Corp Pte Ltd | Method for fabricating a semiconductor device and the semiconductor device thereof |
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| US11923238B2 (en) | 2019-12-12 | 2024-03-05 | Qorvo Us, Inc. | Method of forming RF devices with enhanced performance including attaching a wafer to a support carrier by a bonding technique without any polymer adhesive |
| US12129168B2 (en) | 2019-12-23 | 2024-10-29 | Qorvo Us, Inc. | Microelectronics package with vertically stacked MEMS device and controller device |
| CN113066749A (en) * | 2020-01-02 | 2021-07-02 | 中国科学院上海微系统与信息技术研究所 | Multi-material coplanar heterogeneous integrated structure and preparation method thereof |
| CN111370321A (en) * | 2020-02-07 | 2020-07-03 | 中国科学院微电子研究所 | Substrate bonding method, three-dimensional integrated substrate and circuit, electronic device and chip |
| WO2022023630A1 (en) * | 2020-07-28 | 2022-02-03 | Soitec | Method for transferring a thin layer onto a support substrate provided with a charge trapping layer |
| US12482731B2 (en) | 2020-12-11 | 2025-11-25 | Qorvo Us, Inc. | Multi-level 3D stacked package and methods of forming the same |
| US20220209498A1 (en) * | 2020-12-30 | 2022-06-30 | Transwave Photonics, Llc. | Quantum cascade laser devices with improved heat extraction |
| WO2022186857A1 (en) | 2021-03-05 | 2022-09-09 | Qorvo Us, Inc. | Selective etching process for si-ge and doped epitaxial silicon |
| WO2023272558A1 (en) * | 2021-06-30 | 2023-01-05 | Yangtze Memory Technologies Co., Ltd. | Three-dimensional memory device and method for forming the same |
| US12355024B2 (en) * | 2021-11-17 | 2025-07-08 | Taiwan Semiconductor Manufacturing Co., Ltd. | Heterogenous integration scheme for III-V/Si and Si CMOS integrated circuits |
| CN116344448B (en) * | 2021-12-17 | 2025-12-09 | 苏州龙驰半导体科技有限公司 | Method for manufacturing semiconductor device and semiconductor device |
| CN114530421B (en) * | 2022-01-19 | 2025-07-01 | 中国科学院上海微系统与信息技术研究所 | A method for preparing a device and its structure |
| US20240071984A1 (en) * | 2022-08-23 | 2024-02-29 | Tokyo Electron Limited | Next generation bonding layer for 3d heterogeneous integration |
| US20240175123A1 (en) * | 2022-11-29 | 2024-05-30 | Phononics Ltd | Fusion bonding of diamond using thermal SiO2 |
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| SE469863B (en) * | 1991-10-15 | 1993-09-27 | Asea Brown Boveri | Semiconductor component, semiconductor disk for producing semiconductor component and method for producing such semiconductor disk |
| JP4027740B2 (en) * | 2001-07-16 | 2007-12-26 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
| JP2005322745A (en) * | 2004-05-07 | 2005-11-17 | Sony Corp | Semiconductor device, method for manufacturing semiconductor device, solid-state image sensor, and method for manufacturing solid-state image sensor |
| FR2888663B1 (en) * | 2005-07-13 | 2008-04-18 | Soitec Silicon On Insulator | METHOD OF REDUCING THE ROUGHNESS OF A THICK LAYER OF INSULATION |
| KR20080033341A (en) * | 2005-08-03 | 2008-04-16 | 엠이엠씨 일렉트로닉 머티리얼즈, 인크. | Strained Silicon on Insulator Structure with Improved Crystallinity in the Strained Silicon Layer |
| US7485968B2 (en) * | 2005-08-11 | 2009-02-03 | Ziptronix, Inc. | 3D IC method and device |
| JP5366517B2 (en) * | 2007-12-03 | 2013-12-11 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
| US8193071B2 (en) * | 2008-03-11 | 2012-06-05 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
| JP2010287817A (en) * | 2009-06-15 | 2010-12-24 | Shin-Etsu Chemical Co Ltd | Manufacturing method of SOI substrate with Ge film and SOI substrate with Ge film |
| US20110299166A1 (en) * | 2010-06-07 | 2011-12-08 | Aegis Lightwave, Inc. | Thermally Tunable Optical Filter with Single Crystalline Spacer Fabricated by Fusion Bonding |
| CN101901753B (en) * | 2010-06-25 | 2012-05-23 | 上海新傲科技股份有限公司 | Method for preparing thick-film material with insulating embedded layer |
| US8536021B2 (en) * | 2010-12-24 | 2013-09-17 | Io Semiconductor, Inc. | Trap rich layer formation techniques for semiconductor devices |
| JP6019599B2 (en) * | 2011-03-31 | 2016-11-02 | ソニー株式会社 | Semiconductor device and manufacturing method thereof |
| TWI509713B (en) * | 2011-03-31 | 2015-11-21 | 梭意泰科公司 | Method of forming a bonded semiconductor structure and semiconductor structure formed by the method |
| JP5417399B2 (en) * | 2011-09-15 | 2014-02-12 | 信越化学工業株式会社 | Manufacturing method of composite wafer |
| US8865507B2 (en) * | 2011-09-16 | 2014-10-21 | Sionyx, Inc. | Integrated visible and infrared imager devices and associated methods |
| US9685513B2 (en) * | 2012-10-24 | 2017-06-20 | The United States Of America, As Represented By The Secretary Of The Navy | Semiconductor structure or device integrated with diamond |
-
2015
- 2015-07-06 SG SG11201610771SA patent/SG11201610771SA/en unknown
- 2015-07-06 JP JP2017501298A patent/JP6751385B2/en active Active
- 2015-07-06 US US15/324,451 patent/US10049947B2/en active Active
- 2015-07-06 CN CN201580037075.XA patent/CN107004639B/en active Active
- 2015-07-06 WO PCT/SG2015/050198 patent/WO2016007088A1/en not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| JP2017525149A (en) | 2017-08-31 |
| CN107004639A (en) | 2017-08-01 |
| JP6751385B2 (en) | 2020-09-02 |
| US10049947B2 (en) | 2018-08-14 |
| US20170200648A1 (en) | 2017-07-13 |
| CN107004639B (en) | 2021-02-05 |
| WO2016007088A1 (en) | 2016-01-14 |
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