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SG10201804042RA - Semiconductor Memory Devices - Google Patents

Semiconductor Memory Devices

Info

Publication number
SG10201804042RA
SG10201804042RA SG10201804042RA SG10201804042RA SG10201804042RA SG 10201804042R A SG10201804042R A SG 10201804042RA SG 10201804042R A SG10201804042R A SG 10201804042RA SG 10201804042R A SG10201804042R A SG 10201804042RA SG 10201804042R A SG10201804042R A SG 10201804042RA
Authority
SG
Singapore
Prior art keywords
semiconductor memory
trench
memory devices
gate electrode
electrode portion
Prior art date
Application number
SG10201804042RA
Inventor
Kim Hui-Jung
Hee Cho Min
Kim Bong-Soo
Kim Junsoo
Yamada Satoru
Lee Wonsok
Hwang Yoosang
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of SG10201804042RA publication Critical patent/SG10201804042RA/en

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/34DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the transistor being at least partially in a trench in the substrate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311Gate electrodes for field-effect devices
    • H10D64/411Gate electrodes for field-effect devices for FETs
    • H10D64/511Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/512Disposition of the gate electrodes, e.g. buried gates
    • H10D64/513Disposition of the gate electrodes, e.g. buried gates within recesses in the substrate, e.g. trench gates, groove gates or buried gates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28088Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a composite, e.g. TiN
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/05Making the transistor
    • H10B12/053Making the transistor the transistor being at least partially in a trench in the substrate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/315DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor with the capacitor higher than a bit line
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate
    • H10B12/373DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate the capacitor extending under or around the transistor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/48Data lines or contacts therefor
    • H10B12/488Word lines
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113Isolations within a component, i.e. internal isolations
    • H10D62/115Dielectric isolations, e.g. air gaps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/021Manufacture or treatment using multiple gate spacer layers, e.g. bilayered sidewall spacers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/667Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0144Manufacturing their gate insulating layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Composite Materials (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Materials Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Non-Volatile Memory (AREA)

Abstract

Semiconductor memory devices are provided. A semiconductor memory device includes an isolation layer in a first trench and a first gate electrode portion on the isolation layer. The semiconductor memory device includes a second gate electrode portion in a second trench. In some embodiments, the second gate electrode portion is wider, in a direction, than the first gate electrode portion. Moreover, in some embodiments, an upper region of the second trench is spaced apart from the first trench by a greater distance, in the direction, than a lower region of the second trench. Related methods of forming semiconductor memory devices are also provided. FIG. 1
SG10201804042RA 2017-08-10 2018-05-14 Semiconductor Memory Devices SG10201804042RA (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020170101835A KR102358460B1 (en) 2017-08-10 2017-08-10 Semiconductor memory device and method of forming the same

Publications (1)

Publication Number Publication Date
SG10201804042RA true SG10201804042RA (en) 2019-03-28

Family

ID=65084548

Family Applications (1)

Application Number Title Priority Date Filing Date
SG10201804042RA SG10201804042RA (en) 2017-08-10 2018-05-14 Semiconductor Memory Devices

Country Status (6)

Country Link
US (3) US10615164B2 (en)
JP (1) JP7323991B2 (en)
KR (1) KR102358460B1 (en)
CN (1) CN109390340B (en)
DE (1) DE102018110956B4 (en)
SG (1) SG10201804042RA (en)

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KR102828447B1 (en) * 2019-07-02 2025-07-03 삼성전자주식회사 Semiconductor device and manufacturing method thereof
KR102686881B1 (en) * 2019-10-24 2024-07-18 삼성전자주식회사 Semiconductor device and method of manufacturing the semiconductor device
KR102768876B1 (en) * 2019-11-11 2025-02-19 삼성전자주식회사 A semiconductor device and method of manufacturing the same
CN113594237B (en) * 2020-04-30 2023-09-26 长鑫存储技术有限公司 Buried gate preparation method and semiconductor device preparation method
US11862697B2 (en) 2020-04-30 2024-01-02 Changxin Memory Technologies, Inc. Method for manufacturing buried gate and method for manufacturing semiconductor device
US11056175B1 (en) * 2020-07-28 2021-07-06 Winbond Electronics Corp. Semiconductor device and manufacturing method thereof
EP4084073A4 (en) * 2020-08-05 2023-08-30 Changxin Memory Technologies, Inc. Semiconductor structure and manufacturing method therefor
CN116113237B (en) * 2020-08-18 2024-11-15 长鑫存储技术有限公司 Memory and method for manufacturing the same
EP4086960B1 (en) * 2021-03-18 2025-10-01 Changxin Memory Technologies, Inc. Manufacturing method for semiconductor structure, and semiconductor structure
CN115988870B (en) * 2021-10-13 2025-11-21 长鑫存储技术有限公司 Method for manufacturing semiconductor structure and structure thereof
EP4475164A4 (en) * 2022-06-22 2025-06-11 Changxin Memory Technologies, Inc. Semiconductor structure and manufacturing method therefor

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Also Published As

Publication number Publication date
US10991699B2 (en) 2021-04-27
KR102358460B1 (en) 2022-02-07
US20200219885A1 (en) 2020-07-09
KR20190018085A (en) 2019-02-21
US11785761B2 (en) 2023-10-10
JP7323991B2 (en) 2023-08-09
US10615164B2 (en) 2020-04-07
US20210249417A1 (en) 2021-08-12
US20190051652A1 (en) 2019-02-14
DE102018110956A1 (en) 2019-02-14
DE102018110956B4 (en) 2021-10-07
CN109390340B (en) 2024-03-15
CN109390340A (en) 2019-02-26
JP2019036720A (en) 2019-03-07

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