RU2451408C2 - Apparatus for synchronising carrier and reference frequency in communication channel with considerable frequency instabilities and energy constraints - Google Patents

Abstract

FIELD: information technology.

SUBSTANCE: apparatus has two quadrature channels, an accumulator, a π/2 phase changer, a low-pass filter, a phase detector, an inverter, a controlled generator, an apparatus which generates a signal at the first output, which characterises the value of frequency mismatch between the received and reference signals, and at the second output - calculated mismatch frequency of the received and reference signals F, an adder, a reference signal generator and a threshold device. Each quadrature channel includes a multiplier, a band-pass filter, an analogue-to-digital converter, a digital matched filter, a squaring unit and a maximum signal detector.

EFFECT: reliable synchronisation of a transmitter and a receiver on carrier frequency in communication channels with considerable frequency instabilities and energy constraints.

1 cl, 1 dwg

Description

The invention relates to the field of radio communications and may find application in wireless access systems, fixed, land mobile and satellite communications.

Cellular and satellite communication systems using pseudo-random signals are known, namely: IS-95 standard mobile cellular communication system based on code division multiple access (CDMA) technology (in foreign terminology - CDMA); Globalstar satellite communications system (USA), SAT-CDMA (South Korea), SW-CDMA (European Space Agency - ESA) [1], as well as promising systems with CDMA, such as CDMA-450, CDMA-2000 and WCDMA. The effective functioning of these systems largely depends on the synchronous operation of their transmitting and receiving devices, which can be disrupted due to both the mutual instability of the frequencies of the transmitted and reference signals, and the Doppler effect due to the movement in space of the transmitting and receiving devices relative to each other at significant speeds .

The observed frequency instability is a serious reason that hinders the detection of transmitted signals and the subsequent synchronization of transmitting and receiving devices.

Since the signal is detected and the receiver is synchronized by the carrier and clock frequencies according to the preamble and marker, which are transmitted at the beginning of the communication session, when the carrier frequency is unstable in the communication channel, commensurate with the clock frequency of the formation of the preamble and marker F _T , parasitic signal modulation takes place at the length of the preamble and marker, which significantly degrades the characteristics of signal detection, as well as the establishment of cyclic and clock synchronization of the receiver. For example, with a relative frequency instability δ = 10 ^-7 and a carrier value f _n = 14 GHz, the absolute value of the frequency instability f _p = ± f _n · δ = ± 1.4 kHz. Then, with F _T = 7 kHz and using phase or relative phase modulation, every fifth received symbol will be erroneous (F _T / f _p = 7 / 1.4 = 5).

Such a high frequency of errors due to frequency instability at the receiver synchronization stage is unacceptable. To eliminate the frequency detuning of the received and reference signals in known systems, phase locked loop (PLL) systems are widely used. However, with small s / n relationships in the information channel and restrictions on the timing of the establishment of synchronization for a given preamble duration, the use of a PLL can be problematic. For example, let the preamble duration T _CR = 16 ms, the time to establish synchronization on the carrier frequency T _sc = 2 ms, the clock frequency of the formation of the preamble and marker F _T = 7 kHz, the required s / w ratio at the input of the PLL circuit ≥17 dB, the probability of error per bit of received information is equal to 10 ^-3 , which corresponds to the ratio s / w in the information channel 3 dB.

.Based on the dynamics of the PLL works its time constant τ must provide the completion of the transients in the circuit and the amount of time required to establish synchronization of the carrier frequency value ≤0,5T _cq. For our case, τ = 0.5T _cf = 1 ms. Then the PLL bandwidth should be

.

выше, чем в информационном канале, т.е. выше на ~8 дБ. Учитывая, что отношение с/ш в информационном канале составляет 3 дБ, отношение с/ш на входе ФАПЧ будет составлять (8+3)=11 дБ. Из приведенных расчетов следует, что отношение с/ш на входе ФАПЧ не достигает требуемого значения на 6 дБ. Следовательно, схема не обеспечивает требуемых характеристик синхронизации по несущей частоте.With these values, the s / w ratio at the PLL output will be 7 times

higher than in the information channel, i.e. ~ 8 dB higher. Given that the s / w ratio in the information channel is 3 dB, the s / w ratio at the PLL input will be (8 + 3) = 11 dB. From the above calculations it follows that the s / w ratio at the PLL input does not reach the required value of 6 dB. Therefore, the circuit does not provide the required carrier frequency synchronization characteristics.

To ensure the required synchronization quality (s / w ratio at the PLL input must be ≥17 dB), it is necessary to reduce the PLL bandwidth by 4 times, i.e. it will be 0.250 kHz. This will lead to a change in the PLL time constant τ from 1 ms to 4 ms, and the synchronization establishment time T _sc will be 8 ms, i.e. the synchronization establishment time will be half the preamble duration, i.e. there will not be enough time to solve the problems of signal detection and clock synchronization.

The aim of the present invention is to develop a device that allows for synchronization of the transmitter and receiver on the carrier frequency in multi-channel communication systems with time-division channel separation, operating in conditions of large frequency detuning of the received signals relative to the reference frequency and hard energy restrictions.

Closest to the proposed invention is a device [2, p.194, Fig.6.6], including two quadrature channels, the first of which consists of a series-connected first multiplier, a first amplifier, a first matched filter and a first quadratic detector, and the second quadrature channel from a second multiplier, a second amplifier, a second matched filter and a second quadratic detector, connected in series, as well as an adder whose output is the detector output, a phase shifter at π / 2 and g terodyne, while the first inputs of the first and second multipliers are combined and are the detector input, the local oscillator output is connected to the second input of the second multiplier and through the phase shifter on π / 2 to the second input of the first multiplier, the output of the first quadratic detector is connected to the first input of the adder, and the output the second quadratic detector - with the second input of the adder.

This goal is achieved by the fact that in the known device comprising two quadrature channels, the first of which consists of a series-connected first multiplier, a first amplifier, a first matched filter and a first quadratic detector, and a second quadrature channel - of a series-connected second multiplier, a second amplifier, the second matched filter and the second quadratic detector, as well as an adder whose output is the detector output, a phase shifter at π / 2 and a local oscillator, while the first and second multiplier inputs are combined and are the detector input, the local oscillator output is connected to the second input of the second multiplier and through the phase shifter on π / 2 to the second input of the first multiplier, the output of the first quadratic detector is connected to the first input of the adder, and the output of the second quadratic detector is with the second adder input, the following changes have been made:

the adder and the local oscillator are excluded, the first amplifier, the first matched filter and the first quadratic detector are excluded in the first quadrature channel, and the second amplifier, the second matched filter and the second quadratic detector are in the second quadrature channel, and new elements and the corresponding connections between them are introduced, and namely, in the first quadrature channel additionally introduced:

connected in series are the first band-pass filter, the input of which is connected to the output of the first multiplier, the first analog-to-digital converter, the first digital matched filter, the N outputs of which, each individually, are connected to the corresponding N inputs of the first block of quadrants, where N is the length of the pseudo-random sequence, and The N outputs of the first block of quadrators, each individually, are connected to the corresponding N inputs of the first maximum signal detector, the output of which is connected to the inverter input and to the first drive input

and into the second quadrature channel are introduced: series-connected a second band-pass filter, the input of which is connected to the output of the second multiplier, a second analog-to-digital converter, a second digital matched filter, N outputs of which, each individually, are connected to the corresponding N inputs of the second block of quadrators, and The N outputs of the second block of quadrators, each individually, are connected to the corresponding N inputs of the second maximum signal detector, the output of which is connected to the first input of the adder and to the second input th drive,

the inverter output is connected to the second input of the adder, and the drive output is connected to the first input of the threshold device, the second input of which is supplied with a threshold voltage U _then ,

the adder output is connected to the input of the digital processing device, the first output of which is connected to the first input of the controlled generator and the input of the reference signal generator, and its second output is connected to the first input of the phase detector, the second input of the phase detector is connected to the output of the reference signal generator, the output of the phase detector is a low-pass filter is connected to the second input of the controlled oscillator, the output of the controlled generator is connected to the second input of the second multiplier and to the input of the phase shifter by π / 2, the threshold output stroystva is an output device.

Distinctive features of the proposed device are new elements introduced into its circuit, namely: the first and second band-pass filters, the first and second analog-to-digital converters, the first and second digital matched filters, the first and second blocks of quadrators, the first and second maximum signal detectors, the inverter , adder, storage device, phase detector, low-pass filter, threshold device, controlled generator, digital processing device, reference signal generator, as well as the corresponding connections between it and, due to this, it is possible to ensure the detection of a signal with significant detunings in the carrier frequency, which meets the criterion of "novelty."

Since the totality of the introduced elements and their relationship to the filing date of the application in the patent and scientific literature are not found, the proposed technical solution corresponds to the "inventive step".

The block diagram of the device shown in figure 1. The numbers in figure 1 indicate:

1, 17 - band-pass filter (PF);

2, 18 - analog-to-digital converter (ADC);

3, 19 - digital matched filter (CSF);

4, 20 - block of quadrators (BC);

5, 21 - maximum signal detector (VHI);

6, 11 - multiplier (P);

7 - phase shifter (PV);

8 - low-pass filter (low-pass filter);

9 - phase detector (PD);

10 - inverter (I);

12 - controlled generator (UG);

13 - digital processing device (UCO);

14 - adder (C);

15 - drive (N);

16 - threshold device (PU);

22 - reference signal generator (GOS).

The operation of the device is considered in the structural diagram, which is presented in figure 1, under the following conditions:

1. The input signal has the following structure: a preamble, followed by a marker, then service and control information, and finally a sequence of channel intervals for placing information of users of the communication network.

2. Synchronization received carrier ω ω _n and a reference frequency _of the reception side is carried out by the information contained in preamble signal. The preamble is an interval of a certain duration T _ol filled with a carrier frequency ω _n , which is modulated by a meander (a meander is a sequence of bipolar pulses, the repetition rate of which sets the clock frequency F _{t of} subsequent information and service messages).

3. To ensure synchronization in the communication network, for code separation of channels (signals), as well as to increase noise immunity, the input signal is additionally encoded by a periodic pseudo-random sequence (PSP) (as applied to the preamble, two pseudo-random sequences are added modulo two to the sequence of unipolar preamble pulses). To ensure undistorted convolution of the SRP in the digital matched filter, the length of the SRP N is chosen to be equal to or less than the preamble clock.

4. The value of the threshold signal in the control panel (16) is selected based on the requirements for the probabilities of missing the signal and false alarm.

Let the input of the device (the first inputs of the first (6) and second (11) П) receive a preamble signal of the form

where A _m is the signal amplitude;

ω _n is the angular carrier frequency;

ψ = (ψ _о + απ) is the phase of the signal;

ψ _about - the initial phase of the signal;

απ is the phase increment determined by the elements of the SRP;

α - coefficient taking values 0 or 1, depending on the elements of the SRP;

,n (t) is the normal Gaussian noise with a variance of σ ² and zero expectation, i.e.

,

and the second inputs P (6) and (11) receive a signal from UG (12), and the second input P (11), the signal from UG (12) comes directly and has the form cos (ω _o t), and the second input P (6) - through PV (7) and has the form sin (ω _o t).

In the multipliers (6) and (11), the signals are multiplied and two quadrature components appear at their outputs, namely: at the output P (11), a component of the form

and at the output P (6) a component of the form

The components of the total frequency are suppressed by PF (1) and (17), and the components of the difference frequency freely pass through these filters and are fed to the corresponding ADC inputs (2) and (18). The signal at the input of the ADC (18) has the form

and at the input of the ADC (2)

where Δω is the mismatch of the received carrier and reference frequencies.

In the ADC (2) and (18), the difference frequency signal is converted to digital form, i.e. the analog input value is converted to the corresponding number. At the output of the ADC (18), the signal has the form

and at the output of the ADC (2) -

where i is the sequence number of the sample on the bandwidth interval. Moreover, i takes values from 1 to L, a L≥2N, where N is the number of elements of the SRP;

n (t _i ) is the noise component with parameters:

The signals from the outputs of the ADC (2) and (18) in digital form are fed to the inputs of the CSF (3) and (19), respectively. In CSF (3) and (19), the signal is compressed and at each nth output (n takes values from 1 to N), samples of the correlation function (CCF) of the SRP with a period of N are formed, moreover, at one of the n outputs of the CSF (2 ) and (18) there is a reading of the maximum level corresponding to the maximum value of VKF, and the remaining outputs contain samples of lateral emissions of VKF mixed with noise, which, as a rule, exceeds the value of side emissions of VKF [3]. Given the expressions (1) and (2), the countdown of the maximum level at the output of the CSF (19) for the j-th PSP has the form

and at the output of the CSF (3)

- порядковый номер ПСП из общего числа ПСП М, отведенных для установления синхронизации по несущей частоте.Where

- serial number of the SRP from the total number of SRP M allocated for establishing synchronization on the carrier frequency.

Counts from each of the n outputs of the CSF (3) and (19) once per period of the SRP are received at the corresponding nth inputs of the blocks of quadrators (4) and (20).

In BC (4) and (20), the received signals are squared and at one of the N outputs of each BC there appears a maximum level power reading corresponding to the maximum VKF value for one SRP period, and on the remaining (N-1) outputs - power readings, corresponding to the side emission counts of VKF together with noise.

Taking into account expression (3), the maximum value of the power reading at one of the outputs of the BC (20) will have the form

, a (Δωt_j+ψ_j)=(2πFt_j+ψ_j)=Ф_j, где F - величина рассогласования по частоте принятой несущей и опорной частот, выражение (5) будет иметь видGiven that

, a (Δωt _j + ψ _j ) = (2πFt _j + ψ _j ) = Ф _j , where F is the frequency mismatch of the received carrier and reference frequencies, expression (5) will have the form

, a (Δωt_j+ψ_j)=(2πFt_j+ψ_j)=Ф_j, будет иметь видAnd the maximum value of the power reading at one of the outputs of the BC (4), taking into account the expression (4) and, given that

, a (Δωt _j + ψ _j ) = (2πFt _j + ψ _j ) = Ф _j , will have the form

The power samples from each of the n outputs of the BC (4) and (20) are supplied to the corresponding nth inputs of the VHI (5) and (21). In the VHI (5) and (21) of the N received power samples, the maximum sample is selected. The selected maximum countdown from the output of the VHI (5) is fed to the first input of the drive (15) and to the input of the inverter (10). The inverter (10) changes the sign of the incoming signal and directs it to the second input of the adder (14). The selected maximum countdown from the output of the VHI (21) goes to the second input of the drive (15) and to the first input of the adder (14). In the adder (14), the formation of samples of the differences of the signals of the quadrature channels

с учетом оговоренных выше характеристик шумовой составляющей n(t) будет иметь видThen expectation

taking into account the above characteristics of the noise component n (t) will be

поступают на вход устройства цифровой обработки (13). УЦО (13) выполняет функцию спектроанализатора на основе алгоритма быстрого преобразования Фурье (т.е. реализует гребенку узкополосных фильтров с полосой пропускания каждого фильтра Δf_фг, величина которой определяется требованиями к разрешающей способности и точности спектрального анализа) [4]. На первом выходе УЦО (13) появляется сигнал, характеризующий величину рассогласования принимаемого и опорного сигналов по частоте. Величина рассогласования по частоте F определяется значением второй гармоники рассогласования принимаемого и опорного сигналов, которое определяется в УЦО (13).Difference Counts

arrive at the input of the digital processing device (13). UCO (13) performs the function of a spectrum analyzer based on the fast Fourier transform algorithm (that is, it implements a comb of narrow-band filters with a passband of each filter Δf _fg , the value of which is determined by the requirements for resolution and accuracy of spectral analysis) [4]. At the first output of the UCO (13), a signal appears that characterizes the frequency mismatch between the received and reference signals. The magnitude of the frequency mismatch F is determined by the value of the second harmonic of the mismatch between the received and reference signals, which is determined in the UCO (13).

Information about the size of the mismatch from the first output of the UCO (13) is fed to the first input of the controlled generator (12) and to the input of the reference signal generator (22). The signal received at the first input of the UG (12) adjusts its frequency in accordance with the received carrier (“rough” setting). "Rough tuning" leads to a decrease in the frequency detuning of the received and reference signals to Δf _fg / 2.

The signal received at the input GOS (22), sets the value of its reference frequency f _op corresponding to the magnitude of the frequency detuning F, which is fed to the first input of the PD (9). The second input of the PD (9) from the second output of the UCO (13) is supplied with the calculated frequency of the mismatch between the received and reference signals F. The PD compares f _op and F, and the comparison result is transmitted through the low-pass filter (8) to the second input of the UG (12) and eliminates the remainder of the frequency detuning (“fine” tuning).

Since the signal receiver is incoherent, the displacement of the signals along the initial phase ψ can be neglected.

The necessary mathematical justification of the operation algorithm of the UCO and the calculation of the estimate of the discrepancy between the frequencies of the received and reference signals F is presented below.

In the accumulator (15), the power samples of the maximum level of the quadrature channels are summed up and accumulated.

с учетом оговоренных выше характеристик шумовой составляющей n(t) будет иметь видExpected value

taking into account the above characteristics of the noise component n (t) will be

The accumulation result is continuously fed to the first input of the threshold device (16). The second input of the control unit (16) is supplied with a threshold signal U _then . Upon reaching

PU output (16) is formed U _O signal, which signals that the frequency detuning of the received signal and the reference is resolved.

The estimation of the parameter characterizing the magnitude of the mismatch in frequency of the received carrier and the reference signal will be carried out using the least squares method [5]. For our case, this method takes the form

;

- математические ожидания максимальных значений отсчетов мощности на выходах блоков квадраторов (20) и (4) соответственно.Where

;

- mathematical expectations of the maximum values of power readings at the outputs of the blocks of quadrators (20) and (4), respectively.

;

с учетом выражений (6) и (7) и оговоренных выше характеристик шумовой составляющей n(t) будут иметь видMathematical Expectations

;

taking into account expressions (6) and (7) and the above characteristics of the noise component n (t) will have the form

In view of (13), expressions (12) take the form

To find the minimum of expression (14), we equate to zero the partial derivatives with respect to the parameter cos2Ф _j

It follows from (15) that

After simple algebraic transformations, expression (16) takes the form

From a comparison of expressions (9) and (17), it follows that our algorithm for processing the difference in the maximum responses of quadrature channels in UCO (13) allows us not only to calculate the value of the parameter characterizing the size of the mismatch between the received carrier and reference frequencies, but also provides an optimal estimate of this parameter.

An assessment of the functionality of the claimed device will be carried out under the following conditions: spectrum width of the input broadband signal (BPS) ΔF _bps = 16.384 MHz; the length of the SRP N = 2048 elements; preamble duration T _CR = 16 ms; the time to establish synchronization on the carrier frequency T _cf = 2 ms; relative frequency instability δ = 10 ^-7 ; the carrier frequency f _n = 14 GHz, the s / w ratio at the PLL input (PD (9)) ≥17 dB, and in the data channel - 3 dB.

Under these conditions, the maximum value of the absolute instability of the received carrier frequency and the frequency of the controlled generator (12) will be f _p = f _{n *} δ = 1.4 kHz.

Since the size of the mismatch between the received carrier frequency and the frequency of the controlled oscillator (12) is determined by the value of the selected UCO (13) of the second harmonic of the frequency mismatch (see expression 9), the maximum interval of instability (total frequency mismatch) ΔF _p = 2f _p and will be 2.8 kHz

. В свою очередь, полоса пропускания ФАПЧ ΔF_ФАП ограничивает полосу пропускания узкополосных фильтров гребенки, т.е. Δf_фг≤ΔF_ФАП, кроме того, для обеспечения требуемого отношения с/ш на входе ФАПЧ, как было рассчитано ранее, величина Δf_фг не может быть >250 Гц. Пусть Δf_фг=250 Гц, тогда число узкополосных фильтров m в составе гребенки УЦО (13), перекрывающих весь диапазон расстройки ΔF_p, должно бытьThe PLL bandwidth is determined by the timing of the establishment of synchronization on the carrier frequency T _MF and will be

. In turn, the PLL bandwidth ΔF _FAP restricts bandwidth narrowband filterbank, i.e. Δf _fg ≤ΔF _FAP , in addition, to ensure the required ratio s / w at the input of the PLL, as was previously calculated, the value Δf _fg cannot be> 250 Hz. Let Δf _fg = 250 Hz, then the number of narrow-band filters m in the UCO comb (13), covering the entire range of detuning ΔF _p , should be

m = ΔF _p / Δf _fg = 2.8 / 0.25≅11.

It is known [6] that, when implementing the spectrum analysis function based on the fast Fourier transform algorithm, the required number of filters m is determined by the expression 2 ⁿ , where n takes values 1, 2, 3, .... For our case, n = 4, m = 16.

It is also known [6] that for sufficiently accurate reconstruction of a signal with a limited spectrum from its samples, it is necessary that the sample repetition rate (sampling rate) f _d > 2f _m , where f _m is the highest frequency of the restored signal.

The value of the sample repetition rate f _d for our case is determined from the following reasoning: on the interval of the preamble duration T _CR = 16 ms, 128 SRP periods with a duration of N = 2048 elements will fit

(ΔF _PNS · T _ave) / N = (16348000 · 0.016) / 2048 = 128,

and on the time interval for establishing synchronization T _sc = 2 ms - 16 periods of memory bandwidth, i.e. 16 response matched filters (16 samples). Therefore, f _d = 16 / T _cf = _16/2 · 10 ^-3 = 8000 Hz.

The highest frequency of the restored signal f _m is nothing other than the value of the second harmonic frequency with the maximum mismatch between the received carrier frequency and the frequency of the controlled oscillator (12), i.e. f _m = 2F = 2800 Hz, and 2f _m = 5600 Hz. Consequently, f _d exceeds 2f _m

From the above it follows that the proposed technical solution has advantages over the prototype, since it allows you to eliminate the frequency mismatch with restrictions on the timing of the establishment of synchronization T _SCH and for a given preamble duration.

Information sources

1. New standards for broadband radio communications based on W-CDMA technology, M .: International Center for Scientific and Technical Information, 1999. (pp. 38-58).

2. Alekseev A.I., Sheremetyev A.G., Tuzov G.I., Glazov B.I. Theory and application of pseudo-random signals. - M.: Publishing House "Science", 1969. - 367 p.

3. Varakin L.E. Theory of complex signals. - M .: Soviet Radio, 1970 .-- 375 p.

4. Digital filters and signal processing devices on integrated circuits: Reference manual / FB Vysotsky, V.I. Alekseev, V.N. Pachin and others; Ed. B.F. Vysotsky. - M .: Radio and communications, 1984. - 216 p.

5. Tikhonov V.I. Statistical radio engineering. - 2nd ed., Revised. and add. - M .: Radio and communications, 1982. - 624 p.

6. Introduction to digital filtering. Ed. R. Borger and A. Konstandinidis. Per. from English under the editorship of L.I. Filippova. - M.: “World”, 1976. - 216 p.

Claims (1)

A carrier and reference frequency synchronization device in a communication channel with significant frequency instabilities and energy restrictions, which includes two quadrature channels and a π / 2 phase shifter, the first quadrature channel consisting of the first multiplier and the second quadrature channel of the second multiplier, the first inputs of the first and second multipliers are combined and are the input of the synchronization device, the output of the phase shifter at π / 2 is connected to the second input of the first multiplier, characterized in that in the first quadrature filter, the input of which is connected to the output of the first multiplier, the first analog-to-digital converter, the first digital matched filter, the N outputs of which, each individually, are connected to the corresponding N inputs of the first block of quadrants, where N is the length of the pseudo-random sequence, and N outputs of the first block of quadrators, each individually, are connected to the corresponding N inputs of the first detector of the maximum signal, the output to It is connected to the input of the inverter and to the first input of the drive, and a second band-pass filter is connected in series to the second quadrature channel, the input of which is connected to the output of the second multiplier, the second analog-to-digital converter, and the second digital matched filter, N outputs of which each, connected to the corresponding N inputs of the second block of quadrators, and N outputs of the second block of quadrators, each separately, connected to the corresponding N inputs of the second detector of the maximum signal, the output of which is connected to the first input of the adder and to the second input of the drive, the inverter output is connected to the second input of the adder, and the output of the drive is connected to the first input of the threshold device, the second input of which is supplied with a threshold voltage U _then , the output of the adder is connected to the input of the means at the first output, a signal characterizing the magnitude of the mismatch of the received and reference signals in frequency, and at the second output, the calculated mismatch frequency of the received and reference signals F, and its first output One is connected to the first input of the controlled generator and the input of the reference signal generator, and its second output is connected to the first input of the phase detector, the second input of the phase detector is connected to the output of the reference signal generator, the output of the phase detector through a low-pass filter is connected to the second input of the controlled generator, the output is controlled generator is connected to the second input of the second multiplier and to the input of the phase shifter at π / 2, the output of the threshold device is the output of the synchronization device.