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PL203827A1 - COMBINED INJECTOR SYSTEM - Google Patents

COMBINED INJECTOR SYSTEM

Info

Publication number
PL203827A1
PL203827A1 PL20382778A PL20382778A PL203827A1 PL 203827 A1 PL203827 A1 PL 203827A1 PL 20382778 A PL20382778 A PL 20382778A PL 20382778 A PL20382778 A PL 20382778A PL 203827 A1 PL203827 A1 PL 203827A1
Authority
PL
Poland
Prior art keywords
injector system
combined injector
combined
injector
Prior art date
Application number
PL20382778A
Other languages
Polish (pl)
Other versions
PL119495B1 (en
Inventor
Artases R Nazarjan
Vjaceslav J Kremlev
Vil Jam N Kokin
Viktor I Sladkov
Boris V Venkov
Vadim V Lavrov
Original Assignee
Artases R Nazarjan
Kremlev V J
Vil Jam N Kokin
Viktor I Sladkov
Boris V Venkov
Vadim V Lavrov
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from SU772441385A external-priority patent/SU602055A1/en
Priority claimed from SU772537101A external-priority patent/SU646391A1/en
Application filed by Artases R Nazarjan, Kremlev V J, Vil Jam N Kokin, Viktor I Sladkov, Boris V Venkov, Vadim V Lavrov filed Critical Artases R Nazarjan
Publication of PL203827A1 publication Critical patent/PL203827A1/en
Publication of PL119495B1 publication Critical patent/PL119495B1/en

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311Gate electrodes for field-effect devices
    • H10D64/411Gate electrodes for field-effect devices for FETs
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/091Integrated injection logic or merged transistor logic
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/09403Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using junction field-effect transistors
    • H03K19/09414Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using junction field-effect transistors with gate injection or static induction [STIL]
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/09403Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using junction field-effect transistors
    • H03K19/09418Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using junction field-effect transistors in combination with bipolar transistors [BIFET]
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0952Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using Schottky type FET MESFET
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/213Channel regions of field-effect devices
    • H10D62/221Channel regions of field-effect devices of FETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/40Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
    • H10D84/401Combinations of FETs or IGBTs with BJTs
    • H10D84/403Combinations of FETs or IGBTs with BJTs and with one or more of diodes, resistors or capacitors
    • H10D84/409Combinations of FETs or IGBTs with lateral BJTs and with one or more of diodes, resistors or capacitors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/211Design considerations for internal polarisation
    • H10D89/213Design considerations for internal polarisation in field-effect devices
    • H10D89/217Design considerations for internal polarisation in field-effect devices comprising arrangements for charge injection in static induction transistor logic [SITL] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Logic Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Junction Field-Effect Transistors (AREA)
PL1978203827A 1977-01-06 1978-01-05 Intergrated injector circuit PL119495B1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
SU772441385A SU602055A1 (en) 1977-01-06 1977-01-06 Integral logic element
SU772537101A SU646391A1 (en) 1977-11-01 1977-11-01 Field-effect transistor
SU2537006 1977-11-11

Publications (2)

Publication Number Publication Date
PL203827A1 true PL203827A1 (en) 1978-10-23
PL119495B1 PL119495B1 (en) 1982-01-30

Family

ID=27356306

Family Applications (1)

Application Number Title Priority Date Filing Date
PL1978203827A PL119495B1 (en) 1977-01-06 1978-01-05 Intergrated injector circuit

Country Status (9)

Country Link
JP (1) JPS53108291A (en)
CH (1) CH616276A5 (en)
CS (1) CS199407B1 (en)
DD (1) DD136907A1 (en)
DE (1) DE2800335A1 (en)
FR (1) FR2377123A1 (en)
GB (1) GB1565918A (en)
NL (1) NL7800046A (en)
PL (1) PL119495B1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5540051A (en) * 1978-09-12 1980-03-21 Mitsubishi Electric Corp T-joint and production thereof
JPS573651Y2 (en) * 1979-10-08 1982-01-22
GB2130790B (en) * 1982-10-26 1986-04-16 Plessey Co Plc Integrated injection logic device

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2321796C2 (en) * 1973-04-30 1982-07-29 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Field effect transistor
JPS5811102B2 (en) * 1975-12-09 1983-03-01 ザイダンホウジン ハンドウタイケンキユウシンコウカイ semiconductor integrated circuit

Also Published As

Publication number Publication date
JPS53108291A (en) 1978-09-20
FR2377123A1 (en) 1978-08-04
FR2377123B1 (en) 1980-05-16
PL119495B1 (en) 1982-01-30
NL7800046A (en) 1978-07-10
CS199407B1 (en) 1980-07-31
CH616276A5 (en) 1980-03-14
DE2800335A1 (en) 1978-07-13
GB1565918A (en) 1980-04-23
DD136907A1 (en) 1979-08-01

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