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KR940001148B1 - 반도체 패키지 - Google Patents

반도체 패키지 Download PDF

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KR940001148B1
KR940001148B1 KR1019910006052A KR910006052A KR940001148B1 KR 940001148 B1 KR940001148 B1 KR 940001148B1 KR 1019910006052 A KR1019910006052 A KR 1019910006052A KR 910006052 A KR910006052 A KR 910006052A KR 940001148 B1 KR940001148 B1 KR 940001148B1
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semiconductor package
pad
chip
inner lead
pattern
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KR920020652A (ko
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윤진현
권오식
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삼성전자 주식회사
김광호
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Priority to KR1019910006052A priority Critical patent/KR940001148B1/ko
Priority to US07/778,451 priority patent/US5281759A/en
Priority to JP3275281A priority patent/JPH0831491B2/ja
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    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
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Abstract

내용 없음.

Description

반도체 패키지
제1도의 (a)는 종래의 리이드 프레임을 나타낸 평면도.
제1도의 (b)는 종래의 반도체 패키지를 나타낸 단면도.
제2도는 이 발명에 따른 반도체 패키지의 단면도.
제3도는 이 발명에 따른 반도체 패키지의 절연체를 나타낸 평면도.
제4도의 (a)(b)는 이 발명에 따른 반도체 패키지의 동박패턴 예를 나타낸 평면도.
제5도의 (a)(b)는 이 발명에 따른 반도체 패키지의 절연체에 동박패턴을 형성한 상태의 평면도이다.
* 도면의 주요부분에 대한 부호의 설명
10 : 패턴 11 : 절연체
12 : 패드 13 : 인너리이드
14 : 칩 15 : 리이드
16 : 서포트바 17 : 지지부
18 : 탑재부 18a : 관통공
19 : 연결부 19a : 슬롯트
본 발명은 반도체 패키지가 고집적화, 고밀도화 됨에 따라 리이드의 수가 증가하 고 칩사이즈가 커지는 것에 대응하여 와이어 본딩 능률을 향상시킬 수 있는 반도체 패키지에 관한 것이다.
종래의 반도체 패키지는 제1도의 (a)(b)에 나타낸 바와 같이 리이드 프레임 (1)을 구성함에 있어서, 중앙부에 형성된 패드(2)의 사방으로 리이드(3)들을 형성되게 함으로써 고집적화 또는 고밀도화 되는 칩을 대응하여 리이드(3)의 수를 증가시켰던 것이다. 그리고 상기 패드(2)상에 접착제등으로 부착된 반도체 칩(4)과 상기 리이드(3)들이 와이어 본딩되는 것으로, 이때 반도체 칩(4)이 고집적화 또는 고밀도화되는 것에 의해 반도체 칩(4)이 커지게 되고 이에 따라 리이드(3)의 수도 증가하게 되는데 한정된 크기의 리이드프레임(1)에 대형화되는 반도체 칩(4)을 탑재하기 위해서는 이 반도체 칩(4)이 부착되는 패드(2)의 크기가 더욱 커져야 하고, 리이드(3)의 수를 증가시키기 위해서는 리이드(3)의 끝단과 패드(2)와의 간격을 늘려야만 했던 것이다. 따라서 종래에는 패드(2)가 커지는 것에 의해 반도체 패키지(5)가 대형화되는 문제점이 있었고, 한정된 공간에 많은 리이드(3)가 형성되므로 리이드(3)간의 폭이 매우 좁아 가공치수여유가 없다.
또한 리이드(3)의 수를 증가하기 위해 패드(2)와의 사이가 멀어지게 됨에 따라 와이어본딩길이가 연장되기 때문에 와이어 본딩능률이 저하됨과 동시에 취약점이 발생하였고, 본딩된 와이어가 처짐등의 변형에 의해 단락 및 주변와이어와 접촉되는 등의 신뢰성을 저하시키는 문제가 발생하였던 것이다.
이 발명은 상기의 문제점을 해결하기 위한 것으로, 이 발명의 목적은 증가되는 리이드의 형성이 용이하게 함으로써 고집적화 또는 고밀도화되는 반도체 칩에 적합하고, 상기 리이드가 패드와 근접되게 형성될 수 있게 하여 와이어의 본딩능률을 형성시킬 수 있게 함으로써 신뢰도를 향상시킬 수 있는 반도체 패키지를 제공함에 있다.
상기의 목적을 달성하기 위한 이 발명의 특징은, 패드상에 반도체 칩을 부착하고 이 칩과 리이드의 인너리이드부를 와이어 본딩하여 패키지 몰딩하는 반도체 패키지에 있어서, 지지부와 탑재부를 연결부로서 연결하여 일체로 형성한 절연체상에 패드와 인너리이드를 서포트바로서 연결한 패턴이 형성되고, 상기 인너리이드가 리이드에 연결되어 패키지몰딩된 반도체 패키지에 있다.
이하, 이 발명에 따른 실시예를 첨부도면에 의하여 상세하게 설명한다. 제2도 내지 제5도의 (a)(b)는 이 발명에 따른 반도체 패키지를 나타낸 것으로, 제2도에서와 같이 절연체(11)상에 전해동박 또는 압연동박으로 형성되어 패드(12)와 인너리이드 (13)로 이루어진 패턴(10)이 직접 형성되고, 상기 패턴(10)의 패드(12)상에 칩(14)이 부착되며, 상기 패턴(10)의 인너리이드(13)는 리이드(15)와 용접 또는 이방성수지의 접착제로 연결된다. 또한 패턴(10)의 패드(12)와 인너리이드(13)는 다수의 서포트바(16)로 연결된 것으로서 인너리이드(13)보다 패드(12)가 낮은 위치가 되도록 다운셋(Down Set)되어 있고, 인너리이드(13)와 칩(14)이 와이어 본딩되어 패키지 몰딩된 구성이다.
한편, 제3도에서와 같이, 절연체(11)는 지지부(17)와 탑재부(18)가 연결부(1 9)로 연결된 것으로, 상기 탑재부(18)에 다수의 관통공(18a)이 형성되고, 상기 지지부 (17)와 탑재부(19)사이사이에 다수의 슬롯트(19a)가 형성된다.
또한, 제4도의 (a)(b)에서와 같이, 패턴(10)은 리이드(15)와 용접 또는 접착제로서 연결되는 인너리이드(13)와 칩(14)이 부착되는 패드(12)가 서포트바(16)로서 연결된 것으로, 상기 패드(12) 및 서포트바(16)상에 은(Ag)(도시않음)이 도금되고, 제3도의 (a)와 (b)는 각각 다른 형태의 패턴을 나타낸 것이다.
이와 같은 이 발명은 절연체(11)상에 칩(14)이 부착되는 패드(12) 및 상기 칩과 와이어 본딩 하기 위한 인너리이드(13)가 패턴화되어 직접 형성되기 때문에 다수의 인너리이드(13)를 형성함에 있어 인너리이드(13)의 폭 또는 간격을 더욱 좁게 형성하는 것이 가능하게 되어 인너리이드(13)의 수를 더욱 증대시킬 수 있고, 절연체(11)에 고정되는 것이므로 인너리이드(13)가 흔들리거나 주변의 인너리이드(13)와 접촉될 염려가 없다. 또한 인너리이드(13)보다 패드(12)가 낮은 위치에 오도록 절연체(11)의 연결부(19) 및 패턴(10)의 서포트바(16)를 다운 셋하였기 때문에 와이어 본딩길이가 짧아져 와이어 본딩시 작업이 용이해짐과 동시에 구조적 안정성 및 효율성이 있고, 칩(14)의 모서리부에 와이어가 접촉될 염려가 없다. 또한 절여체(11)의 탑재부(18)에 형성된 관통공(18a)에 의해서는 패턴(10)과 절연체(11)와의 열팽창 차이에 다른 스트레스를 감소시킬 수 있게 된다.
이상에서와 같이 이 발명에 따른 반도체 패키지에 의하면, 칩이 부착되는 패드와, 상기 칩과 와이어 본딩되는 인너리이드가 절연체상에 직접 패턴화되어 형성되므로 패드 및 인너리이드의 설계가 용이하고, 인너리이드와 패드 사이를 리세트하여 와이어 본딩 길이가 짧아지게 되므로 와이어 본딩능률 및 구조적 안정성이 향상되는 효과가 있다.

Claims (7)

  1. 패드상에 반도체 칩을 부착하고 이 칩과 리이드의 인너리이드부를 와이어 본딩하여 패키지 몰딩하는 반도체 패키지에 있어서, 지지부(17)와 탑재부(18)를 연결부(19)로서 연결하여 일체로 형성한 절연체(11)상에 칩이 부착되는 패드(12)와, 상기 칩과 와이어 본딩되는 인너리이드(13)를 서포트바(16)로서 연결한 패턴(10)이 형성되고, 상기 인너리이드(13)가 리이드(15)에 연결되어 패키지 몰딩됨을 특징으로 하는 반도체 패키지.
  2. 제1항에 있어서, 상기 절연체(11)의 탑재부(18)에 다수의 관통공(18a)이 형성되는 반도체 패키지.
  3. 제1항에 있어서, 상기 절연체(11)의 탑재부(18)와 지지부(17)사이에 다수의 슬롯트(19a)가 형성되는 반도체 패키지.
  4. 제1항에 있어서, 상기 패턴(10)은 전해동박 또는 압연동박으로 되는 반도체 패키지.
  5. 제4항에 있어서, 상기 패턴(10)의 패드(12)와 서포트바(16)상에 은이 도금되는 반도체 패키지.
  6. 제1항에 있어서, 절연체(11)의 연결부(19)가 일변에 대하여 다수개 형성되는 반도체 패키지.
  7. 제1항에 있어서, 상기 패턴(10)의 인너리이드(13)가 리이드(15)와 용접 또는 이방성 수지로 연결되는 반도체 패키지.
KR1019910006052A 1991-04-16 1991-04-16 반도체 패키지 Expired - Lifetime KR940001148B1 (ko)

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Application Number Priority Date Filing Date Title
KR1019910006052A KR940001148B1 (ko) 1991-04-16 1991-04-16 반도체 패키지
US07/778,451 US5281759A (en) 1991-04-16 1991-10-15 Semiconductor package
JP3275281A JPH0831491B2 (ja) 1991-04-16 1991-10-23 半導体パッケージ

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KR1019910006052A KR940001148B1 (ko) 1991-04-16 1991-04-16 반도체 패키지

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KR940001148B1 true KR940001148B1 (ko) 1994-02-14

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US4513355A (en) * 1983-06-15 1985-04-23 Motorola, Inc. Metallization and bonding means and method for VLSI packages
US4925024A (en) * 1986-02-24 1990-05-15 Hewlett-Packard Company Hermetic high frequency surface mount microelectronic package
US4891687A (en) * 1987-01-12 1990-01-02 Intel Corporation Multi-layer molded plastic IC package
US4761518A (en) * 1987-01-20 1988-08-02 Olin Corporation Ceramic-glass-metal packaging for electronic components incorporating unique leadframe designs
JPH0783036B2 (ja) * 1987-12-11 1995-09-06 三菱電機株式会社 キヤリアテープ
US4897508A (en) * 1988-02-10 1990-01-30 Olin Corporation Metal electronic package
JPH0290553A (ja) * 1988-09-28 1990-03-30 Hitachi Ltd 半導体パッケージ
US5041396A (en) * 1989-07-18 1991-08-20 Vlsi Technology, Inc. Reusable package for holding a semiconductor chip and method for reusing the package
US5025114A (en) * 1989-10-30 1991-06-18 Olin Corporation Multi-layer lead frames for integrated circuit packages
US5012323A (en) * 1989-11-20 1991-04-30 Micron Technology, Inc. Double-die semiconductor package having a back-bonded die and a face-bonded die interconnected on a single leadframe

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KR920020652A (ko) 1992-11-21
JPH0831491B2 (ja) 1996-03-27
US5281759A (en) 1994-01-25

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