KR900001817B1 - 저항 수단을 이용한 씨 모스 티티엘 인푸트 버퍼 - Google Patents
저항 수단을 이용한 씨 모스 티티엘 인푸트 버퍼 Download PDFInfo
- Publication number
- KR900001817B1 KR900001817B1 KR1019870008475A KR870008475A KR900001817B1 KR 900001817 B1 KR900001817 B1 KR 900001817B1 KR 1019870008475 A KR1019870008475 A KR 1019870008475A KR 870008475 A KR870008475 A KR 870008475A KR 900001817 B1 KR900001817 B1 KR 900001817B1
- Authority
- KR
- South Korea
- Prior art keywords
- voltage
- buffer
- input
- point
- mos
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018507—Interface arrangements
- H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0008—Arrangements for reducing power consumption
- H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Power Engineering (AREA)
- Logic Circuits (AREA)
Abstract
Description
Claims (3)
- 씨 모스 티티엘 인푸트 버퍼에 있어서, 제1버퍼(150) 일측에 외부의 공급전원(VCC)을 제공하는 제1공급 전원(200)과 외부의 공급전원(VCC)을 저항(RVCC)을 통하여 제공하는 제2공급전원(300)을 , 타측에 제3공급전원(450)을 제공하게 하여 제1버퍼부(1000)를 이루고, 제1버퍼부(1000) 출력을 받는 제2버퍼(500) 일측에 제1공급전원(600)을 타측에는 저항(RVSS)을 통하여 외부의 접지전원(700)에 연결한 제2공급전원(700)과 제3공급전원(800)을 제공하게하여 제2 버퍼부(2000)를 이루게하여 외부의 공급전원과 접지전원에 저항(RVCC),(RVSS)을 개재시켜서 됨을 특징으로하는 저항수단을 이용한 씨 모스-티티엘 인푸트 버퍼.
- 제1항에 있어서, 제2공급전원(300)을 P모스(TR1)(TR2)와 N모스(TR3)(TR4)(TR5)(TR6)로 구성된 제1버퍼(150)의 P모스(TR|1)의 소오스에 인가하여서 된 저항수단을 이용한 씨 모스 티티엘 인푸트 버퍼.
- 제1항에 있어서 제2공급전원(700)을 P모스(TR7)(TR8)와 N모스(TR9)(TR10)로 구성된 제2버퍼(500)의 N모스(TR9)의 소오스에 인가하여서 된 저항수단을 이용한 씨 모스 티티엘 인푸트 버퍼.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019870008475A KR900001817B1 (ko) | 1987-08-01 | 1987-08-01 | 저항 수단을 이용한 씨 모스 티티엘 인푸트 버퍼 |
| US07/225,848 US4929852A (en) | 1987-08-01 | 1988-07-29 | TTL to CMOS input buffer circuit |
| JP63190499A JPH021613A (ja) | 1987-08-01 | 1988-07-29 | 抵抗手段を利用したc−mosttlインプットバッファー |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019870008475A KR900001817B1 (ko) | 1987-08-01 | 1987-08-01 | 저항 수단을 이용한 씨 모스 티티엘 인푸트 버퍼 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR890004499A KR890004499A (ko) | 1989-04-22 |
| KR900001817B1 true KR900001817B1 (ko) | 1990-03-24 |
Family
ID=19263517
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019870008475A Expired KR900001817B1 (ko) | 1987-08-01 | 1987-08-01 | 저항 수단을 이용한 씨 모스 티티엘 인푸트 버퍼 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US4929852A (ko) |
| JP (1) | JPH021613A (ko) |
| KR (1) | KR900001817B1 (ko) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5107144A (en) * | 1989-03-03 | 1992-04-21 | Nec Corporation | Integrated circuit having field effect transistors |
| US5320094A (en) * | 1992-01-10 | 1994-06-14 | The Johns Hopkins University | Method of administering insulin |
| EP0557668A1 (en) * | 1992-02-26 | 1993-09-01 | International Business Machines Corporation | Low power TTL/CMOS receiver circuit |
| US5287517A (en) * | 1992-04-24 | 1994-02-15 | Digital Equipment Corporation | Self-compensating voltage level shifting circuit |
| JPH06209252A (ja) * | 1992-09-29 | 1994-07-26 | Siemens Ag | Cmos入力段 |
| US5508653A (en) * | 1993-09-29 | 1996-04-16 | Acc Microelectronics Corporation | Multi-voltage circuit arrangement and method for accommodating hybrid electronic system requirements |
| US5877632A (en) * | 1997-04-11 | 1999-03-02 | Xilinx, Inc. | FPGA with a plurality of I/O voltage levels |
| US5958026A (en) * | 1997-04-11 | 1999-09-28 | Xilinx, Inc. | Input/output buffer supporting multiple I/O standards |
| US6393502B1 (en) | 1999-08-31 | 2002-05-21 | Advanced Micro Devices, Inc. | System and method for initiating a serial data transfer between two clock domains |
| US6362652B1 (en) | 1999-12-20 | 2002-03-26 | Fujitsu Microelectronics, Inc. | High voltage buffer for submicron CMOS |
| US6545521B2 (en) | 2001-06-29 | 2003-04-08 | International Business Machines Corporation | Low skew, power sequence independent CMOS receiver device |
| JP2011011368A (ja) * | 2009-06-30 | 2011-01-20 | Sumitomo Heavy Ind Ltd | 加熱シリンダカバー |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4191898A (en) * | 1978-05-01 | 1980-03-04 | Motorola, Inc. | High voltage CMOS circuit |
| DE2929383A1 (de) * | 1979-07-20 | 1981-02-12 | Ibm Deutschland | Schaltungsanordnung zur spannungspegelumsetzung und zugehoeriges verfahren |
| JPS5710822A (en) * | 1980-06-23 | 1982-01-20 | Toshiba Corp | Integrated circuit device |
| US4380710A (en) * | 1981-02-05 | 1983-04-19 | Harris Corporation | TTL to CMOS Interface circuit |
| US4437024A (en) * | 1981-10-22 | 1984-03-13 | Rca Corporation | Actively controlled input buffer |
| US4430582A (en) * | 1981-11-16 | 1984-02-07 | National Semiconductor Corporation | Fast CMOS buffer for TTL input levels |
| US4471242A (en) * | 1981-12-21 | 1984-09-11 | Motorola, Inc. | TTL to CMOS Input buffer |
| JPH0620176B2 (ja) * | 1982-10-08 | 1994-03-16 | 株式会社日立製作所 | 遅延回路 |
| US4575646A (en) * | 1983-06-02 | 1986-03-11 | At&T Bell Laboratories | High-speed buffer arrangement with no delay distortion |
| US4555642A (en) * | 1983-09-22 | 1985-11-26 | Standard Microsystems Corporation | Low power CMOS input buffer circuit |
| US4563595A (en) * | 1983-10-27 | 1986-01-07 | National Semiconductor Corporation | CMOS Schmitt trigger circuit for TTL logic levels |
| US4584492A (en) * | 1984-08-06 | 1986-04-22 | Intel Corporation | Temperature and process stable MOS input buffer |
| US4783607A (en) * | 1986-11-05 | 1988-11-08 | Xilinx, Inc. | TTL/CMOS compatible input buffer with Schmitt trigger |
| US4783603A (en) * | 1987-01-08 | 1988-11-08 | Cypress Semiconductor Corporation | TTL to MOS converter with power supply noise rejection |
-
1987
- 1987-08-01 KR KR1019870008475A patent/KR900001817B1/ko not_active Expired
-
1988
- 1988-07-29 JP JP63190499A patent/JPH021613A/ja active Pending
- 1988-07-29 US US07/225,848 patent/US4929852A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| KR890004499A (ko) | 1989-04-22 |
| US4929852A (en) | 1990-05-29 |
| JPH021613A (ja) | 1990-01-05 |
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