KR20180049084A - Polyurethane chemical mechanical polishing pad with high modulus ratio - Google Patents

Abstract

The present invention discloses a chemical mechanical polishing pad comprising a polyurethane polishing layer having a high storage modulus at low temperatures and a low storage modulus at high temperatures. For example, the disclosed pad embodiments can be made from a polyurethane having a ratio of storage elastic modulus at 25 占 폚 to storage elastic modulus at 80 占 폚 of 50 or more. The polyurethane polishing layer may further have a Shore D hardness of at least 70, a tensile elongation of less than 320%, a storage modulus of at least 1200 MPa at 25 占 폚, and / or a storage modulus of less than 15 MPa at 80 占 폚.

Description

Polyurethane chemical mechanical polishing pad with high modulus ratio

The disclosed embodiments relate to a chemical mechanical polishing pad, and more particularly to a pad made of a polyurethane material having a high storage modulus at low temperatures and a low storage modulus at high temperatures.

Many chemical mechanical polishing (CMP) operations are used for front-end-line (FEOL) and back-end-line (BEOL) processing of semiconductor devices. For example, the following CMP operations are commonly used. Shallow trench isolation (STI) is an FEOL process used prior to transistor fabrication. A dielectric such as tetraethyl orthosilicate (TEOS) is deposited on the opening formed in the silicon wafer. Then, a CMP process is used to remove excess TEOS, and a structure is formed in which the TEOS is inlaid in a predetermined pattern on a silicon wafer. Tungsten plugs and interconnects, copper interconnects, and dual damascene processes are BEOL processes used to form metal wire networks connecting device transistors. In these processes, tungsten or copper metal is deposited in openings formed in a dielectric material (e. G., TEOS). The CMP process is used to remove excess tungsten or copper from the dielectric to form tungsten or copper plugs and / or interconnects therein. Interlayer dielectric (ILD) materials (e.g., TEOS) are deposited between metal interconnect levels to provide electrical isolation between levels. The ILD CMP step is typically used to smooth and flatten the deposited insulating material before forming subsequent interconnect levels.

In a conventional CMP process, the substrate (wafer) to be polished is mounted on a carrier (polishing head), which is then mounted on a carrier assembly and placed in contact with a polishing pad in a CMP apparatus (polishing apparatus). The carrier assembly provides a controllable pressure to the substrate to apply pressure to the substrate toward the polishing pad. The chemical mechanical polishing composition is generally applied to the pad surface while moving the substrate and pad relative to each other. The relative movement of the substrate and the pad (and the applied polishing composition) polishes the substrate by polishing and removing a portion of the material from the surface of the substrate. The polishing of the substrate is generally assisted by the chemical activity of the polishing composition (e.g., by chemical promoters) and / or by the mechanical activity of the polishing agent suspended in the polishing composition.

Polishing pads made from harder materials tend to exhibit higher removal rates, better planarization efficiency, and longer useful pad life than polishing pads made from softer materials. However, harder pads tend to produce more defects (e.g., scratches) on the wafer surface than soft pads. There is a need in the industry for polishing pads that can achieve high removal rates and planarization efficiencies, long pad life, and reduced defects. Currently available pads lack at least one of these categories.

The present invention discloses a chemical mechanical polishing pad comprising a polyurethane polishing layer having a high storage modulus at low temperatures and a low storage modulus at high temperatures. For example, the ratio of the storage modulus at 25 占 폚 to the storage modulus at 80 占 폚 may be 30 or more. The polyurethane polishing layer may further have a Shore D hardness of at least 70, a tensile elongation of less than 320%, a storage modulus of at least 1200 MPa at 25 占 폚, and / or a storage modulus of less than 15 MPa at 80 占 폚.

The disclosed pads can provide a variety of advantages including, for example, high planarization efficiency and low defectiveness. The disclosed pads can provide a more stable CMP removal rate when used with mild conditioning routines. Using a mild conditioning routine can additionally increase pad life significantly.

BRIEF DESCRIPTION OF THE DRAWINGS For a fuller understanding of the disclosed subject matter and advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which: Fig.
Figure 1 shows a graph of the storage modulus E 'versus temperature for the five disclosed pad and control embodiments.
Figure 2 shows graphs of copper removal rates according to the number of polished wafers for pad embodiments 1DS and 1DF (X2003, X2003F) and control (D100-JT46) of the present invention.
Figure 3 shows a profilometer scan across the surface of a 9 탆 x 1 탆 structure on a copper patterned wafer for Pad Sample 1A (DOE211) and Control Pad embodiment (D100) of the present invention.
Figure 4 shows a dishing graph for some of the disclosed pad embodiments.
Figure 5 shows a graph of the assumed scratches for the disclosed pad embodiments.
Figure 6 shows a graph of pad wear rate for the disclosed pad embodiments.

The present invention discloses a chemical mechanical polishing pad comprising a polyurethane polishing layer having a high storage modulus at low temperatures and a low storage modulus at high temperatures. For example, in embodiments of suitable pads, the polyurethane polishing layer may have a storage modulus at 25 ° C versus a storage modulus at 80 ° C of at least 30.

The present invention relates to a chemical mechanical polishing pad substrate comprising a polyurethane material. The present invention is at least in part based on the surprising and unexpected discovery of a chemical mechanical polishing pad with excellent planarization efficiency, reduced defects (e.g., scratches), ease of conditioning, and long pad life. Certain embodiments of the pad of the present invention may be described as being low toughness, high modulus, and / or hard pads, and may be characterized as having certain mechanical properties.

The polishing pad of the present invention can be applied to polishing a wide variety of semiconductor wafers used in the manufacture of integrated circuits and other micro devices. Such wafers may be technical nodes of conventional node configurations (e.g., 90 nm or less, 65 nm or less, 32 nm or less) in some embodiments. However, in some embodiments, the polishing pad of the present invention is particularly well suited for improved node applications (e.g., less than 22 nm, less than 18 nm, less than 16 nm, less than 14 nm). It will be appreciated that the absence of defects in the planarization technique becomes more important as the node technology evolves, since the influence of each scratch has a greater impact as the relative sizes of the features on the wafer become smaller. Owing to the improvement of the provided defects, the disclosed polishing pad may be particularly suitable for improved node applications. However, as described above, the polishing pad of the present invention is not limited to being used with an improved node wafer, and may be used to polish other workpieces as desired.

The pad may be made from a thermoplastic or thermosetting polyurethane polymer resin. A preferred embodiment uses a thermoplastic polyurethane polymer resin. The polymer resin is typically a preformed polymer resin; However, the polymeric resin may also be prepared in situ (e.g., in situ) by any of the many methods known in the art (see, for example, Szycher's Handbook of Polyurethanes, CRC Press: New York, 1999, Chapter 3) ). For example, thermoplastic polyurethanes can be prepared in situ by reacting urethane prepolymers (e.g., isocyanates, di-isocyanates and tri-isocyanate prepolymers) with prepolymers comprising isocyanate reactive moieties . Suitable isocyanate reactive moieties include amines and polyols.

The choice of the polyurethane polymer resin may depend in part on the rheology of the polymer resin. U.S. Patent No. 8,075,372, which is incorporated herein by reference in its entirety, describes rheological properties suitable for thermoplastic polyurethane pads. In a preferred embodiment, the thermoplastic polyurethane has an average molecular weight of less than 150,000 g / mol (e.g., less than 100,000 g / mol). The use of polyurethanes with lower molecular weights can advantageously cause " brittle " (ductile) pad materials, thus making the mild pad conditioning routines suitable for use.

Furthermore, suitable polyurethane materials can be selected based on the mechanical properties imparted to the pad (e.g., determined through dynamic mechanical analysis). In particular, the polishing pad preferably has a high modulus at low temperatures (e.g., 25 占 폚, 30 占 폚 and / or 40 占 폚) and a low modulus at high temperatures (e.g., 70 占 80 占 and / or 90 占 폚) ≪ / RTI > While not wishing to be bound by theory, it is believed that during polishing, the bulk pad temperature (e.g., in the range of about 30 캜 to about 50 캜) is low and the pad asperity temperature (e.g., about 80 캜) . High modulus at low temperature provides rigidity of the pad which is believed to promote high planarization efficiency while low modulus at high temperature provides smoothness and is believed to promote low defectivity.

The storage modulus at low temperature is preferably quite high. For example, the storage modulus (E ') of the thermoplastic polyurethane at 25 占 폚 is preferably at least about 1000 MPa (e.g., at least about 1200 MPa, or at least about 1400 MPa). The storage modulus at 30 占 폚 is preferably at least about 800 MPa (e.g., at least about 1000 MPa, or at least about 1200 MPa). The storage modulus at 40 占 폚 is preferably at least about 600 MPa (e.g., at least about 700 MPa, or at least about 800 MPa). For thermosetting polyurethanes, the storage modulus at a temperature of less than about 50 占 폚 is preferably at least about 300 MPa (e.g., at least 400 MPa or at least 500 MPa).

The storage modulus at high temperature is preferably considerably low. For example, the storage modulus of the thermoplastic polyurethane at 80 캜 or 90 캜 is preferably not greater than about 20 MPa (e.g., not greater than about 15 MPa, or not greater than about 10 MPa). The storage modulus at 70 DEG C is preferably about 30 MPa or less (e.g., about 20 MPa or less, or about 15 MPa or less). For thermosetting polyurethanes, the storage modulus at a temperature of 80 캜 or higher is preferably about 20 Mpa or less (e.g., about 15 MPa or less, or about 10 MPa or less).

The polyurethane can also be characterized by a high ratio of storage elastic modulus at low temperature to storage elastic modulus at high temperature. For example, in the case of thermosetting polyurethane, the storage modulus at 25 ° C versus the storage modulus at 80 ° C (E '(25): E' (80)) is about 30 or more About 50 or more, about 80 or more, or about 100 or more). For thermoplastic polyurethanes, the ratio of E '(25): E' (80) is preferably at least about 50 (e.g., at least about 80, at least about 100, at least about 120, or at least about 150). When alternative ratios are used, the ratio of the storage modulus at 40 ° C to the storage modulus at 80 ° C (E '(40): E' (80)) is greater than or equal to about 30 About 60 or more, about 80 or more, or about 100 or more). In the case of the thermoplastic polyurethane, the ratio of E '(40): E' (80) is preferably about 50 or more.

The disclosed pads are preferably made of a rigid polyurethane material having a Shore D hardness (ASTM D2240-95) of, for example, greater than or equal to about 60 (e.g., greater than or equal to about 70 or greater than or equal to about 75). The use of hard pads is also believed to further promote high planarization efficiency.

The polyurethane may be characterized as being somewhat brittle (or otherwise referred to as having low toughness or low tensile elongation). For example, the tensile elongation at room temperature (e.g., about 25 ° C) is preferably about 350% or less (eg, about 340% or less, about 320% or less, or about 300% or less). While not wishing to be bound by theory, it is believed that a tough pad, such as a pad with a high tensile elongation (e.g., greater than about 350%), may be subjected to a more severe conditioning (as required by higher energy to break / shear / tear the pad material) Of the total population. Thus, the use of polyurethanes with lower toughness (e.g., polyurethanes with lower tensile elongation) can cause pads that require less severe conditioning, which can promote pad life prolongation.

In one preferred embodiment, the polishing pad has a storage elastic modulus E '(25) of at least about 100 E' (25): E '(80) , A Shore D hardness of about 70 or greater, and a tensile elongation of about 320% or less.

The disclosed pad is preferably non-porous, but may also comprise a porous embodiment. A non-porous pad is a substantially complete solid, i. E., A pad having a void volume percentage substantially equal to zero. In such embodiments, the pad has a density of greater than 1 g / cm ³ (e.g., in the range of about 1.1 to about 1.2 g / cm ³ ).

In certain embodiments, the disclosed pad may be porous with virtually any suitable pore size and pore volume. For example, the pad may have an average pore size in the range of about 5 to about 200 microns (e.g., in the range of about 5 to about 100 microns, or in the range of about 5 to about 50 microns). Such a pad may also have a porosity (also referred to as pore volume) in the range of about 1 to about 50% by volume (e.g., about 5 to about 50%, or about 10 to about 40%).

In embodiments of the porous pad, voids can be imparted to the polyurethane using substantially any suitable technique. For example, a solid state foaming process may be used in which an extruded sheet is exposed to a high pressure inert gas (e.g., carbon dioxide), and an inert gas is absorbed into the sheet. Nucleation of the bubbles in the sheet causes porosity. Commonly assigned US Patent Publication No. 2015/0056892 (incorporated herein by reference in its entirety) discloses suitable foaming techniques.

The above-described pads can be manufactured using substantially any suitable pad manufacturing technique. For example, in one suitable method embodiment, the liquid thermoplastic polyurethane polymer resin mixture can be mixed and then extruded to form a solid thermoplastic polyurethane sheet. Subsequently, a polishing pad can be formed from the sheet.

The following examples further illustrate the invention but, of course, should not be construed as limiting the scope of the invention.

Example  One

In this example, the mechanical properties of various extruded thermoplastic polyurethane pads (five embodiments of the present invention and one control embodiment) were evaluated. The pad evaluated was solid (essentially free of voids). Five embodiments of the present invention are shown in Tables 1a and 1b as Pad Samples 1A, 1B, 1C, 1D and 1E. As shown in Table 1a, the pad sample of the present invention has three parameters: (i) hard part to soft part ratio, (ii) first polyol to second polyol ratio, and (iii) first chain extender to second Lt; / RTI > ratio of the chain extender).

[Table 1a]

The control embodiment was a commercially available Epic D100® pad (Cabot Microelectronics, Aurora, IL, USA). The evaluated properties are a glass transition temperature Tg, a DMA transition temperature (temperature at which tan? Is maximum), an elongation at break in tensile fracture (%), a storage elastic modulus E '(25) at 25 占 폚, a storage elastic modulus E' ), A storage modulus E '(80) at 80 ° C, a Shore D hardness, and a thermoplastic polyurethane material density. The pad physical properties are shown in Table 1b.

[Table 1b]

Based on the data in Table 1b, the samples of the present invention exhibit a higher DMA transition temperature, lower elongation, higher storage modulus at 25 占 폚 and 50 占 폚, lower storage modulus at 80 占 폚, and higher Shore D hardness. As will be described in greater detail below, these characteristics (alone or in combination) are believed to achieve excellent pad conditionability, planarization efficiency, and defect performance.

1 shows the storage elasticity modulus (PP) of the samples 1 A, 1 B, 1 C, 1 D and 1 E (blue, brown, magenta, cyan and green in the unofficial figures) and the control group E '. The data in the graph was generated using a Q800 DMA measurement tool available from TA Instruments. The test was performed according to a standard multi-frequency controlled strain pulling mode with a frequency of 1 Hz, amplitude of 30 占 퐉, and a temperature rise of 5 占 폚 / min at 0 to 120 占 폚. Each pad sample was made in a 6 mm x 30 mm rectangular shape for tensile clamping.

The data shown in Figure 1 shows that the pad samples of the present invention have higher storage modulus E 'values at lower temperatures (e.g., less than about 50 캜) than the control samples. The data shown above further show that the pad sample of the present invention has a lower storage modulus E 'value at a higher temperature (e.g., greater than about 60 DEG C) than the control sample.

Example  2

Pad sample 1D of the present invention and a control (Epic D100® pad available from Cabot Microelectronics) were used to evaluate the copper removal rate for a 250 wafer run. This example evaluated the effectiveness of the pad samples of the present invention when using a mild pad conditioning routine (described below). Two inventive pad samples were evaluated: a foamed porous pad (1DF) having porosity similar to (i) a solid non-porous pad (1DS) and (ii) a control pad. Each pad sample of the present invention contained the same concentric groove pattern as the commercially available Epic D100® pad.

Copper polishing rates were obtained by polishing 200 mm blanket copper wafers on alumina-based polishing slurries described in U.S. Patent No. 6,217,416, on an Applied Miracle CMP abrasive with a Titan Profiler head. The slurry contained 1.5% hydrogen peroxide at the time of use. High- and low-down-force methods were used to simulate the first two steps used in semiconductor fabrication. The high-down force method used a pressure plate speed of 93 rpm, a head speed of 87 rpm, and a membrane pressure of 2.5 psi. The low-down force method used a pressure plate and head speed of 70 and 63 rpm, respectively, and a membrane pressure of 1.5 psi. The slurry flow rate was 200 mL / min and the polishing pad was adjusted in situ to 100% condition of the polishing step using a Kinik 31G-3N conditioning disk with a sweep frequency of 10 zones per minute of 12 cycles per minute did.

Figure 2 shows a graph of copper removal rates according to the number of polished wafers for Pad Examples 1DS and 1DF (blue and green in the informal figures) and the control (red in the informal figures) of the present invention. It is noted that the Cu removal rate (about 8500 A / min) for the solid pad during the experiment was high and substantially constant, suggesting that a gentle conditioning routine is suitable for the 1DS pad embodiment. During the experiment, the removal rate of the foam pad 1DF is simply reduced from about 8000 A / min to about 7000 A / min, while the removal rate of the control pad is reduced from about 8000 A / min to about 6000 A / The example implies that more severe conditioning routines are required.

Example  3

Blankets and patterned copper wafers were polished using pad samples 1A, 1B, 1C, 1D of the present invention and a control (Epic D100® pad available from Cabot Microelectronics). This example evaluated the patterned wafer performance (especially dishing) and defects (especially scratches) of the samples of the present invention. Both the solid, non-porous (S) and foam (F) versions of the inventive pad were evaluated. The rugged pad was inherently non-porous. The foam pad had a porosity ranging from about 10 to 30 volume percent with an average pore size of 5 to 40 microns. Each of the pad samples of the present invention contained the same concentric groove pattern as the commercially available Epic D100® pad.

MIT854 copper patterned wafer (diameter 200 mm) was polished to the end point using the same slurry as described in Example 2, on an Applied Mirra CMP abrasive with a Titan Profiler head. High- and low-down-force methods were used to simulate the first two steps used in semiconductor fabrication. The high-down force method used a pressure plate speed of 93 rpm, a head speed of 87 rpm, and a membrane pressure of 2.5 psi. The low-down force method used a pressure plate and head speed of 70 and 63 rpm, respectively, and a membrane pressure of 1.5 psi. The slurry flow rate was 200 mL / min and the polishing pad was adjusted in situ to the 100% condition of the polishing step using a Kinnik 31G-3N conditioning disk with a frequency of 10 zone sine counts per minute of 12 cycles per minute. The MIT 854 copper pattern wafer was pre-measured for bulk copper thickness and polished to the desired 2000 A remaining thickness using the high-down force method. The remaining copper overload was removed using the low-down force method, and the polishing time was determined by the optical endpoint system.

Using a KLA Tencor Surfscan SP1 non-patterned wafer inspection system with a defect size threshold set at 200 nm, the overall defect level after polishing was investigated. Defects were classified as SEM measurement and visual inspection. The Veeco UVx 310 spectrophotometer was used to investigate dishing and corrosion. Corrosion is taken from a 100 μm × 100 μm structure and is defined as the profile height difference between the top of the oxide spacer and the field between the copper lines. Dishing is taken from a 9 μm × 1 μm structure and is defined as the difference between the high oxide feature and the low copper feature in the array structure. Specific values for the field and copper structure were defined from the height distribution within the defined region of interest, where the height of the field was always taken as the upper 97% of the height distribution and the height of the copper line and oxide spacer was defined by the lower 5% .

Figure 3 shows a gauge scan across the surface of a 9 [mu] m x 1 [mu] m structure for pad sample 1A (blue in the informal diagram) and control pad implementation (red in the informal diagram) of the present invention. It is noted that the use of the pad sample 1A achieves improved flatness (oxidative corrosion and dishing).

Figure 4 shows a dishing graph for some of the disclosed pad embodiments. It is noted that both the solid and foam embodiments of pad samples 1A, 1B, 1C and 1D achieve improved dishing compared to the control.

Figure 5 shows a graph of the assumed scratches for the disclosed pad embodiments. Both the solid and foam embodiments of pad sample 1D and solid pad sample 1C achieved a reduction in scratch performance. Pad samples 1A and 1B achieved similar expected scratch performance.

Example  4

Pad wear tests were performed to evaluate pad wear rates of pad samples 1A, 1B, 1C, 1D, and 1E. An IC1010 pad (available from Dow Chemical) was used as a control. The pad wear test involved grinding the pad sample with the A165 conditioning disk for 1 hour using a MiniMet 1000 grinder / abrasive. The conditioning disk was rotated at 35 rpm. A 2 pound downforce was used to press the 2.25 inch diameter pad sample into contact with the conditioning disk. The slurry as described in Example 2 was applied to the disk at a flow rate of about 40 to about 100 mL / min. The temperature was maintained at about 50 < 0 > C. The pad wear rate is shown in Fig. Each of the pads of the present invention has a lower pad wear rate than the control group, suggesting potentially improved pad life and ease of conditioning.

It will be appreciated that the polishing pad of the present invention may optionally have a polishing surface that includes grooves, channels, and / or perforations that facilitate lateral transport of the polishing composition across the surface of the polishing pad. Such grooves, channels, or perforations may be of any suitable pattern and may have any suitable depth and width. The polishing pad may have two or more different groove patterns, for example, a combination of a large groove and a small groove as described in U.S. Patent No. 5,489,233. The grooves may be in the form of oblique grooves, concentric grooves, spiral or circular grooves, XY crosshatch patterns, and may be continuous or discontinuous in connectivity. Preferably, the polishing pad comprises at least a small groove produced by a standard pad conditioning method.

The polishing pad of the present invention is particularly suitable for use with a chemical mechanical polishing (CMP) apparatus. Typically, the apparatus includes a platen (moving at the time of use, having a velocity due to trajectory, linear or circular motion), a polishing pad comprising the polishing pad substrate of the present invention, , And a carrier (which holds the workpiece to be polished by contacting and moving against the surface of the polishing pad). The polishing of the workpiece is performed by relatively moving the polishing pad relative to the substrate such that the workpiece contacts the polishing pad and generally abrades at least some of the material on the surface of the substrate with the polishing composition between the workpiece and the polishing pad, . The polishing composition typically comprises a liquid carrier (e.g., an aqueous carrier), a pH adjusting agent, and optionally an abrasive. The polishing composition may further include an oxidizing agent, an organic acid, a complexing agent, a pH buffering agent, a surfactant, a corrosion inhibitor, a defoaming agent, and the like, depending on the type of work to be polished. The CMP apparatus can be any suitable CMP apparatus among many CMP apparatuses known in the art. A polishing pad comprising the polishing pad substrate of the present invention may be used with a linear polishing tool.

Preferably, the CMP apparatus further comprises an in situ polishing endpoint detection system, and a number of such systems are known in the art. Techniques for inspecting and monitoring the polishing process by analyzing light or other radiation reflected from the surface of the workpiece are known in the art. Such methods are described, for example, in U.S. Patent Nos. 5,196,353, 5,433,651, 5,609,511, 5,643,046, 5,658,183, 5,730,642, 5,838,447, 5,872,633, US 5,893,796, US 5,949,927, and US 5,964,643. As such, the polishing pad of the present invention may include one or more transparent windows or holes formed therein to facilitate the discovery of such end points.

The polishing pad of the present invention can be used alone or alternatively as a layer of a multi-layer laminate polishing pad. For example, a polishing pad may be used with a subpad. The subpad may be any suitable subpad. Suitable sub-pads include, but are not limited to, polyurethane foamed sub-pads (such as the PORON foamed sub-pads of Rogers Corporation), impregnated felt sub-pads, micro-porous polyurethane sub- . In general, the sub-pads are softer than the polishing pads comprising the polishing pad substrate of the present invention, and thus can be further compressed and have lower shore hardness values than the polishing pads. For example, the subpad may have a Shore A hardness of 35 to 50. In some embodiments, the subpad is harder than the polishing pad, less compressible, and has a higher Shore hardness. The subpad optionally includes a groove, a channel, a hollow section, a window, a hole, and the like. When the polishing pad of the present invention is used with sub-pads, there is typically a layer of intermediate support such as a polyethylene terephthalate film, extending between the polishing pad and the sub-pads together with the polishing pad and the sub-pads.

A polishing pad comprising the polishing pad substrate of the present invention is suitable for use in polishing many types of workpieces (e.g., substrates or wafers) and workpiece materials. For example, a polishing pad may be used to polish a workpiece comprising a memory storage device, a semiconductor substrate, and a glass substrate. Suitable workpieces for polishing with a polishing pad include, but are not limited to, a memory or hard disk, a magnetic head, a MEMS device, a semiconductor wafer, a field emission display, and other microelectronic substrates (in particular, an insulating layer (e.g., silicon dioxide, silicon nitride, (Including microelectronic substrates including layers containing metal (e.g., materials) and / or metals (e.g., copper, tantalum, tungsten, aluminum, nickel, titanium, platinum, ruthenium, rhodium, iridium or other noble metals).

Claims (20)

A chemical mechanical polishing pad comprising a thermoplastic polyurethane polishing layer,
Wherein the thermoplastic polyurethane polishing layer has a storage modulus at 25 占 폚 and a storage modulus ratio at 80 占 폚 of 50 or more. The method according to claim 1,
Wherein the ratio is 100 or more. The method according to claim 1,
Wherein the thermoplastic polyurethane polishing layer also has a storage modulus at 40 DEG C of greater than or equal to 50 and a storage modulus ratio at 80 DEG C of the chemical mechanical polishing pad. The method according to claim 1,
Wherein the thermoplastic polyurethane polishing layer has a Shore D hardness of 70 or greater. The method according to claim 1,
Wherein the thermoplastic polyurethane polishing layer has a tensile elongation of 320% or less. The method according to claim 1,
Wherein the thermoplastic polyurethane polishing layer has a storage modulus of at least 1000 MPa at < RTI ID = 0.0 > 25 C. < / RTI > The method according to claim 1,
Wherein the thermoplastic polyurethane polishing layer has a storage modulus at 25 占 폚 of 15 MPa or less. The method according to claim 1,
Wherein the pad is non-porous. The method according to claim 1,
Wherein the thermoplastic polyurethane has a molecular weight of less than about 100,000 g / mol. The method according to claim 1,
The pad is from about 1.1 to about 1.2 g / cm ³ Cm < / RTI > of the polishing pad. A chemical mechanical polishing pad comprising a thermosetting polyurethane polishing layer,
Wherein the thermosetting polyurethane polishing layer has a storage modulus at 25 占 폚 and a storage modulus ratio at 80 占 폚 of 30 or more. 12. The method of claim 11,
Wherein the thermosetting polyurethane polishing layer has a Shore D hardness of 70 or greater and a tensile elongation of 320% or less. 12. The method of claim 11,
Wherein the thermosetting polyurethane polishing layer has a storage modulus of at least 300 MPa at 25 DEG C and a storage modulus of less than 20 MPa at 80 DEG C. (a) contacting the substrate according to claim 1 with a substrate;
(b) moving the pad relative to the substrate; and
(c) abrading the substrate to polish the substrate by removing a portion of the at least one layer from the substrate
Of the substrate. A method of making a pad according to claim 1,
(a) mixing a thermoplastic polyurethane polymer resin mixture;
(b) extruding the mixture to produce a solid thermoplastic polyurethane sheet; and
(c) preparing a polishing pad from the thermoplastic polyurethane sheet
≪ / RTI > (a) contacting the substrate according to claim 11 with a substrate;
(b) moving the pad relative to the substrate; and
(c) abrading the substrate to polish the substrate by removing a portion of the at least one layer from the substrate
Of the substrate. A chemical mechanical polishing pad comprising a thermoplastic polyurethane polishing layer,
Wherein the thermoplastic polyurethane polishing layer has a tensile elongation of less than 320% and a storage modulus of at least 1200 MPa at 25 占 폚. A chemical mechanical polishing pad comprising a thermoplastic polyurethane polishing layer,
Wherein the thermoplastic polyurethane polishing layer has a Shore D hardness of greater than or equal to 75 and a tensile elongation of less than or equal to 320 percent. A chemical mechanical polishing pad comprising a thermoplastic polyurethane polishing layer,
Wherein the thermoplastic polyurethane polishing layer has a Shore D hardness of at least 70, a tensile elongation at 320% or less, a storage modulus at 25 占 폚 of at least 1000 MPa, and a storage modulus at 80 占 폚 of 20 MPa or less. A chemical mechanical polishing pad comprising a non-porous thermoplastic polyurethane polishing layer,
The non-porous thermoplastic polyurethane polishing layer has an average molecular weight of 100,000 g / mol or less, a Shore D hardness of 70 or more, a tensile elongation of 320% or less, a storage elastic modulus at 25 占 폚 of 1200 MPa or more, A chemical mechanical polishing pad having a storage elastic modulus.

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