KR20160078606A - Display panel and diplay device - Google Patents

Abstract

The present invention relates to a light-shielding film which is connected to a light-shielding layer through a light-shielding layer located on a substrate, a thin film transistor located on the light-shielding layer, and a contact hole located in the insulating film, And a display panel.

Description

DISPLAY PANEL AND DIPLAY DEVICE [0002]

The present invention relates to a display panel and a display device.

2. Description of the Related Art [0002] As an information-oriented society develops, there have been various demands for a display device for displaying images. Recently, a liquid crystal display (LCD), a plasma display panel (PDP) Various display devices such as an OLED (Organic Light Emitting Diode Display Device) are being utilized.

Among these display devices, a liquid crystal display (LCD) has an array substrate including a thin film transistor, which is a switching element for controlling on / off each pixel region, and an array substrate including a color filter and / or a black matrix A display panel including a top substrate, a liquid crystal material layer formed therebetween, a driving unit for controlling the thin film transistor, a backlight unit (BLU) for providing light to the display panel, and the like , A pixel (PXL) electrode provided in a pixel region, and a common voltage (Vcom) electrode, and the transmittance of light is adjusted accordingly, thereby displaying an image.

On the other hand, since the organic light emitting display device, which is one of the new flat panel display devices, is a light emitting device that generates light by itself, it has excellent brightness, viewing angle and contrast ratio compared to a liquid crystal display device, It also has advantages in terms of power consumption.

The OLED display displays an image using light emitted from an organic light emitting diode (OLED) connected to a transistor of each subpixel included in a pixel. The organic light emitting diode includes an organic layer between an anode and a cathode, And is capable of being driven at a low voltage, has a relatively low power consumption, and is light and can be fabricated on a flexible substrate.

However, when a semiconductor layer included in a thin film transistor of such a display device is exposed to light, a shift of a threshold voltage may occur, and when a threshold voltage shift occurs, electrical characteristics of the thin film transistor may fluctuate Or deterioration may occur.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a display panel and a display device which shield light emitted from the outside to protect a semiconductor layer included in the thin film transistor, prevent a threshold voltage shift, .

In order to solve the above problems, in one aspect, a display panel according to the present invention is connected to a light shielding layer through a light shielding layer located on a substrate, a thin film transistor located on the light shielding layer, and a contact hole located in the insulating film And a light shielding pattern for shielding external light introduced from the side surface of the thin film transistor.

In another aspect, a display device according to the present invention is connected to a light-shielding layer located between a substrate and a thin film transistor through a contact hole located in the insulating film and a thin film transistor located on the substrate, And a light blocking pattern for blocking external light.

The display panel and the display device according to the present invention are capable of shielding light emitted from the outside to protect a semiconductor layer included in the thin film transistor, prevent threshold voltage shift, prevent variation or deterioration of electrical characteristics of the thin film transistor Effect.

1 is a schematic system configuration diagram of an organic light emitting display device to which embodiments are applied.
2 is a schematic sectional view showing a general display panel.
3 is a schematic plan view of a display panel according to embodiments.
4 is a schematic plan view of a display panel according to one embodiment.
5 is a schematic cross-sectional view taken along line AA 'in FIG.
6 is a schematic plan view of a display panel according to another embodiment.
7 is a schematic cross-sectional view taken along line BB 'of FIG.

Hereinafter, some embodiments of the present invention will be described in detail with reference to exemplary drawings. It should be noted that, in adding reference numerals to the constituent elements of the drawings, the same constituent elements are denoted by the same reference numerals whenever possible, even if they are shown in different drawings. In the following description of the embodiments of the present invention, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention rather unclear.

In describing the components of the invention, terms such as first, second, A, B, (a), (b), etc. may be used. These terms are intended to distinguish the constituent elements from other constituent elements, and the terms do not limit the nature, order or order of the constituent elements. When a component is described as being "connected", "coupled", or "connected" to another component, the component may be directly connected to or connected to the other component, It should be understood that an element may be "connected," "coupled," or "connected." In the same context, when an element is described as being formed on an "upper" or "lower" side of another element, the element may be formed either directly or indirectly through another element As will be understood by those skilled in the art.

1 is a schematic system configuration diagram of an organic light emitting display device to which embodiments are applied.

1, the OLED display 100 includes m data lines DL1, ..., DLm, m: a natural number) and n gate lines GL1, ..., GLn, n: A data driver 120 for driving the m data lines DL1 to DLm and a gate driver for sequentially driving n gate lines GL1 to GLn, A timing controller 110 for controlling the data driver 120 and the gate driver 130, and the like.

First, the timing controller 110 controls the data driver 120 based on the vertical / horizontal synchronizing signals (Vsync, Hsync) input from the host system and the external timing signals such as the video data (data) and the clock signal (CLK) And a gate control signal (GCS) for controlling the data driving signal (DCS) and the gate driving unit 130 to output the data control signal (DCS). The timing controller 110 may convert the video data input from the host system to a data signal format used by the data driver 120 and supply the converted video data 'data' to the data driver 120 have.

In response to the data control signal DCS and the converted video data 'data' input from the timing controller 110, the data driver 120 converts the video data 'data' into a data signal Analog pixel signals or data voltages) and supplies them to the data lines D1 to Dm.

The gate driver 130 sequentially supplies a scan signal (a gate pulse, a scan pulse, and a gate-on signal) to the gate lines G1 to Gn in response to a gate control signal GCS input from the timing controller 110 do.

1, the gate driver 130 may be located on one side of the display panel 140, or on both sides of the display panel 140 in two.

Each pixel P on the organic light emitting display panel 140 may be formed in an area defined by the data lines D1 to Dm and the gate lines G1 to Gn and arranged in a matrix form.

The display device 100 includes a light-shielding layer (not shown) positioned on a substrate (not shown), a thin film transistor (not shown) positioned on the light-shielding layer, and a contact hole (not shown) (Not shown) connected to the light-shielding layer (not shown) through the light-shielding layer (not shown) and shielding external light introduced from the side of the thin-film transistor (not shown).

Here, the light blocking pattern (not shown) has a structure to surround the edge of a thin film transistor (not shown). The light blocking pattern (not shown) is spaced apart from the signal lines GLn and DLm on the substrate (not shown) and the electrodes (not shown) of the thin film transistor (not shown). The light shielding pattern (not shown) does not overlap with the signal lines GLn and DLm on the substrate (not shown) and the electrodes (not shown) of the thin film transistor (not shown).

The display device 100 including such a light blocking pattern (not shown) protects a semiconductor layer (not shown) of a thin film transistor (not shown) from external light penetrating from the side of a thin film transistor Function.

Specifically, in the display device 100 according to the embodiments, when a semiconductor layer (not shown) of a thin film transistor (not shown) is exposed to external light, a negative threshold voltage (Vth) A shift may be generated to cause a change in electrical characteristics of a thin film transistor (not shown). By blocking the light shielding pattern (not shown), generation of a threshold voltage shift can be prevented, The effect of preventing the change of the electrical characteristics of the battery is caused.

In addition, a light shielding layer (not shown) is disposed between the substrate (not shown) and the thin film transistor (not shown) and overlapped to correspond to the semiconductor layer (not shown) of the thin film transistor (not shown).

Hereinafter, the present invention will be described in more detail with reference to the drawings.

In the present specification, the display panel 140 may be, for example, the organic light emitting display panel 140, but the embodiments are not limited thereto. The display panel 140 may be a liquid crystal display panel 140). ≪ / RTI >

2 is a schematic sectional view showing a general display panel.

The thin film transistor shown in FIG. 2 is a thin film transistor having a redundancy structure, is a coplanar transistor having a planar structure, and is an oxide transistor made of a metal oxide. However, such a thin film transistor is an example for convenience of explanation.

2, a general display panel 140 includes a light-shielding layer 204 located on a substrate 202, a first insulating layer 206 located on the light-shielding layer 204, a first insulating layer 206, And a thin film transistor (TFT) disposed on the TFT.

The thin film transistor includes a semiconductor layer 218 including source electrodes 220a and 220a 'and a drain electrode 220b, a first channel region 219a and a second channel region 219b, The gate insulating film 216 including the first gate electrode 212a and the second gate insulating film 216b and the gate insulating film 216 including the first gate electrode 212a and the second gate electrode 212b, And a second insulating film 226 located on the gate electrode 212. The second insulating film 226 is formed on the second insulating film 226,

The display panel 140 also includes a third insulating film 232 located on the second insulating film 226, a color filter 234 formed on the third insulating film 232, A layer 240 on the planarization layer 236 and a protective layer 250 on the cell 240. The planarization layer 236 may be formed of a material having a high thermal conductivity.

As shown in FIG. 2, the semiconductor layer 218 of the thin film transistor may be exposed to external light introduced from the side. In the case of external light entering in the upper part (upper part in the drawing) and the lower part (lower part in the figure), it can be blocked by the color filter 234 and the light shielding layer 204, In the case of light, it can reach the semiconductor layer 218 through the insulating films 206, 226, and 232 of transparent material.

When the semiconductor layer 218 is exposed to external light, a negative threshold voltage shift may occur. When a threshold voltage shift occurs, there arises a problem that the electrical characteristics of the thin film transistor change. In addition, as the electrical characteristics change, the driving voltage increases, and the luminosity characteristics such as luminance and color reproduction rate may be deteriorated.

The display panel 140 and the display device 100 according to the embodiments have a structure capable of solving such a problem.

3 is a schematic plan view of a display panel according to embodiments. 3 is a schematic view for explaining the structure and effect of the display panel according to the embodiments as a whole.

Referring to FIG. 3, the display panel 140 includes a thin film transistor including a gate electrode 312, a source electrode 320a, a drain electrode 320b, and a semiconductor layer 318. Here, the thin film transistor may be, for example, a driving transistor for driving the pixel P of the display panel 140, and the source electrode 320a and the drain electrode 320b may be reversed.

On the other hand, a color filter (CF) 334 is disposed on the upper portion of the thin film transistor and a light shield (LS) 304 is disposed on the lower portion. Also, on both sides (left and right in the drawing) of the thin film transistor, the light blocking pattern 330 may be located.

The semiconductor layer 318 of the thin film transistor can be sensitively reacted by the light that is externally introduced. In particular, when the semiconductor layer 318 is made of an oxide semiconductor, the threshold voltage can be largely varied by light. For example, under the NBTIS (Negative Bias Temperaturer Illuminance Stress) condition, which is a negative bias voltage and a stress according to a constant temperature, the variation of the threshold voltage of the oxide thin film transistor may vary greatly depending on the light.

Therefore, a structure for shielding light from the outside is required, and the color filter 334, the light shielding layer 304, and the light blocking pattern 330 function to block light. The display panel 140 according to the embodiments has an effect of blocking external light to prevent a threshold voltage shift (fluctuation), thereby preventing change or deterioration of the electrical characteristics of the thin film transistor.

4 is a schematic plan view of a display panel according to one embodiment.

4, the display panel 140 includes a light-shielding layer 304 disposed on a substrate (not shown), a thin film transistor disposed on the light-shielding layer 304, and a contact hole (not shown) And a light intercepting pattern (Pattern 330) connected to the light shielding layer 304 through the channel CH and shielding external light introduced from the side of the thin film transistor.

Specifically, the light shielding layer 304 is disposed in a non-display region on the substrate (not shown) so as to overlap with the semiconductor layer 318 of the thin film transistor and located between the substrate (not shown) and the thin film transistor, 318) of the light source (not shown).

Meanwhile, the display panel 140 may include a plurality of signal lines 310, 322, and 334 located on a substrate (not shown).

The first line 310 may be, for example, the gate line GLn of FIG. 1 and the second line 322 may be, for example, a high voltage power line (Vdd line) The data line 334 may be, for example, the data line DLm of FIG.

On the other hand, the thin film transistor may be, for example, a driving transistor. The driving transistor is driven in response to the data signal stored in the storage capacitor Cstg (not shown), that is, the driving current or the driving voltage supplied to the pixel electrode (or the pixel electrode, the anode, or the anode electrode) .

Thus, for example, when the display panel 140 is the organic light emitting display panel 140, when the driving transistor is driven, the supplied driving current is transmitted to the pixel electrode pixel electrode (or the pixel electrode or the anode or the anode electrode) And electrons and holes recombine with each other as they flow through the organic layer (not shown) to emit light, and eventually flow out to a common electrode (not shown).

The semiconductor layer 318 of the thin film transistor may be formed of one of oxide semiconductors such as poly silicon, low temperature polysilicon, and indium gallium zinc oxide (IGZO).

In the case of the semiconductor layer 318, when exposed to external light, a threshold voltage shift may occur to change the electrical behavior of the thin film transistor. Particularly, when the semiconductor layer 318 is made of an oxide semiconductor, the thin film transistor may be sensitive to external light, and the electrical properties of the thin film transistor may be significantly changed or deteriorated.

In order to prevent such a problem, the display panel 140 according to the embodiment includes the light blocking pattern 330, and the light blocking pattern 330 includes a plurality of signal lines 310 and 322 (not shown) on the substrate , 334 and the electrodes 312, 320a, 320b of the thin film transistor. That is, the light blocking pattern 330 maintains a floating state in which no voltage is applied.

In other words, the light blocking pattern 330 does not function to supply voltage to other components, but functions to cut off external light introduced from the side of the thin film transistor.

The light blocking pattern 330 also does not overlap with the signal lines 310, 322, and 334 on the substrate (not shown) and the electrodes 312, 320a, and 320b of the thin film transistor. This structure has an effect of preventing the occurrence of unnecessary parasitic capacitance.

The light blocking pattern 330 has a structure to surround the edge of the thin film transistor.

4, the light blocking pattern 330 may be formed in a shape of a "C" shape surrounding the gate electrode 312, the source electrode 320a, the drain electrode 320b, and the semiconductor layer 318 of the thin film transistor Structure. Accordingly, the semiconductor layer 318 of the thin film transistor can be protected by external light introduced from the side surface.

However, it should be noted that this is illustratively shown for convenience of explanation, and the planar shape of the light blocking pattern 330 can be variously designed.

On the other hand, the display panel 140 may further include a color filter 334 on the thin film transistor, and the color filter 334 may be formed on the upper surface of the display panel 140 Thereby protecting the semiconductor layer 318 of the thin film transistor.

The structure and arrangement of the plurality of signal lines 310, 322, and 334 shown in FIG. 4, the thin film transistor and the light shielding layer 304 and the like are exemplary and the display panel 140 according to the embodiments is various . ≪ / RTI >

5 is a schematic sectional view taken along the line A-A 'in FIG.

5, the display panel 140 includes a light-shielding layer 304 disposed on the substrate 302, a thin film transistor disposed on the light-shielding layer 304, and a contact hole And a light intercepting pattern (Pattern 330) connected to the light shielding layer 304 through the channel CH and shielding external light introduced from the side of the thin film transistor.

Here, the light blocking pattern 330 is not connected to the signal lines 310, 322, and 324 on the substrate 302 and the electrodes 312, 320a, and 320b of the thin film transistor, and is not overlapped.

Specifically, the display panel 140 includes a light-shielding layer 304 formed on the substrate 302, a first insulating film 306 formed on the light-shielding layer 304, a gate electrode 304 formed on the first insulating film 306, A gate insulating film 316 located on the gate electrode 312, a semiconductor layer 318 located on the gate insulating film 316, a source electrode 320a located on the semiconductor layer 318, The light blocking pattern 330, the source electrode 320a, and the drain electrode 320b and the light blocking pattern 330, which are located on the same layer and spaced apart from the electrode 320b, the source electrode 320a, and the drain electrode 320b, A color filter 334 located on the second insulating film 332, a cell 340 located on the color filter 334, a second insulating film 332 formed on the second insulating film 332, (350).

The substrate 302 may be a glass substrate, a plastic substrate including PET (PolyEthylen Terephthalate), PEN (PolyEthylen Naphthalate), polyimide, or the like. In addition, a buffer layer may be further provided on the substrate 302 to block penetration of impurity elements. The buffer layer may be formed of a single layer or multiple layers of, for example, silicon nitride (SiNx) or silicon oxide (SiOx).

The light-shielding layer 304 may be made of any one of Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, Ti, W, But it is not limited thereto. The light shielding layer 304 functions to protect the semiconductor layer 318 by blocking external light introduced through the substrate 302 from under the display panel 140.

The gate electrode 312 may be formed of at least one metal or alloy of, for example, Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, Ti, , Single layer or multiple layers.

5, a bottom gate method in which the gate electrode 312 is located below the semiconductor layer 318 is shown for convenience of description, and the top gate method It is possible.

On the other hand, the semiconductor layer 318 may be formed of one of polycrystalline silicon, low temperature polycrystalline silicon, and an oxide semiconductor. For example, when the semiconductor layer 318 is formed of an oxide semiconductor, the semiconductor layer 318 may be formed of any one of indium gallium zinc oxide (IGZO), zinc tin oxide (ZTO), and zinc oxide (ZIO) But are not limited to,

The source electrode 320a and the drain electrode 320b of the thin film transistor may be formed of a metal such as Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, Cu, or an alloy thereof, and may be formed of a single layer or multiple layers, and may be formed of a refractory metal such as chromium (Cr) or tantalum (Ta) or the like, but is not limited thereto.

The light blocking pattern 330 is formed to surround the edges of the thin film transistor (see FIG. 4). The light blocking pattern 330 is formed on the gate insulating layer 316 and the first insulating layer 306 through a contact hole CH, (Not shown).

The light shielding pattern 330 functions to shield external light introduced from the side (left and right in the drawing) of the thin film transistor in the display panel 140. Therefore, the side surface of the light blocking pattern 330 has a structure that surrounds the semiconductor layer 318.

The light blocking pattern 330 may be formed on the same layer as the source electrode 320a and the drain electrode 320b. In other words, the light blocking pattern 330 may be formed simultaneously with the source electrode 320a and the drain electrode 320b, and may be formed of the same material as the source electrode 320a and the drain electrode 320b. Therefore, there is a process advantage that can add a light shielding function without adding any additional process.

The display panel 140 according to the embodiment includes a light blocking pattern 330 and the light blocking pattern 330 includes a plurality of signal lines 310, 322, and 334 on a substrate (not shown) And are not connected to the electrodes 312, 320a, and 320b. That is, the light blocking pattern 330 maintains a floating state in which no voltage is applied.

In other words, the light blocking pattern 330 does not function to supply voltage to other components, but functions to cut off external light introduced from the side of the thin film transistor.

The light blocking pattern 330 also does not overlap with the signal lines 310, 322, and 334 on the substrate (not shown) and the electrodes 312, 320a, and 320b of the thin film transistor (see FIG. This structure has an effect of preventing the occurrence of unnecessary parasitic capacitance.

On the other hand, the first insulating film 306, the gate insulating film 316 and the second insulating film 332 are formed of, for example, SiO _x , SiN _x , SiON, Al ₂ O ₃ , TiO ₂ , Ta ₂ O ₅ , HfO ₂ , An inorganic insulating material such as ZrO ₂ , BST, PZT or an organic insulating material including, for example, benzocyclobutene (BCB) and acryl resin, or a combination thereof.

On the other hand, a color filter 334 may be additionally formed on the second insulating film 332. The color filter 334 may be any one of red (R), blue (B), and green (G) color filters 334 to block external light entering from the top of the display panel 140, And functions to prevent the threshold voltage shift of the semiconductor layer 318 of the transistor.

On the color filter 334, a planarization layer 336 is formed. The planarization layer 336 has hydrophobic properties in consideration of mechanical strength, moisture permeability, ease of film formation, productivity, and the like. Examples of the hydrogen-containing inorganic film include SiON, silicon nitride (SiNx) And aluminum oxide (AlOx).

The cell 340 may be an organic light emitting diode of the organic light emitting display panel 140 or may be an organic light emitting diode of the liquid crystal display panel 140, It is possible.

On the other hand, a protective layer 350 is disposed on the cell 340. The protective layer 350 may be an upper substrate of the organic light emitting display panel 140, a moisture permeation preventive layer, or an upper substrate of the liquid crystal display panel 140.

In summary, the display panel 140 according to the embodiment shown in FIGS. 4 and 5 includes the light shielding pattern 330 that surrounds the edges of the thin film transistor, It is possible to prevent the semiconductor layer 318 from being exposed to light. As a result, the threshold voltage shift of the thin film transistor is prevented, and the effect of preventing fluctuation or deterioration of the electrical characteristics is obtained.

Hereinafter, the description of the structure overlapping with the structure described in FIG. 5 will be omitted.

FIG. 6 is a schematic plan view of a display panel according to another embodiment, and FIG. 7 is a schematic sectional view taken along line B-B 'of FIG.

6 and 7 has a redundancy structure for repair. However, this is for convenience of description, and the embodiments are not limited thereto and can be variously designed.

6 and 7, the display panel 140 includes a light-shielding layer 304 positioned on the substrate 302, a thin film transistor positioned on the light-shielding layer 304, and insulating films 306 and 326 And a light intercepting pattern (Pattern 330) connected to the light shielding layer 304 through the contact hole CH for shielding external light introduced from the side of the thin film transistor.

Here, the light blocking pattern 330 is not connected to the plurality of signal lines 322 and 324 on the substrate 302 and the electrodes 312, 320a, and 320b of the thin film transistor, and is not overlapped.

The thin film transistor includes a semiconductor layer 318 including source electrodes 320a and 220a 'and a drain electrode 320b, a first channel region 319a and a second channel region 319b, and a first gate insulating film 316a A gate insulating film 316 including a first gate electrode 312a and a second gate insulating film 316b and a gate electrode 312 including a first gate electrode 312a and a second gate electrode 312b, And a second insulating film 326 located on the gate electrode 312.

The thin film transistor may be, for example, a driving transistor, and may have a repair structure against a defect occurrence. And thus includes a first gate electrode 312a and a second gate electrode 312b.

The semiconductor layer 318 of the thin film transistor has a structure in which the source electrodes 320a and 220a 'and the drain electrode 320b, the first channel region 319a and the second channel region 319b are coplanar ) Structure.

The semiconductor layer 318 includes a first source electrode 320a adjacent to the first gate electrode 312a, a second source electrode 320b adjacent to the second gate electrode 312b, a first gate electrode 312a, The drain electrode 320b positioned between the first gate electrode 312a and the second gate electrode 312b and the first channel region 319a and the second gate electrode 312b which are in contact with the lower surface of the first gate electrode 312a, And a second channel region 319b that is in contact.

The portion corresponding to the first source electrode 320a, the second source electrode 320b and the drain electrode 320b is formed into a conductor and functions as an electrode, and the first channel region 319a and the second channel region 319b And the two-channel region 319b maintains the semiconductor property.

Here, the drain electrode 320b of the thin film transistor is in contact with the metal connection structure 328 which supplies the high voltage (Vdd) from the high voltage power supply line 322.

On the other hand, the light blocking pattern 330 has a structure to surround (or surround) the edge of the thin film transistor. In other words, it has a shape that surrounds the source electrodes 320a and 220a ', the drain electrode 320b, the first channel region 319a, and the second channel region 319b, which constitute a thin film transistor (see FIG. 6).

Accordingly, the semiconductor layer 318 of the thin film transistor is protected from the external light introduced through the side surface of the thin film transistor of the display panel 100.

In summary, the display panel 140 and the display device 100 according to the embodiments are connected to the light shielding layer 304 through the contact hole CH located in the insulating film, and the light shielding pattern surrounding the edges of the thin film transistor This has the effect of blocking the external light introduced from the side of the thin film transistor, preventing the threshold voltage shift, and preventing electrical fluctuation or deterioration of the thin film transistor.

Although the embodiments have been described with reference to the drawings, the present invention is not limited thereto.

It is to be understood that the terms "comprises", "comprising", or "having" as used in the foregoing description mean that the constituent element can be implanted unless specifically stated to the contrary, But should be construed as further including other elements. All terms, including technical and scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs, unless otherwise defined. Commonly used terms, such as predefined terms, should be interpreted to be consistent with the contextual meanings of the related art, and are not to be construed as ideal or overly formal, unless expressly defined to the contrary.

The foregoing description is merely illustrative of the technical idea of the present invention, and various changes and modifications may be made by those skilled in the art without departing from the essential characteristics of the present invention. Therefore, the embodiments disclosed in the present invention are intended to illustrate rather than limit the scope of the present invention, and the scope of the technical idea of the present invention is not limited by these embodiments. The scope of protection of the present invention should be construed according to the following claims, and all technical ideas within the scope of equivalents should be construed as falling within the scope of the present invention.

302: substrate 304: shielding layer
306: first insulating film 312: gate electrode
316: gate insulating film 320a: source electrode
320b: drain electrode

Claims (12)

A light shielding layer disposed on the substrate;
A thin film transistor located on the light shielding layer; And
And a light blocking pattern connected to the light blocking layer through a contact hole located in the insulating film and blocking external light introduced from a side surface of the thin film transistor. The method according to claim 1,
The light blocking pattern may be formed by,
Wherein the plurality of signal lines on the substrate and the electrodes of the thin film transistor are not connected. The method according to claim 1,
The light blocking pattern may be formed by,
Wherein the plurality of signal lines on the substrate and the electrodes of the thin film transistor are not overlapped with each other. The method according to claim 1,
The light blocking pattern may be formed by,
And a structure that surrounds an edge of the thin film transistor. The method according to claim 1,
The light blocking pattern may be formed by,
And the source electrode / drain electrode of the thin film transistor. The method according to claim 1,
The light-
And a semiconductor layer of the thin film transistor. The method according to claim 1,
And a color filter disposed on the thin film transistor. The method according to claim 1,
The semiconductor layer of the thin-
Polycrystalline silicon, low temperature polycrystalline silicon, and oxide semiconductors. A thin film transistor positioned on a substrate; And
And a light intercepting pattern connected to the light shielding layer located between the substrate and the thin film transistor through a contact hole located in the insulating film and shielding external light introduced from the side of the thin film transistor. 10. The method of claim 9,
The light blocking pattern may be formed by,
And a structure that surrounds the edge of the thin film transistor. 10. The method of claim 9,
The light blocking pattern may be formed by,
Wherein the plurality of signal lines on the substrate and the electrodes of the thin film transistor are not connected. 10. The method of claim 9,
The light blocking pattern may be formed by,
Wherein the plurality of signal lines on the substrate and the electrodes of the thin film transistor do not overlap.

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