KR20160016585A - Method of growing nitride semiconductor - Google Patents

Abstract

A method of growing a nitride semiconductor according to an embodiment of the present invention includes: forming an n-type nitride semiconductor layer on a substrate; Forming an active layer on the n-type nitride semiconductor layer; And the method comprising a step of forming a p-type nitride semiconductor layer on the active layer, and forming the active layer, N ₂ carrier gas in the supply, the first well layer and the first well through the N ₂ carrier gas Forming a well protective layer on the layer; Supplying the H ₂ carrier gas when the formation of the well protective layer is completed; Forming a sub-barrier layer on the well protective layer while the H ₂ carrier gas is being supplied; Blocking the H ₂ carrier gas when formation of the sub-barrier layer is completed; And forming a second well layer on the sub-barrier layer. The nitride semiconductor growth method according to the present invention can etch and remove impurities such as carbon generated from the MO source source of the H ₂ carrier gas to grow a barrier layer having a good film quality to a predetermined thickness and then planarize and re- , An active layer including a barrier layer having an excellent morphology with the well layer can be formed.

Description

[0001] METHOD OF GROWING NITRIDE SEMICONDUCTOR [0002]

The present invention relates to a nitride semiconductor growth method, and more particularly, to a nitride semiconductor growth method for growing an active layer by controlling a carrier gas supplied when an active layer is grown.

In general, light emitting devices using nitride semiconductors are widely used in blue / green light emitting diodes or laser diodes as light sources for full color displays, traffic lights, general lighting and optical communication devices. The light emitting device using the nitride semiconductor includes an active layer having a multiple quantum well structure located between the n-type and p-type nitride semiconductor layers, and generates light by recombination of electrons and holes in the active layer. The active layer has a structure in which a quantum well layer is disposed between the quantum barrier layers, and the emission wavelength emitted from the light emitting device using the nitride semiconductor is determined according to the atomic composition ratio of the material forming the active layer and the thickness of the quantum well layer.

The luminous efficiency of such a nitride semiconductor device is determined by the recombination probability of electrons and holes which are originally involved in light emission in the active layer, that is, the internal quantum efficiency (IQE). The internal quantum efficiency refers to the number of photons generated by the recombination of electrons and holes, compared to the number of electrons and holes injected into the active layer. In order to improve the internal quantum efficiency of the active layer, it is necessary to consider overall characteristics such that electrons and holes flow into the active layer at the time of voltage application, effective confinement of electrons and holes in the active layer, and characteristics of recombination of electrons and holes in the active layer do.

The nitride semiconductors are mainly grown using a metal organic chemical vapor deposition method in which a substrate is placed in a reactor and then a source gas using an organic material source of a Group III metal is supplied into the reactor to grow a nitride semiconductor layer on the substrate. Japanese Patent Laid-Open Publication No. 2009-054616 (hereinafter referred to as prior art) discloses a method for manufacturing a nitride semiconductor light emitting device. In the prior art, the InGaN well layer is grown with only N ₂ carrier gas, growth is stopped, and H ₂ carrier gas is further injected to etch the surface of the well layer. Then, a technique for producing a quantum well layer and a quantum barrier layer having a rough interface by growing an InGaN barrier layer is disclosed.

However, in the case of the prior document, H _2, but it can increase the non-uniformity of the carrier well layer thickness using an etching effect of the gas, owing to the direct contact with H ₂ carrier gas and the well layer is a problem that the well layer is damaged. In the prior art, it is disclosed that roughening the interface between the well layer and the barrier layer reduces the fluctuation of the wavelength. However, this may impair the uniformity of the band gap in the quantum well layer, thereby increasing the fluctuation of the wavelength.

One of the problems to be solved by the present invention is to improve the film quality of the well layer and the barrier layer included in the active layer while preventing the damage of the well layer due to the carrier gas and to improve the electrical and optical properties And a method of growing a nitride semiconductor capable of reducing fluctuation of a wavelength.

Another problem to be solved by the present invention is to provide a nitride semiconductor device capable of improving internal quantum efficiency and reducing fluctuation of wavelength by reducing the surface roughness of the barrier layer and forming barrier layers and well layers having smooth interfaces, Thereby providing a growth method.

A method of growing a nitride semiconductor layer according to an embodiment of the present invention includes: forming an n-type nitride semiconductor layer on a substrate; Forming an active layer on the n-type nitride semiconductor layer; And the method comprising a step of forming a p-type nitride semiconductor layer on the active layer, and forming the active layer, N ₂ carrier gas in the supply, the first well layer and the first well through the N ₂ carrier gas Forming a well protective layer on the layer; Supplying the H ₂ carrier gas when the formation of the well protective layer is completed; Forming a sub-barrier layer on the well protective layer while the H ₂ carrier gas is being supplied; Blocking the H ₂ carrier gas when formation of the sub-barrier layer is completed; And forming a second well layer on the sub-barrier layer.

The flow rate (SLM) per hour of the supplied H ₂ carrier gas may be 30% or less of the flow rate per hour of the entire carrier gas supplied.

And the N ₂ carrier gas is supplied during formation of the first and second well layers, the well protection layer and the sub-barrier layer, wherein a flow rate per hour during formation of the sub- May be less than the flow rate during the formation of the catalyst.

Also, the H ₂ carrier gas may be supplied during the ramp from the first temperature to the second temperature and thereafter again from the second temperature to the first temperature, wherein the first temperature is from 750 to 770 Lt; 0 > C, and the second temperature may be 770 to 870 < 0 > C.

After the temperature is lowered to the first temperature, the supply of the In source gas and the Al source gas may be interrupted for a predetermined time.

Forming an n-type nitride semiconductor layer on the substrate; Forming an active layer on the n-type nitride semiconductor layer; Forming a p-type nitride semiconductor layer on the active layer; And the method comprising a step of forming the active layer and is disposed between the n-type nitride semiconductor layer, a super lattice layer including the low band gap layer and the high band gap layer, and forming the super lattice layer, N ₂ carrier gas to the supply via the N ₂ carrier gas, forming a low-band gap layer; And initiating the supply of the H ₂ carrier gas after formation of the high bandgap layer on the low bandgap layer has begun.

The supply of the H ₂ carrier gas can be shut off before the formation of the high bandgap layer is completed.

According to another aspect of the present invention, there is provided a method of growing a nitride semiconductor layer, comprising: forming an n-type nitride semiconductor layer on a substrate; Forming an active layer on the n-type nitride semiconductor layer; Forming a p-type nitride semiconductor layer on the active layer; And said active layer and said p-type nitride comprising the step of forming the electron blocking layer between the semiconductor layer and the p-type nitride semiconductor layer forming step, N ₂ carrier of the p-type to the gas supply via the N ₂ carrier gas The H ₂ carrier gas can be supplied for a partial period while the nitride semiconductor layer is formed.

At this time, supplying the H ₂ carrier gas for a partial period may be repeated at least twice, with a predetermined time interval.

And forming the electron block layer may supply the H ₂ carrier gas for a partial period during the period in which the electron block layer is formed through the N ₂ carrier gas.

According to another aspect of the present invention, there is provided a method of growing a nitride semiconductor layer, comprising: forming an n-type nitride semiconductor layer on a substrate; Forming an active layer on the n-type nitride semiconductor layer; And forming a first well layer forming the active layer and forming a p-type nitride semiconductor layer on the active layer, supplying an N ₂ carrier gas through the N ₂ carrier gas; After formation of the first well layer is completed, supplying H ₂ carrier gas; Forming a barrier layer while the H ₂ carrier gas is supplied; And forming a second well layer on the barrier layer when formation of the barrier layer is completed, the H ₂ carrier gas may be blocked before formation of the barrier layer is completed.

At this time, the step of forming the barrier layer may form the barrier layer during the rise from the first temperature to the second temperature and while maintaining the second temperature.

Here, the H ₂ carrier gas may be shut off before falling from the second temperature to the first temperature.

And a Ga source gas is supplied together with the N ₂ carrier gas, and the Ga source gas can be shut off before falling from the second temperature to the first temperature.

In addition, the Ga source gas may be re-supplied after being lowered to the first temperature.

Here, the temperature difference between the first temperature and the second temperature may be 20 to 200 degrees.

And the flow rate (SLM) per hour of the supplied H ₂ carrier gas may be 50% or less of the flow rate per hour of the total carrier gas supplied.

Also, the flow rate (SLM) of the supplied H ₂ carrier gas per hour may be 40 to 200.

In the nitride semiconductor growth method according to the present invention, when a barrier layer included in the active layer is formed, an H ₂ carrier gas is mixed with a carrier gas at a predetermined ratio to be supplied. Therefore, an MO (metal organic) A barrier layer having a good film quality can be obtained due to the etching effect which reduces the inflow of impurities such as carbon from the barrier layer. At this time, impurities such as carbon are inevitably incorporated into the film in the MO source supply, thereby deteriorating the quality of the film and lowering the internal quantum efficiency.

Further, the barrier layer may be grown to a predetermined thickness, and then the surface may be planarized and regrowthed to form an active layer including a barrier layer having an excellent morphology with the well layer.

When the InGaN well layer is etched with the H ₂ carrier gas in the prior art, there is a difference in the degree of etching due to the presence of the In-rich region and the low In-region due to the non-uniformity of the composition ratio of In. As a result, the interface between the well layer and the top barrier layer becomes rough. Unlike the well layer having an atomic composition ratio of In of about 15%, the barrier layer of the present invention does not inject or inject a small amount of In to 5% or less. Therefore, when the H ₂ carrier gas is etched, the protruded region is etched first and the surface is planarized . Therefore, the roughness of the interface between the barrier layer and the upper well layer can be reduced.

Further, in the present invention, since the interface between the well layer and the barrier layer is more reliable, the confinement of electrons and holes confined in the well layer is lowered, thereby increasing the internal quantum efficiency. Accordingly, the optical characteristics of the light emitting diode including the active layer are improved, and the well layer thickness imbalance due to the roughness of the interface between the barrier layer and the well layer is reduced, thereby reducing wavelength fluctuation.

According to the present invention, as a part of the H ₂ carrier gas supplied while forming the barrier layer is partially interrupted, the flatness of the interface between the barrier layer and the well layer formed on the barrier layer is well formed to increase the luminous efficiency of the nitride semiconductor There is an effect that can be.

Particularly, when the barrier layer is formed, the supply of the H ₂ carrier gas is controlled in accordance with the change in temperature, so that impurities are not concentrated on the interface between the barrier layer and the well layer.

1 is a cross-sectional view illustrating a structure and a growth method of a nitride semiconductor according to an embodiment of the present invention.
2 is a timing chart of gas and temperature for explaining a method of growing a nitride semiconductor according to an embodiment of the present invention.
3 and 4 are cross-sectional views illustrating a light emitting device according to another embodiment of the present invention.
5 is a timing chart of gas and temperature for explaining a method of growing a nitride semiconductor according to another embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments are provided by way of example so that those skilled in the art can sufficiently convey the spirit of the present invention. Therefore, the present invention is not limited to the embodiments described below, but may be embodied in other forms. In the drawings, the width, length, thickness, etc. of components may be exaggerated for convenience. It is also to be understood that when an element is referred to as being "above" or "above" another element, But also includes the case where there are other components in between. Like reference numerals designate like elements throughout the specification.

In embodiments of the present invention, the nitride semiconductor layers may be formed by growing in a MOCVD (Metal Organic Chemical Vapor Deposition) chamber. Therefore, the growth conditions and the like shown in the following description can be applied to the case of growing the nitride semiconductor layers by MOCVD. However, the present invention is not limited thereto, and the case of growing a nitride semiconductor using MBE (Molecular Beam Epitaxy) or HVPE (Hydride Vapor Phase Epitaxy) may also be included in the scope of the present invention.

1 is a cross-sectional view illustrating a structure of a nitride semiconductor according to an embodiment of the present invention and a method for growing the same. The structure of FIG. 1 may be formed by sequentially growing semiconductor layers from bottom to top. Hereinafter, this will be described in detail.

Referring to FIG. 1, the nitride semiconductor structure includes an n-type nitride semiconductor layer 110, an active layer 130, and a p-type nitride semiconductor layer 140. Furthermore, the nitride semiconductor structure may further include a substrate 210, a buffer layer 220, an undoped nitride semiconductor layer 230, and a superlattice layer 120.

The substrate 210 is not limited as long as it can grow the nitride semiconductor layer, and may be an insulating or conductive substrate. The substrate 210 may be, for example, a sapphire substrate, a silicon substrate, a silicon carbide substrate, an aluminum nitride substrate, or a gallium nitride substrate. In this embodiment, the substrate 210 may be a patterned sapphire substrate (PSS) having a concavo-convex pattern (not shown) on its top surface, and the PSS may include a C- have. In the present invention, the substrate 210 may be a substrate different from the nitride semiconductor.

The buffer layer 220 may comprise AlGaN and / or GaN and may be grown on the substrate 210 at a temperature of about 500 to 600 < 0 > C. The buffer layer 220 may include a low-temperature buffer layer and a high-temperature buffer layer. The buffer layer 220 can function as a nucleus layer in which the nitride semiconductor can grow when the substrate 210 is a substrate different from the nitride semiconductor and also can function as a nitride layer, It may also play a role in relieving stress and strain due to lattice constant mismatch. However, when the substrate 210 is a gallium nitride substrate, the buffer layer 220 may be omitted.

The undoped nitride semiconductor layer 230 may be located on the buffer layer 220. The undoped nitride semiconductor layer 230 may include (Al, Ga, In) N, for example, the undoped nitride semiconductor layer 230 may include undoped GaN. The undoped nitride semiconductor layer 230 can be formed by introducing a Group III element source and an N source into the chamber, and growing the semiconductor layer without introducing an n-type or p-type dopant precursor.

Thus, the undoped nitride semiconductor layer 230 may be formed on the buffer layer 220 before the growth of the n-type nitride semiconductor layer 110. Since the undoped nitride semiconductor layer 230 does not contain an impurity such as an n-type or p-type dopant and thus has a relatively high crystal quality, the undoped nitride semiconductor layer 230 may be grown on the undoped nitride semiconductor layer 230, It is possible to improve the quality of crystals.

The n-type nitride semiconductor layer 110 may be located on the undoped nitride semiconductor layer 230. The n-type nitride semiconductor layer 110 includes an n-type contact layer. The n-type nitride semiconductor layer 110 may include a nitride semiconductor such as (Al, Ga, In) N, and may further include an n-type dopant such as Si to be doped into the n-type. layer 110 can be provided by growing the introduction of Group III element source, the n source, and an n-type dopant precursor into the chamber, for example, Ga source, such as TMGa (Trimethylgallum) or TEGa (Triethygallium), NH ₃ And an Si dopant precursor are introduced into the chamber to grow the n-type GaN to form the n-type nitride semiconductor layer 110. [0064]

The superlattice layer 120 may be located on the n-type nitride semiconductor layer 110. The superlattice layer 120 may include a structure in which semiconductor layers including (Al, In, Ga) N are stacked in a plurality of layers. The superlattice layer may be formed by alternately stacking a layer having a small bandgap and a layer having a large bandgap. For example, the superlattice layer 120 may include a structure in which an InGaN layer and GaN are repeatedly stacked, or a structure in which an InGaN layer and an InAlGaN layer are repeatedly stacked.

The superlattice layer 120 may be grown on the n-type nitride semiconductor layer 110 in the MOCVD chamber and the superlattice layer 120 may transmit stress and strain due to lattice mismatch to the active layer 130 And prevents the propagation of a defect such as a dislocation, thereby improving the crystal quality of the active layer 130.

The active layer 130 may be located on the superlattice layer 120. The active layer 130 may include a multiple quantum well structure in which a barrier layer 130b and a well layer 130w are alternately stacked. Further, the barrier layer 130b may include a well protective layer 131b and a sub-barrier layer 132b adjacent to the top of the well layer. The well layer 130w may be formed of InGaN and the barrier layer 130b may be formed of a nitride semiconductor layer having a broad band gap such as GaN, InGaN, AlGaN, or AlInGaN as compared with the well layer 130w. In an embodiment, the barrier layer 130b may be formed of AlInGaN.

 The In composition ratio in the well layer 130w can be determined by the desired light wavelength. The barrier layer 130b and the well layer 130w of the active layer 130 may be formed of an undoped layer which is not doped with impurities in order to improve the crystal quality of the active layer but may be formed as a part or whole of the active layer 130 May be doped with impurities.

The p-type nitride semiconductor layer 140 may be located on the active layer 130. The p-type nitride semiconductor layer 140 may include a nitride semiconductor such as (Al, Ga, In) N and may be grown on the active layer 130 using a technique such as MOCVD, MBE, or HVPE . The p-type nitride semiconductor layer 140 may include a p-type dopant, for example, Mg as a dopant.

Although not shown, an electron blocking layer 135 may be disposed between the active layer 130 and the p-type nitride semiconductor layer 140. The electron blocking layer 135 prevents electrons from overflowing from the active layer 130 to the p-type nitride semiconductor layer 140. The electron blocking layer 135 may be formed of a gallium nitride-based semiconductor layer having a wider band gap than that of the p-type nitride semiconductor layer 140.

FIG. 2 is a timing chart of gas and temperature for explaining a method of growing a nitride semiconductor according to an embodiment of the present invention, in particular, a method of growing the active layer 130. In this embodiment, the active layer 130 is grown using a metalorganic chemical vapor deposition method. Further, the buffer layer 220, the undoped nitride semiconductor layer 230, the n-type nitride semiconductor layer 110, The layer 120 and the p-type nitride semiconductor layer 140 may also be grown in situ in the same chamber using a metal organic chemical vapor deposition method. In FIG. 2, N ₂ denotes an N ₂ carrier gas, H ₂ denotes an H ₂ carrier gas, NH ₃ denotes an NH ₃ source gas, Ga denotes a Ga source gas, In denotes an In source gas, Gas.

1 and 2, a substrate 210 is first loaded into a MOCVD chamber, and a metal source gas, a nitrogen source gas, and a carrier gas or an atmospheric gas are supplied into the chamber to form a buffer layer 220, an undoped nitride semiconductor layer 230, an n-type nitride semiconductor layer 110, and a super lattice layer 120 may be grown. Source gas of the n-type impurity can be supplied into the chamber as needed.

The MOCVD chamber has a susceptor in which a tray for placing the substrate 210 and a tray for placing the substrate 210 in a generally known gallium nitride based semiconductor layer growth chamber is heated, a susceptor is heated by the heating means, May be transferred to the substrate 210 to heat the substrate 210. At this time, the temperature of the susceptor is measured by the thermocouple, and the temperature of the susceptor can be regarded as the temperature of the substrate 210.

 The metal source gas includes a Ga source gas, an Al source gas, and / or an In source gas, and a suitable source gas may be supplied according to the metal composition of the nitride semiconductor layer to be grown. For example, TMGa or TEGa may be used as the Ga source gas, TMAl or TEAl may be used as the Al source gas, and TMIn or TEIn may be generally used as the In source gas.

On the other hand, as the nitrogen (N) source gas, NH ₃ can be generally used. In general, N ₂ or H ₂ is generally used as the carrier gas or the atmospheric gas. In this embodiment, N ₂ and H ₂ gases may be used together during the growth process.

Referring again to FIG. 2, the InGaN well layer 130w is grown by supplying an In source gas, an NH ₃ gas, and a Ga source gas until the time t1 in the N ₂ carrier gas. Here, the InGaN well layer 130w may be grown to a thickness of 20 to 40 ANGSTROM for about 80 seconds.

Subsequently, the supply of the Al source gas is started at time t1, the supply of the In source gas is reduced, the growth of the well layer 130w is stopped, and the AlInGaN barrier layer 130b is grown. Here, the t12 time interval is approximately 42 seconds, and the barrier layer 130b may be grown to a thickness of approximately 20 angstroms. It is possible to prevent the H ₂ carrier gas from etching the well layer 130w and damaging the well layer 130w by growing the well protection layer 131b. Also, when the temperature is raised from the first temperature to the second temperature, evaporation of In atoms in the well layer due to high temperature can be prevented.

Subsequently, the supply of the H ₂ carrier gas and the rise from the first temperature to the second temperature are started at time t2. The standard liter per minute (SLM) of the supplied H ₂ carrier gas may be 30% or less of the total flow rate of the carrier gas supplied per hour. That is, in the present embodiment, the supplied carrier gas is an H ₂ carrier gas and an N ₂ carrier gas, wherein the flow rate of the H ₂ carrier gas per hour can be 30% or less.

In addition, the rise to the second temperature can be achieved by heating the susceptor by the above-described heating means and transferring heat from the susceptor to heat the substrate 210. [ In this embodiment, the first temperature may be approximately 770 DEG C, the second temperature may be 800 to 870 DEG C, and the rise from the first temperature to the second temperature may be performed for approximately 60 seconds. In this embodiment, the H ₂ carrier gas is supplied at the same time as the temperature rises, but the H ₂ carrier gas may be supplied after the second temperature is reached.

In the case where the second temperature is a high temperature of 800 ° C or more, the well layer 130w may be etched and damaged by the H ₂ carrier gas. Therefore, in this embodiment, the H ₂ carrier gas is supplied after the well protective layer 131b is grown for a time interval t12. Accordingly, contact between the well layer 130w and the H ₂ carrier gas can be prevented, and damage to the well layer 130w can be prevented. That is, since the well protective layer 131b is grown on the well layer 130w from the time t1, the H ₂ carrier gas supplied from the time t2 can be brought into contact with the barrier layer 130b. The AlInGaN sub-barrier layer 132b may then be grown for a t23 time interval. The t23 time interval can be approximately 280 seconds. The AlInGaN sub-barrier layer 132b grown during the t23 time interval grows as the H ₂ carrier gas is etched, so that the morphology can be improved. As a result, the interface characteristics with the well layer 130w grown on the sub-barrier layer 132b can be improved thereafter. The sub-barrier layer 132b may be further grown to a thickness of 50 to 100 ANGSTROM from time t2 to time t4.

Subsequently, at time t3, the supply of the H ₂ carrier gas is interrupted, and the descent from the second temperature to the first temperature can be started. a descent from the second temperature to the first temperature may be completed for a time period t34, the time interval may be approximately 60 seconds, and the sub-barrier layer 132b may be further grown to a thickness of approximately 20 ANGSTROM.

Sub-barrier layer 132b may then be further grown to a thickness of about 20 A at a first temperature for a time interval of 45 minutes, and the time interval may be about 42 seconds. Accordingly, the barrier layer 130b can be grown to a thickness of 90 to 140 ANGSTROM as a whole from the time t1 to the time t5.

During time periods t34 and t45, the release of the H ₂ carrier gas in the chamber may be completed, thereby blocking contact of the H ₂ carrier gas with the well layer 130w.

Subsequently, the supply of the Al source gas is interrupted at time t5, and the supply of the In source gas can be increased. Through this, the growth of the well layer 130w can be started, and the growth of the well layer 130w and the barrier layer 130b according to the timing graph described above can be repeated. The number of repetitions may be performed as needed.

In this embodiment, only the Al source gas is illustrated in the barrier layer 130b, but an In source gas may be injected into the barrier layer 130b to grow into AlInGaN. At this time, the injection time of the In source gas may be the same as the injection time of the Al source gas.

In this embodiment, the contact between the H ₂ carrier gas and the well layer 130w is effectively blocked, and the H ₂ carrier gas is supplied during the growth of the barrier layer 130b, thereby preventing damage to the well layer 130w Since the barrier layer 130b has improved morphology and improved interfacial properties with respect to the barrier layer 130b, the active layer 130 including the well layer 130w and the barrier layer 130b By improving the interfacial characteristics, confinement effect of electrons and wells can be increased, luminescence efficiency can be increased, and the thickness of the well layer can be made uniform to reduce wavelength fluctuation.

In this embodiment, the active layer 130 is grown according to the timing graph of FIG. 2. However, the growth method can also be applied to the growth of the superlattice layer 120. That is, when the superlattice layer 120 is repeatedly laminated with a band gap small layer (low band gap layer) and a band gap large layer (high band gap layer), the low band gap layer 120a is formed on the well layer 130w And the high-bandgap layer 120b corresponds to the barrier layer 130b, the same growth method can be applied. The low band gap layer 120a may also include In. Therefore, the thickness of the low band gap layer 120a of the super lattice layer 120 is uniform, and the internal quantum efficiency of the active layer 130 described above can be improved. The active layer 130 may have a thicker barrier layer 130b than the well layer 130w but the superlattice layer 120 may have similar thicknesses of the low band gap layer 120a and the high band gap layer 120b, May be thinner than the barrier layer 120b of the active layer 130, respectively. Each of the low band gap layer 120a and the high band gap layer 120b may have a total thickness of 2 to 5 nm.

In the high band gap layer 120b, the lower layer 121b may correspond to the well protective layer 131b of the active layer 130, and the upper layer 122b may correspond to the sub-barrier layer 132b of the active layer 130. [ The ratio of the thickness of the lower layer 121b and the upper layer 122b to the thickness of the entire high bandgap layer 120b is set such that the ratio of the thickness of the well protective layer 131b and the thickness of the sub-barrier layer 132b to the total thickness of the barrier layer 130 . ≪ / RTI >

In this embodiment, the H ₂ carrier gas and the N ₂ carrier gas can be used simultaneously when growing the p-type nitride semiconductor layer 140 formed on the active layer 130. This improves the interface characteristics between the active layer 130 and the p-type nitride semiconductor layer 140 and improves the morphology of the p-type nitride semiconductor layer 140 to improve crystal quality The electrical and optical characteristics of the light emitting device including the nitride semiconductor layer according to the present invention can be improved by improving the doping contribution. That is, due to the etching effect of the H ₂ carrier gas, it is possible to prevent aggregation of Mg, which is a p-type impurity, and thereby to increase the number of Mg atoms contributing to the hole formation in the entire implanted impurities.

The above process is not limited to the p-type nitride semiconductor layer 140 but may also be applied to the p-type impurity-doped electron blocking layer 135.

In addition, the above process is not limited to the entire p-type nitride semiconductor layer 140, but can be limited to a part. For example, a part of the p-type nitride semiconductor layer 140 may be grown by supplying only an H ₂ carrier gas or an N ₂ carrier gas, and an N ₂ carrier gas and a H ₂ Or may include a layer in which a carrier gas is implanted at the same time. The process may also be repeated for two or more cycles.

3 and 4 are cross-sectional views illustrating a light emitting device according to another embodiment of the present invention.

The light emitting device of FIGS. 3 and 4 includes a nitride semiconductor structure according to the embodiment of FIG. Therefore, detailed description of overlapping configurations will be omitted.

Referring to FIG. 3, the light emitting device includes an n-type nitride semiconductor layer 110, an active layer 130, and a p-type nitride semiconductor layer 140. Further, the light emitting device may further include a superlattice layer 120, a first electrode 251, and a second electrode 253.

The light emitting device of FIG. 3 may be a vertical light emitting device including the nitride semiconductor structure according to the embodiments of the present invention. Accordingly, the light emitting device includes a first electrode 251 located under the n-type nitride semiconductor layer 110 and electrically connected to the first electrode 251, and a second electrode 252 located on the p-type nitride semiconductor layer 140 and electrically connected to the n- (253).

The light emitting device of FIG. 3 may be manufactured by removing the substrate 210, the buffer layer 220, and the undoped nitride semiconductor layer 230 in the nitride semiconductor structure according to the embodiment of FIG. The substrate 210 may be removed from the n-type nitride semiconductor layer 110 by a method of separating the substrate 210 using a method such as laser lift-off, chemical lift-off, or stress lift-off, , A method of removing the substrate 210 by a chemical method may be used.

Referring to FIG. 4, the light emitting device includes an n-type nitride semiconductor layer 110, an active layer 130, and a p-type nitride semiconductor layer 140. Further, the light emitting device may further include a superlattice layer 120, a first electrode 261, and a second electrode 263.

The light emitting device of FIG. 4 may be a light emitting device having a horizontal structure including the nitride semiconductor structure according to the embodiments of the present invention. Accordingly, the light emitting device is formed by removing a portion of the p-type nitride semiconductor layer 140, the active layer 130, the superlattice layer 120, and the n-type nitride semiconductor layer 110 to form the n-type nitride semiconductor layer 110 And may have partially exposed areas. The first electrode 261 may be located on the exposed region and the second electrode 263 may be located on the p-type nitride semiconductor layer 140.

5 is a timing chart of gas and temperature for explaining a method of growing a nitride semiconductor according to another embodiment of the present invention.

The nitride semiconductor according to another embodiment of the present invention is formed in the same structure as in the embodiment. Accordingly, a method of growing a nitride semiconductor according to another embodiment of the present invention will be described, and a description of the same structure and method as those described above will be omitted.

5 is a timing chart of gas and temperature for explaining a method of growing an active layer in a method of growing a nitride semiconductor according to another embodiment of the present invention.

The active layer 130 may be grown in the chamber using a metal organic chemical vapor deposition method. Further, as described with reference to FIG. 2, N ₂ shown in FIG. 5 represents N ₂ carrier gas, and H ₂ represents H ₂ carrier gas. In represents In source gas, and Ga represents Ga source gas.

The well layer 130w and the barrier layer 130b included in the active layer 130 can be grown at different temperatures and the well layer 130w can be grown at a first temperature of about 700 to 800 degrees , The barrier layer 130b may be grown at a second temperature that is about 50 to 200 degrees higher than the first temperature. The temperature change for growing the active layer 130 may be performed as the susceptor is heated by the heating means and the substrate 210 is heated by heat transfer.

The heating time from the first temperature to the second temperature and the cooling time from the second temperature to the first temperature may take a certain time of about 60 seconds.

In another embodiment of the present invention, the well layer 130 is supplied with a N ₂ carrier gas at a first temperature into the chamber, and is supplied with an In source gas, NH ₃ gas, and Ga source gas.

When the growth of the well layer 130 is completed, the temperature in the chamber is raised from the first temperature to the second temperature at the time t1, and the H ₂ carrier gas is injected into the chamber accordingly. At this time, the H ₂ carrier gas may be 50% or less of the total carrier gas supplied to the chamber. Here, the entire carrier gas is a gas in which an H ₂ carrier gas and an N ₂ carrier gas are mixed. That is, the amount of the N ₂ carrier gas is adjusted as much as the H ₂ carrier gas is supplied, so that the pressure in the chamber is maintained.

H ₂ carrier gas is injected into the chamber, the In source gas is shut off, and the Ga source gas is continuously injected to grow the barrier layer 130b. That is, the barrier layer 130b is grown while the temperature in the chamber rises from the first temperature to the second temperature (t12). Conventionally, the growth of the barrier layer 130b may be stopped during the rise of the temperature in the chamber (t12). When the growth of the barrier layer 130b is stopped at this point of time, May be further included on top of the well layer 130w. Impurities may concentrate on the interface between the well layer 130w and the barrier layer 130b.

However, as in the other embodiment of the present invention, since the H ₂ carrier gas is supplied together with the Ga source gas to grow the barrier layer 130b during the temperature rise period t12, the well layers 130w and It is possible to prevent impurities from concentrating between the barrier layers 130b. Further, since the H ₂ carrier gas partially etches the semiconductor layer, it may also serve to remove impurities.

Here, the timing at which the H ₂ carrier gas is supplied may be varied as needed. For example, the H ₂ carrier gas may be supplied at a point of time when the In source gas is blocked and at a time t 1 when the temperature starts to rise from the first temperature to the second temperature. It may also be supplied at the same time as the temperature rises, and may be supplied later than the time t1 when the temperature rises. Of course, it is preferable that the H ₂ carrier gas is supplied later than the time when the In source gas is blocked.

As described above, when the temperature in the chamber is raised to the second temperature, the H ₂ carrier gas and the Ga source gas are supplied while the second temperature is maintained for a predetermined time (t 23), and the barrier layer 130b is grown do. This period is the same as in the embodiment of the present invention.

When the growth of the barrier layer 130b is completed, the temperature in the chamber is lowered from the second temperature to the first temperature (t34). At this time, the growth of the barrier layer 130b is stopped, and the supply of the Ga source gas and the H ₂ carrier gas supplied for the growth of the barrier layer 130b is stopped. As the supply of the Ga source gas is stopped, the growth of the barrier layer 130b is stopped.

Here, if the H ₂ carrier gas is continuously supplied, the surface of the barrier layer 130b may be etched to deteriorate the quality, and the flatness of the surface of the barrier layer 130b may be uneven. Accordingly, the interface between the barrier layer 130b and the well layer 130w formed on the barrier layer 130b may not be formed uniformly, and quality may be deteriorated. Therefore, the supply of the H ₂ carrier gas may be interrupted while the temperature in the chamber falls.

As described above, it is possible by the time the supply of the H ₂ carrier gas is supplied to the H ₂ carrier gas stops along the interrupted the supply of N ₂ carrier gas increases to match the amount of the entire carrier gas. Thereby maintaining the pressure in the chamber.

When the temperature in the chamber is lowered to the first temperature (t4), the In source gas and the Ga source gas are supplied again and the well layer 130w is grown again.

The above process can be repeated when the well layer 130w and the barrier layer 130b are formed in multiple layers.

In addition, the growth method of the active layer 130w may be applied to the growth of the super lattice layer 120 included in the nitride semiconductor of the present invention. That is, when the superlattice layer 120 is repeatedly laminated with the low band gap layer and the high band gap layer, the low band gap layer corresponds to the well layer 130w, the high band gap layer corresponds to the barrier layer 130b, It can be grown in the same manner according to the growth method described.

It will be apparent to those skilled in the art that various modifications, substitutions and substitutions are possible, without departing from the scope and spirit of the invention as disclosed in the accompanying claims. will be. Therefore, the embodiments disclosed in the present invention and the accompanying drawings are intended to illustrate and not to limit the technical spirit of the present invention, and the scope of the technical idea of the present invention is not limited by these embodiments and accompanying drawings. The scope of protection of the present invention should be construed according to the following claims, and all technical ideas within the scope of equivalents thereof should be construed as falling within the scope of the present invention.

110: an n-type nitride semiconductor layer
120: superlattice layer 120a: low band gap layer
120b: high band gap layer 121b:
122b: upper layer 130: active layer
130b: barrier layer 131b: well protection layer
132b: sub-barrier layer 130w: well layer
140: p-type nitride semiconductor layer 210:
220: buffer layer 230: undoped nitride semiconductor layer
251, 261: first electrodes 253, 263: second electrodes

Claims (19)

Forming an n-type nitride semiconductor layer on a substrate;
Forming an active layer on the n-type nitride semiconductor layer; And
And forming a p-type nitride semiconductor layer on the active layer,
Wherein forming the active layer comprises:
N ₂ to a carrier gas supply, the first well through the N ₂ carrier gas layer and forming a well protecting layer on the first well layer;
Supplying the H ₂ carrier gas when the formation of the well protective layer is completed;
Forming a sub-barrier layer on the well protective layer while the H ₂ carrier gas is being supplied;
Blocking the H ₂ carrier gas when formation of the sub-barrier layer is completed; And
And forming a second well layer on the sub-barrier layer. The method according to claim 1,
Wherein the flow rate (SLM) of the supplied H ₂ carrier gas per hour is not more than 30% of the flow rate per hour of the total carrier gas supplied. The method according to claim 1,
The N ₂ carrier gas for the first and the second well layer, the well the protective layer and the hourly flow rate of the first and second well layer during the formation of the sub-barrier layer, doedoe supplied during the sub-barrier layer is formed Wherein the flow rate during formation is less than the flow rate during formation. The method according to claim 1,
Wherein the H ₂ carrier gas is supplied during a rise from a first temperature to a second temperature and thereafter again while descending from the second temperature to the first temperature. The method of claim 4,
Wherein the first temperature is between 750 and 770 ° C, and the second temperature is between 770 and 870 ° C. The method of claim 4,
Wherein the supply of the In source gas and the Al source gas is interrupted for a predetermined time after the temperature is lowered to the first temperature. Forming an n-type nitride semiconductor layer on a substrate;
Forming an active layer on the n-type nitride semiconductor layer;
Forming a p-type nitride semiconductor layer on the active layer; And
Forming a superlattice layer disposed between the active layer and the n-type nitride semiconductor layer, the superlattice layer including a low band gap layer and a high band gap layer,
Wherein forming the superlattice layer comprises:
Supplying an N ₂ carrier gas, forming a low-band gap layer over the N ₂ carrier gas; And
And starting to supply the H ₂ carrier gas after the formation of the high bandgap layer on the low bandgap layer. The method of claim 7,
Wherein the supply of the H ₂ carrier gas is interrupted before formation of the high band gap layer is completed. Forming an n-type nitride semiconductor layer on a substrate;
Forming an active layer on the n-type nitride semiconductor layer;
Forming a p-type nitride semiconductor layer on the active layer; And
And forming an electron blocking layer between the active layer and the p-type nitride semiconductor layer,
Wherein forming the p-type nitride semiconductor layer includes:
N ₂ nitride semiconductor growth method while supplying a partial period while the H ₂ carrier gas, the carrier gas supply to which the p-type nitride semiconductor layer formed over the N ₂ carrier gas. The method of claim 9,
Wherein feeding the H ₂ carrier gas for a partial period has a constant time interval and is repeated at least twice or more. The method of claim 9,
The step of forming the electronic block layer may include:
Wherein the H ₂ carrier gas is supplied during a period during which the electron blocking layer is formed through the N ₂ carrier gas for a partial period. Forming an n-type nitride semiconductor layer on a substrate;
Forming an active layer on the n-type nitride semiconductor layer; And
And forming a p-type nitride semiconductor layer on the active layer,
Wherein forming the active layer comprises:
Supplying an N ₂ carrier gas, forming a first well layer with the N ₂ carrier gas;
After formation of the first well layer is completed, supplying H ₂ carrier gas;
Forming a barrier layer while the H ₂ carrier gas is supplied; And
And forming a second well layer on the barrier layer when formation of the barrier layer is completed,
Wherein the H ₂ carrier gas is intercepted before formation of the barrier layer is completed. The method of claim 12,
Wherein the step of forming the barrier layer forms the barrier layer while raising from the first temperature to the second temperature and while maintaining the second temperature. 14. The method of claim 13,
Wherein the H ₂ carrier gas is interrupted before falling from the second temperature to the first temperature. 14. The method of claim 13,
A Ga source gas is supplied together with the N ₂ carrier gas,
Wherein the Ga source gas is shut off before falling from the second temperature to the first temperature. 16. The method of claim 15,
Wherein the Ga source gas is supplied again after being lowered to the first temperature. 14. The method of claim 13,
Wherein the temperature difference between the first temperature and the second temperature is 20 to 200 degrees. The method of claim 12,
Wherein the flow rate (SLM) of the supplied H ₂ carrier gas per hour is not more than 50% of the flow rate of the entire carrier gas supplied per hour. 19. The method of claim 18,
Wherein the supplied H ₂ carrier gas has a flow rate (SLM) per hour of 40 to 200.

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