KR20130134642A - A printed circuit board and a method of manufacturing the same - Google Patents

Abstract

The present invention relates to a printed circuit board and a method of manufacturing the same, for realizing a fine pattern, a base substrate; Internal circuit patterns formed on one or both surfaces of the base substrate; An insulating layer covering the internal circuit pattern; An external circuit pattern formed on the insulating layer; And a via penetrating the insulating layer to connect the internal circuit pattern and the external circuit pattern, wherein adjacent portions of the lower portion of the via are coated with an insulating layer except for a connection point with the internal circuit pattern. A printed circuit board including a circuit board and a method of manufacturing the same are provided.

Description

Printed Circuit Board and Manufacturing Method Thereof {A PRINTED CIRCUIT BOARD AND A METHOD OF MANUFACTURING THE SAME}

The present invention relates to a printed circuit board and a method for manufacturing the same, and more particularly, to a printed circuit board with improved via structure and a method of manufacturing the same.

Printed Circuit Board (PCB) is used for mounting and wiring parts of electronic devices. After attaching thin plates such as copper to one surface of phenol resin insulation board or epoxy resin insulation board, they are etched according to the wiring pattern of the circuit. It is made by drilling a hole for attaching and mounting the parts by constructing the required circuit (removing it by leaving only the circuit on the wire).

Printed circuit boards include single-sided PCBs with wires formed on only one side of the insulated board, double-sided PCBs with wires formed on both sides, and multi-layered boards (MLBs) wired in multiple layers. In the past, single-sided printed circuit boards were used because the component elements were simple and the circuit patterns were simple. However, in recent years, the complexity of circuits has increased and the demand for high density and miniaturized circuits has increased. Is common.

A multilayer printed circuit board is constructed by alternately stacking circuit layers and insulating layers. In this structure, in order to connect the internal circuit layer and the external circuit layer, a via is required through the insulating layer to electrically connect the internal circuit layer and the external circuit layer. When manufacturing a multilayer printed circuit board through a build-up process, a process of forming a via hole capable of conducting with an external circuit layer is essential in an insulating layer stacked on the completed inner circuit layer.

At this time, for stable electrical conduction between layers, pads (hereinafter, lower via pads) are essentially formed in lower circuits connected to upper circuits through via holes, that is, adjacent areas under the vias.

The bottom pad of the via is designed in consideration of machining errors in forming the via, errors in the exposure equipment used in forming the upper circuit, and deformation of the raw materials used. Since variations between equipment, materials, and processes are inevitable, the design of the bottom via pad has been taken for granted in order to increase productivity and process yield when manufacturing a printed circuit board.

However, with the development of the electronics industry, highly integrated semiconductors have been developed, and miniaturization and thinning of electronic components have been accelerated, and thus, miniaturization, thinning, and high density are required in printed circuit boards on which these electronic components are mounted. To this end, efforts have been made to refine the wiring of printed circuit boards and to narrow the gaps of vias, but the densification of printed circuit boards is limited due to the presence of pads. In order to improve the interlayer matching of high density substrates, new fixed matching exposure facilities are being developed to improve the matching force of the laser equipment for forming vias or to form microcircuits. It has the limitation that it cannot be completely removed.

In this regard, Publication No. 2011-0074012 (hereinafter, referred to as a prior art document) published in Korean Patent Office Publication No. 1 provides a step of providing an insulating base having a copper foil layer formed on at least one surface thereof; Stacking a metal layer having a shorter length than the copper foil layer on the copper foil layer; And a step of forming an insulating layer on the metal layer, thereby providing a printed circuit board and a method of manufacturing the circuit pattern which can finely form a circuit pattern connecting to the via without a pad of the via and a core of the substrate. According to the printed circuit board of the technical literature and the method of manufacturing the same, when the build-up layer is implemented in multiple layers (for example, four, six, or more layers), the same structure as that described in the prior art document cannot be implemented. A via bottom pad is present. Accordingly, miniaturization, thinning, and high density of printed circuit boards are difficult.

Patent Document: Republic of Korea Patent Publication No. 2011-0074012

The present invention has been made to solve the above problems, and an object of the present invention is to provide a printed circuit board and a method of manufacturing the same, which can realize miniaturization, thinness, and high density of a substrate even in a multilayer printed circuit board.

The present invention devised to achieve the above object is a base substrate; Internal circuit patterns formed on one or both surfaces of the base substrate; An insulating layer covering the internal circuit pattern; An external circuit pattern formed on the insulating layer; And a via penetrating the insulating layer to connect the internal circuit pattern and the external circuit pattern, wherein adjacent portions of the lower portion of the via are coated with an insulating layer except for a connection point with the internal circuit pattern. Provide a circuit board.

In addition, the plurality of vias are provided, and the plurality of vias are provided adjacent to each other to provide a printed circuit board.

In addition, the inner circuit pattern and the outer circuit pattern, and the via, provides a printed circuit board made of any one of a metal selected from the group consisting of copper, gold, silver, nickel and alloys thereof.

In addition, the external circuit pattern is composed of a plurality of layers, the upper circuit pattern and the lower circuit pattern is connected through a via penetrating the insulating layer stacked therebetween, the adjacent portion of the lower portion of the via, A printed circuit board is provided, coated with an insulating layer except for the point of connection with the circuit pattern.

The present invention devised to achieve the above object comprises the steps of preparing a base substrate; Forming a plating layer on one or both surfaces of the base substrate and patterning the plating layer to form an internal circuit pattern; Stacking an insulating layer covering the internal circuit pattern, and processing a via hole penetrating the insulating layer at a predetermined position; Filling and plating the inside of the via hole and forming an external circuit pattern on the insulating layer; Includes, but provides a printed circuit board manufacturing method for etching the plating layer of the portion in contact with the via when forming the internal circuit pattern.

In addition, the internal circuit pattern and the external circuit pattern is provided by any one of an additive method, a subtractive method or a semi-additive method, to provide a printed circuit board manufacturing method. do.

According to the printed circuit board and the manufacturing method thereof according to the present invention, a fine pattern can be realized by not forming a lower via pad in an adjacent portion of the lower via, thereby preventing alignment error between circuits. have.

In addition, the spatial limitation due to the via size can be alleviated, so that the internal space of the substrate can be utilized more efficiently, and the substrate can be manufactured with a more stable structure.

In addition, existing substrate materials and processes can be used as is, thereby improving product reliability without additional costs.

1 is a sectional view of a printed circuit board according to the present invention.
2 is a cross-sectional view of a printed circuit board according to another embodiment of the present invention.
3 to 7 are process flowcharts of a method of manufacturing a printed circuit board according to the present invention.

The advantages and features of the present invention and the techniques for achieving them will be apparent from the following detailed description taken in conjunction with the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. The present embodiments are provided so that the disclosure of the present invention is not only limited thereto, but also may enable others skilled in the art to fully understand the scope of the invention. Like reference numerals refer to like elements throughout the specification.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. In this specification, the singular forms include plural forms unless otherwise specified in the text. It is to be understood that the terms 'comprise', and / or 'comprising' as used herein may be used to refer to the presence or absence of one or more other components, steps, operations, and / Or additions.

Hereinafter, the configuration and operation effects of the present invention will be described in more detail with reference to the accompanying drawings.

1 is a cross-sectional view of a printed circuit board according to the present invention. In FIG. 1, unnecessary constitutions that may obscure the subject matter of the present invention are omitted.

Referring to the printed circuit board 100 according to the present invention with reference to Figure 1, the printed circuit board 100 according to the present invention, the base substrate 110, the internal circuit pattern formed on one side or both sides of the base substrate 110 (120), the insulating layer 130 covering the internal circuit pattern 120, the external circuit pattern 140 formed on the insulating layer 130 and the insulating layer 130 through the internal circuit pattern ( The via 150 may be electrically connected to the external circuit pattern 140.

The base substrate 110 may include a single-sided printed circuit board, a double-sided printed circuit board having wirings formed on both sides thereof, a multi-layered printed circuit board (MLB) wired in multiple layers, and all other structures known in the art. A layer serving as a core in a substrate, which is a composite including fibers such as glass fibers and resin.

In one embodiment, a glass epoxy laminate is mainly used, and in some cases, BT resin, polyimide, or PPE, PPO resin, or the like may be used. In addition, it should be understood that various modifications may be used as the material of the base substrate 110.

A solder resist layer may be used as the insulating layer 130, or may be made of a composite polymer resin that is commonly used as an interlayer insulating material.

For example, the prepreg may be used as the insulating layer 130 to make the printed circuit board thinner, or the microfabrication may be implemented by using the Ajinomoto Build up Film (ABF) as the insulating layer 130. In addition, the insulating layer 130 may be made of an epoxy resin such as FR-4, BT (Bismaleimide Triazine), but is not particularly limited thereto.

The internal circuit pattern 120 and the external circuit pattern 140 may be made of a material having excellent electrical conductivity. For example, the internal circuit pattern 120 and the external circuit pattern 140 are made of any one metal selected from the group consisting of copper, gold, silver, nickel, and alloys thereof.

The internal circuit pattern 120 and the external circuit pattern 140 are preferably formed using a semi-additive process (SAP) in a circuit region of the insulating layer 130, but is not necessarily limited thereto. Of course, it can be formed using a modified semi-additive process or a subtractive method.

When the internal circuit pattern 120 and the external circuit pattern 140 are formed by an additive method, a conductive pattern is selectively deposited on the base substrate 100 by electroless plating or electrolytic plating to form a circuit pattern. Form. To this end, a seed layer for electrolytic copper plating may be formed on an upper surface of the base substrate 100.

When the internal circuit pattern 120 and the external circuit pattern 140 are formed by the subtractive method, a circuit pattern is formed by selectively removing unnecessary portions other than the conductor on the base substrate on which the plating layer is formed by etching or the like.

The internal circuit pattern 120 and the external circuit pattern 140 may be electrically connected through the via 150 penetrating the insulating layer 130. Therefore, in the present invention, the via 150 refers to a blind via connecting the circuit patterns of the upper and lower layers.

Of course, the printed circuit board 100 according to the present invention may include an inner via for connecting the circuit pattern of the upper and lower circuit patterns of the base substrate, but the printed circuit board 100 of the present invention. Since the main characteristic of) is the connection structure between the blind via and the circuit pattern, the via referred to below refers to the blind via.

Since the via 150 electrically connects the internal circuit pattern 120 and the external circuit pattern 140, the upper part 150b of the via 150 is connected to the external circuit pattern 140, and the via ( The lower portion 150a of the 150 is connected to the internal circuit pattern 120.

In this case, an adjacent portion of the lower portion of the via 150a is applied to the insulating layer 130 except for a connection point with the internal circuit pattern 120. That is, in a conventional printed circuit board, pads having a predetermined size (hereinafter, referred to as lower via pads) are formed at adjacent portions of the lower parts of the vias connected to the internal circuit patterns. The vias 150 are formed to sufficiently ensure electrical connection with the pattern 120, thereby electrically connecting the internal circuit patterns 120 and the external circuit patterns 140 without a separate via bottom pad.

In the above, the printed circuit board configured as a circuit pattern having four layers on both sides of the base substrate 110 is illustrated. However, the printed circuit board 100 according to the present invention is not limited thereto, and the external circuit pattern 140 may have a plurality of printed circuit boards. For example, as shown in FIG. 2, all of the six-layer circuit patterns including the internal circuit pattern 120 may be implemented.

In this case, the upper circuit pattern and the lower circuit pattern are electrically connected through the vias 150 passing through the insulating layer 130 stacked therebetween, and the lower circuit patterns of the lower vias 150a connected to the lower circuit patterns. Adjacent portions are applied to the insulating layer 130 except for connection points with the underlying circuit patterns.

As described above, the printed circuit board 100 according to the present invention does not form a lower via pad on an adjacent portion of the lower via 150a unlike the conventional printed circuit board. For example, as shown in FIG. Even when a plurality of vias 150 are formed and the plurality of vias 150 are adjacent to each other, a fine pattern may be implemented to prevent alignment errors between circuits.

In addition, the spatial limitation due to the via size can be alleviated, so that the internal space of the substrate can be utilized more efficiently, and the substrate can be manufactured with a more stable structure.

In addition, existing substrate materials and processes can be used as is, thereby improving product reliability without additional costs.

Meanwhile, the printed circuit board 100 according to the present invention further includes a solder resist layer 170 covering the external circuit pattern 140 except for a portion (bump pad) to be connected to a solder bump (not shown). can do. The solder resist layer 170 protects the external circuit pattern 140 from an external environment.

Now, the manufacturing method of the printed circuit board 100 according to the present invention will be described.

3 to 7 are process flowcharts of a method of manufacturing a printed circuit board 100 according to the present invention. Since the printed circuit board finally completed according to FIGS. 3 to 7 is the printed circuit board of FIG. 1, the symbols of FIGS. 3 to 7 and the symbols of FIG. 1 indicate the same components.

In the method of manufacturing the printed circuit board 100 according to the present invention, first, as shown in FIG. 3, the base substrate 110 is prepared. The base substrate 110 is made of a glass fiber base material (glass fiber reinforced prepreg impregnated with a thermosetting resin composition) impregnated with a thermosetting resin composition, and copper foil laminated plate (Copper Clad Laminate: CCL) laminated on one or both sides thereof. It can be composed of).

An internal via hole (IVH, 160) may be processed by using a drill or a laser on the prepared base substrate 110. The inner via hole 160 is a hole into which an inner via connecting the circuit pattern on the base substrate 110 and the lower circuit pattern is filled, and after processing the inner via hole 160, a potassium permanganate solution or the like. The desmear process may be performed to remove the smear on the inner wall of the inner via hole 160 using the etchant.

Next, as shown in FIG. 4, a plating layer is formed on one or both surfaces of the base substrate 110, and the plating layer is patterned to form an internal circuit pattern 120.

The plating layer may be formed as the electroless copper plating and the electrolytic copper plating are performed on the surface of the base substrate 110 including the inner via hole 160 inner wall. Here, it is preferable to perform electroless copper plating first and then electrolytic copper plating. In order to form a conductive film required for electrolytic copper plating, electroless copper plating is performed thinly as a pretreatment.

After the electroless and electrolytic copper plating is performed, a paste is filled into an inner region of the inner via hole 160 to protect the electroless and electrolytic copper plating layer formed on the inner wall of the inner via hole 160. This can be done together in an insulating layer stacking step to be carried out later.

Here, the paste generally uses an insulating ink material, but a conductive paste may also be used depending on the purpose of the printed circuit board. The conductive paste is formed by mixing a metal such as Cu, Ag, Au, Sn, Pb as a main component alone or in an alloy form with an organic adhesive.

The process of patterning the internal circuit pattern may be performed using a well-known technique generally known in the art, such as an additive method, in addition to a subtractive method of etching a metal layer according to a predetermined pattern. It can be patterned.

At this time, the plating layer of the portion in contact with the vias 150 formed in the process step is etched together. In the conventional method of manufacturing a printed circuit board, the plating layer of a portion in contact with the via is left as it is, without being etched, and used as a lower via pad. By forming the via 150 so as to ensure sufficient electrical connection with the connection, through which the internal circuit pattern 120 and the external circuit pattern 140 is connected, thereby preventing the miniaturization, thinning, high density of the printed circuit board, etc. Etching the plating layer of the lower via pad, that is, the portion in contact with the via 150.

Then, as shown in FIG. The insulating layer 130 covering the internal circuit pattern 120 is stacked, and the blind via hole 150c penetrating the insulating layer 130 is processed at a predetermined position.

The blind via hole 150c may be a laser (eg, a Neodymium-doped Yttrium Aluminum Garnet (Nd-YAG) laser, a CO2 laser, an ultra-violet excimer laser), or a mechanical drill (eg, CNC). Drill).

Lastly, as shown in FIG. 6, a via 150 is formed by filling and plating the inside of the blind via hole 150c, and an external circuit pattern 140 is formed on the insulating layer 130. The printed circuit board 100 according to the invention is finally completed.

The inside of the blind via hole 150c is not particularly limited as a filling plating method. For example, electroless plating, electroplating, screen printing, sputtering, evaporation, ink jetting, etc. , Any one of dispensing, or a combination thereof. As the filling material, any one of metals selected from the group consisting of copper, gold, silver, nickel, and alloys thereof having excellent electrical conductivity may be used.

In addition, similar to the internal circuit pattern 120, the external circuit pattern 140 may be formed by patterning a plating layer formed on the insulating layer 130 through electroless copper plating and electrolytic copper plating using a known technique.

Meanwhile, in the method of manufacturing a printed circuit board according to the present invention, as shown in FIG. 7, in order to protect the external circuit pattern 140 from an external environment, a solder resist layer 170 covering the external circuit pattern 140 is applied. The steps can be further performed.

The foregoing detailed description is illustrative of the present invention. It is also to be understood that the foregoing is illustrative and explanatory of preferred embodiments of the invention only, and that the invention may be used in various other combinations, modifications and environments. That is, it is possible to make changes or modifications within the scope of the concept of the invention disclosed in this specification, the disclosure and the equivalents of the disclosure and / or the scope of the art or knowledge of the present invention. The foregoing embodiments are intended to illustrate the best mode contemplated for carrying out the invention and are not intended to limit the scope of the present invention to other modes of operation known in the art for utilizing other inventions such as the present invention, Various changes are possible. Accordingly, the foregoing description of the invention is not intended to limit the invention to the precise embodiments disclosed. It is also to be understood that the appended claims are intended to cover such other embodiments.

100: printed circuit board
110: Base substrate
120: internal circuit pattern
130: insulating layer
140: external circuit pattern
150: Via
160: inside via hole
170: solder resist layer

Claims (6)

A base substrate;
Internal circuit patterns formed on one or both surfaces of the base substrate;
An insulating layer covering the internal circuit pattern;
An external circuit pattern formed on the insulating layer; And
A via penetrating the insulating layer to connect the internal circuit pattern and the external circuit pattern;
, ≪ / RTI &
Adjacent portions of the bottom of the vias,
Coated with an insulating layer except for a connection point with the internal circuit pattern,
Printed circuit board.
The method of claim 1,
The via is composed of a plurality,
The plurality of vias are located adjacent to each other,
Printed circuit board.
The method of claim 1,
The internal circuit pattern and the external circuit pattern, and the vias,
Made of any one of metals selected from the group consisting of copper, gold, silver, nickel and alloys thereof;
Printed circuit board.
The method of claim 1,
The external circuit pattern is composed of a plurality of layers,
The upper circuit pattern and the lower circuit pattern are connected through vias passing through the insulating layers stacked therebetween,
Adjacent portions of the bottom of the vias,
Coated with an insulating layer except for the connection point with the underlying circuit pattern,
Printed circuit board.
Preparing a base substrate;
Forming a plating layer on one or both surfaces of the base substrate and patterning the plating layer to form an internal circuit pattern;
Stacking an insulating layer covering the internal circuit pattern, and processing a via hole penetrating the insulating layer at a predetermined position; And
Charge plating the inside of the via hole and forming an external circuit pattern on the insulating layer;
, ≪ / RTI &
Etching the plating layer at a portion contacting the via when forming the internal circuit pattern;
A method of manufacturing a printed circuit board.
The method of claim 5, wherein
The internal circuit pattern and the external circuit pattern,
It is formed of any one of an additive method, a subtractive method, or a semi-additive method,
A method of manufacturing a printed circuit board.

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