KR20130005837A - Light emitting device, method for fabricating the same, and light emitting device package - Google Patents

Abstract

The light emitting device according to the embodiment may include a light emitting structure including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer between the first conductive semiconductor layer and the second conductive semiconductor layer; An electrode on the light emitting structure; A current blocking layer corresponding to a thickness direction of the electrode and the light emitting structure under the light emitting structure; A channel layer disposed around a bottom surface of the light emitting structure; A conductive layer in contact with a bottom surface of the light emitting structure and disposed below the current blocking layer; A reflective electrode layer under the conductive layer; A first capping layer disposed between the reflective electrode layer and the conductive layer and corresponding to a circumference of the current blocking layer; And a support member under the reflective electrode layer.

Description

LIGHT EMITTING DEVICE, METHOD FOR FABRICATING THE SAME, AND LIGHT EMITTING DEVICE PACKAGE}

Embodiments relate to a light emitting device, a light emitting device manufacturing method, and a light emitting device package.

III-V nitride semiconductors (group III-V nitride semiconductors) are widely recognized as key materials for light emitting devices such as light emitting diodes (LEDs) and laser diodes (LD) due to their physical and chemical properties. Ⅲ-Ⅴ nitride semiconductor is made of a semiconductor material having a compositional formula of normal _{In x Al y Ga 1 -x- y} N (0≤x≤1, 0≤y≤1, 0≤x + y≤1).

Light emitting diodes (LEDs) are a type of semiconductor device that transmits and receives signals by converting electricity into infrared rays or light using characteristics of a compound semiconductor.

 LEDs or LDs using such nitride semiconductor materials are widely used in light emitting devices for obtaining light, and have been applied to light sources of various products such as keypad light emitting units, display devices, electronic displays, and lighting devices of mobile phones.

The embodiment provides a light emitting device including a capping layer capable of improving a bonding force between a current blocking and a conductive layer disposed under the light emitting structure, and a light emitting device package having the same.

The embodiment provides a light emitting device and a light emitting device package including the capping layer capable of improving the bonding force between the channel layer and the conductive layer disposed below the light emitting structure.

The embodiment provides a light emitting device capable of improving a bonding force between a channel layer and a current blocking layer and a conductive layer disposed under the light emitting structure, and a light emitting device package having the same.

The light emitting device according to the embodiment may include a light emitting structure including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer between the first conductive semiconductor layer and the second conductive semiconductor layer; An electrode on the light emitting structure; A current blocking layer corresponding to a thickness direction of the electrode and the light emitting structure under the light emitting structure; A channel layer disposed around a bottom surface of the light emitting structure; A conductive layer in contact with a bottom surface of the light emitting structure and disposed below the current blocking layer; A reflective electrode layer under the conductive layer; A first capping layer disposed between the reflective electrode layer and the conductive layer and corresponding to a circumference of the current blocking layer; And a support member under the reflective electrode layer.

A light emitting device according to an embodiment includes a light emitting structure including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer between the first conductive semiconductor layer and the second conductive semiconductor layer; An electrode on the light emitting structure; A current blocking layer corresponding to a thickness direction of the electrode and the light emitting structure under the light emitting structure; A channel layer disposed around a bottom surface of the light emitting structure; A conductive layer in contact with a bottom surface of the light emitting structure and disposed below the current blocking layer; A first capping layer between the current blocking layer and the conductive layer; A reflective electrode layer under the conductive layer; And a support member under the reflective electrode layer.

A method of manufacturing a light emitting device according to the embodiment includes: forming a light emitting structure including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer on a substrate; Forming a channel layer around an upper surface of the second conductive semiconductor layer; Forming a current blocking layer on an upper surface of the second conductive semiconductor layer; Forming a conductive layer on the top surface of the second conductive semiconductor layer, the channel layer, and the current blocking layer; Forming a capping layer on the conductive layer; Forming a reflective electrode layer on the conductive layer and the capping layer; And forming a conductive support member on the reflective electrode layer, wherein the capping layer is disposed corresponding to at least one of a circumference of the current blocking layer and a circumference of the channel layer.

Embodiments can improve the adhesion between the conductive layer and an insulating material layer such as a channel layer or a current blocking layer under the light emitting structure.

Embodiments can prevent damage to the reflective electrode layer below the light emitting structure.

Embodiments can improve the reliability of the light emitting device and the light emitting device package having the same.

1 is a side sectional view showing a light emitting device according to the first embodiment.
2 to 12 are views illustrating a manufacturing process of the light emitting device of FIG. 1.
13 is a side sectional view showing a light emitting device according to the second embodiment.
14 is an enlarged view of a capping layer of the light emitting device of FIG. 13.
FIG. 15 is a diagram illustrating another example of the capping layer of FIG. 14.
16 is a view illustrating still another example of the capping layer of FIG. 14.
17 is a side sectional view showing a light emitting device according to the third embodiment.
18 is a side sectional view showing a light emitting device according to the fourth embodiment.
19 to 29 are views illustrating a manufacturing process of the light emitting device of FIG. 18.
30 is a side sectional view showing a light emitting device according to the fifth embodiment.
FIG. 31 is an enlarged view of a capping layer of the light emitting device of FIG. 30.
32 is a diagram illustrating another example of the capping layer of FIG. 31.
33 is a view illustrating still another example of the capping layer of FIG. 31.
34 is a side sectional view showing a light emitting device according to the third embodiment.
35 is a view showing a light emitting device package having a light emitting device of the embodiment.
36 illustrates a display device including the light emitting device package of FIG. 1, according to an exemplary embodiment.
37 is a diagram illustrating another example of a display device including the light emitting device package of FIG. 1, according to an exemplary embodiment.
FIG. 38 is a view illustrating a lighting device having the light emitting device package of FIG. 1 according to an embodiment. FIG.

Hereinafter, a light emitting device and a method of manufacturing the same according to an embodiment will be described in detail with reference to the accompanying drawings. In the description of an embodiment, each layer (film), region, pattern, or structure is formed “on” or “under” a substrate, each layer (film), region, pad, or pattern. In the case where it is described as "to", "on" and "under" include both "directly" or "indirectly" formed. In addition, the criteria for the above / above or below of each layer will be described with reference to the drawings. The thickness and size of each layer in the drawings are exaggerated, omitted, or schematically shown for convenience and clarity of explanation. Also, the size of each component does not entirely reflect the actual size.

1 is a side sectional view showing a light emitting device according to the first embodiment.

Referring to FIG. 1, the light emitting device 100 includes a light emitting structure 135 having a plurality of compound semiconductor layers 110, 120, and 130, an electrode 115, a channel layer 142, a current blocking layer 144, and a first capping layer. 146, a second capping layer 147, a conductive layer 148, a reflective electrode layer 152, a barrier layer 154, a bonding layer 156, and a support member 170.

The light emitting device 100 may be implemented as a light emitting diode (LED) including a compound semiconductor, for example, a compound semiconductor of a group III-V element, and the LED may be visible to emit light such as blue, green, or red. It may be an LED of the light band or UV LED of the ultraviolet band, but is not limited thereto.

The light emitting structure 135 includes a first conductive semiconductor layer 110, an active layer 120, and a second conductive semiconductor layer 130.

The first conductive semiconductor layer 110 is a compound semiconductor of Group III-V elements doped with a first conductive dopant, for example, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP and the like can be selected. A semiconductor layer having a compositional formula of the first conductive semiconductor layer 110 is _{In x Al y Ga 1 -x- y} N (0≤x≤1, 0≤y≤1, 0≤x + y≤1) It may include. The first conductive semiconductor layer 110 is an N-type semiconductor layer, and the first conductive dopant includes an N-type dopant such as Si, Ge, Sn, Se, Te, or the like. The first conductive semiconductor layer 110 may be formed as a single layer or a multilayer, but is not limited thereto. The top surface of the first conductive semiconductor layer 110 may have a roughness or pattern, such as the light extraction structure 112, for light extraction efficiency, and a transparent electrode layer may be selectively formed for current diffusion and light extraction. But it is not limited thereto.

A portion 194 of the insulating layer 190 may be formed on the upper surface of the light emitting structure 135, and the insulating layer 190 is a layer having a refractive index lower than that of the compound semiconductor layer of the group III-V element. The material is SiO ₂ , SiO _x , SiO _x N _y , Si ₃ N ₄ , Al ₂ O ₃ , TiO ₂ ≪ / RTI >

The electrode 115 may be formed on the first conductive semiconductor layer 110. The electrode 115 may be a pad or may include a branched electrode pattern connected to the pad, but is not limited thereto. Roughness in the form of irregularities may be formed on an upper surface of the electrode 115, but is not limited thereto. The lower surface of the electrode 115 may be formed in a concave-convex shape by the light extraction structure 112, but is not limited thereto.

The electrode 115 is in ohmic contact with an upper surface of the first conductive semiconductor layer 110, and any one of Cr, Ti, Al, In, Ta, Pd, Co, Ni, Si, Ge, Ag, Cu, and Au One or more materials may be mixed to form a single layer or multiple layers. The electrode 115 may be selected from the above materials in consideration of ohmic contact with the first conductive semiconductor layer 110, adhesion between the metal layers, reflective properties, and conductive properties.

The active layer 120 is formed under the first conductive semiconductor layer 110 and includes at least one of a single quantum well structure, a multi-quantum well structure, a quantum-wire structure, or a quantum dot structure. It can be formed of either. The active layer 120 may be formed using a compound semiconductor material of group III-V elements, such as a period of a well layer and a barrier layer, for example, a period of an InGaN well layer / GaN barrier layer, a period of an InGaN well layer / AlGaN barrier layer, or It may be formed in a cycle of the InGaN well layer / InGaN barrier layer. The barrier layer may be formed of a material having a band gap higher than that of the well layer.

A first conductive type and / or a second conductive type cladding layer may be formed on or under the active layer 120, and the first and second conductive cladding layers may be formed of an AlGaN-based semiconductor. . The band gap of the conductive clad layer may be higher than the band gap of the barrier layer of the active layer 120.

The second conductive semiconductor layer 130 is formed under the active layer 120, and is a compound semiconductor of a Group III-V group element doped with a second conductive dopant, for example, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP and the like can be selected. The second conductive type semiconductor layer 130 is a semiconductor layer having a compositional formula of _{In x Al y Ga 1 -x- y} N (0≤x≤1, 0≤y≤1, 0≤x + y≤1) It may include. The second conductive semiconductor layer 130 is a P-type semiconductor layer, and the second conductive dopant includes a P-type dopant such as Mg and Zn. The second conductive semiconductor layer 130 may be formed as a single layer or a multilayer, but is not limited thereto.

The outer side of the light emitting structure 135 may be formed to be inclined or vertical. Here, the width of the upper surface of the light emitting structure 135 may be formed wider than the width of the lower surface, this width difference may form a side surface of the light emitting structure 135 in an inclined structure.

The light emitting structure 135 may further include a third conductive semiconductor layer under the second conductive semiconductor layer 130, and the third conductive semiconductor layer may be opposite to the second conductive semiconductor layer. It can have polarity. In addition, the first conductive semiconductor layer 110 may be a P-type semiconductor layer, and the second conductive semiconductor layer 130 may be implemented as an N-type semiconductor layer. Accordingly, the light emitting structure 135 may include at least one of an NP junction, a PN junction, an NPN junction, and a PNP junction structure. Hereinafter, for convenience of description, the lower layer of the light emitting structure 135 will be described as an example in which a second conductive semiconductor layer is disposed.

The channel layer 142, the current blocking layer 144, the conductive layer 148, and the reflective electrode layer 148 are disposed below the second conductive semiconductor layer 130.

The channel layer 142 is disposed around the lower surface of the second conductive semiconductor layer 130, and the current blocking layer 144 is disposed on the lower surface of the second conductive semiconductor layer 130.

An inner portion of the channel layer 142 may be disposed under the light emitting structure 135 and may contact the bottom surface of the second conductive semiconductor layer 130. An outer portion of the channel layer 142 may be disposed on an outer line from below the light emitting structure 135 than to the side surface of the light emitting structure 135.

The outer portion of the channel layer 142 is disposed in the channel region, which is an outer region than the side surface of the second conductive semiconductor layer 130. The channel region may have a stepped structure between the light emitting structure 135 and the conductive member 160 and may be a peripheral region of an upper portion of the light emitting device.

The channel layer 142 may be formed of a light transmitting material, and the light transmitting material may be selected from a metal oxide or a metal nitride. The channel layer 142 may be formed of, for example, indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc oxide (IZON), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IZO), or indium gallium zinc oxide (IGZO). ), IGTO (indium gallium tin oxide), AZO (aluminum zinc oxide), ATO (antimony tin oxide), GZO (gallium zinc oxide), SiO ₂ , SiOx, SiOxNy, Si ₃ N ₄ , Al ₂ O ₃ , TiO ₂ And the like. The refractive index of the channel layer 142 may be formed of a material having a refractive index lower than that of the compound semiconductor layer, for example, a transparent nitride, a transparent oxide, and a transparent insulating layer.

The channel layer 142 may receive a portion of the light emitted from the active layer 120 and emit the light through the surface. Accordingly, the light extraction efficiency can be improved.

The channel layer 142 may be formed of a metallic material, and the metallic material may improve adhesion to the bottom surface of the light emitting structure 135.

An inner portion of the channel layer 142 contacts the bottom surface of the second conductive semiconductor layer 130 by a predetermined width D3. Here, the D3 is within a few ~ several tens of ㎛, may vary depending on the chip size.

The channel layer 142 may be formed in a pattern such as a loop shape, a ring shape, or a frame shape around a lower surface of the second conductive semiconductor layer 130. The channel layer 142 may include a continuous pattern shape or a discontinuous pattern shape, or may be formed on a path of a laser irradiated to the channel region during the manufacturing process.

When the channel layer 142 is SiO ₂ , the refractive index is about 2.3, the ITO refractive index is about 2.1, and the GaN refractive index is about 2.4, and the channel layer 142 is formed through the second conductive semiconductor layer 130. The light incident on) may be emitted to the outside.

An insulating layer 190 may be further formed on an upper surface of the outer side of the channel layer 142, and the insulating layer 190 is adhered to an upper surface of the channel layer 142 to form a side surface of the light emitting structure 135. Will be protected. In addition, the channel layer 142 may provide a high humidity resistant LED by preventing a short from occurring even when the outer wall of the light emitting structure 135 is exposed to moisture. Since the channel layer 142 transmits a laser beam irradiated during laser scribing in the case of a light transmissive material, it prevents fragmentation of the metal material due to the laser in the channel region, thereby preventing an interlayer short circuit problem in the sidewall of the light emitting structure 135. You can prevent it.

The channel layer 142 may space the gap between the outer walls of the layers 110, 120, and 130 of the light emitting structure 135 and the barrier layer 154. The channel layer 142 may be formed to a thickness of 0.02 ~ 5㎛, the thickness may vary depending on the chip size.

The current blocking layer 144 is formed in a part of the region between the reflective electrode layer 152 and the second conductive semiconductor layer 130 and is formed of a non-metallic material having lower electrical conductivity than the reflective electrode layer 152. Can be. The current blocking layer 145 may be formed of, for example, indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IZAZO), indium gallium zinc oxide (IGZO), or indium IGTO (IGTO). gallium tin oxide), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO), ZnO, SiO ₂ , SiO _x , SiO _x N _y , Si ₃ N ₄ , Al ₂ O ₃ , TiO At least one of _two . Here, when the reflective electrode layer 152 is Al, Ag, the current blocking layer 145 may be formed of a material such as ITO, ZnO, SiO ₂ . Here, the current blocking layer 144 and the channel layer 142 may be formed of the same material for the convenience of the manufacturing process, but is not limited thereto.

The position of the current blocking layer 144 may be formed at a position corresponding to the electrode 115. That is, at least a portion of the current blocking layer 144 may be formed to overlap the area of the lower surface of the electrode 115 in the thickness direction of the light emitting structure 135. The upper surface area of the current blocking layer 144 is 80% or more of the lower surface area of the electrode 115, and may be smaller or larger than the lower surface area of the electrode 115. The current blocking layer 145 may be formed in the same shape as the pattern of the electrode 115, but is not limited thereto. The current blocking layer 145 may change the path of the current delivered to the electrode 115.

The electrode 115 and the current blocking layer 144 may be formed in one or a plurality, but are not limited thereto.

The conductive layer 148 may be in ohmic contact with a bottom surface of the second conductive semiconductor layer 130. The conductive layer 148 may be further formed below the channel layer 142 and the current blocking layer 144. The conductive layer 148 may be formed to a thickness of 20 to 50 nm, and the material may include a conductive oxide and a conductive nitride, for example, indium tin oxide (ITO), indium zinc oxide (IZO), or IZO nitride (IZON). , Indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IAZO), indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium (GZO) zinc oxide). The conductive layer 148 may not be formed on the bottom surface of the channel layer 142, but is not limited thereto.

The first capping layer 146 and the second capping layer 147 are disposed between the conductive layer 148 and the reflective electrode layer 152, and the first capping layer 146 is the current blocking layer 144. It is formed in the region overlapping with the perimeter, and has a ring shape, a loop shape or a frame shape, and includes a continuous or discontinuous shape. The second capping layer 147 is formed around the inner side of the channel layer 142. Since the second capping layer 147 does not cover the outer periphery of the channel layer 142, the second capping layer 147 may be formed in a discontinuous shape.

The first capping layer 146 and the second capping layer 147 may be formed on the stepped area or the rough surface of the conductive layer 148 to form a metal void during the formation of the reflective electrode layer 152. ) Can be suppressed from occurring. Here, the metal voids may be generated by a migration of metals such as Ag, and the metal voids may reduce reflection characteristics or prevent bonding between metals. In addition, the voids are formed in the size of several tens of nm to several hundred nm, which may cause the forward current to increase. According to the embodiment, the first capping layer 146 and the second capping layer 147 are formed in the stepped region or the rough surface of the conductive layer 148, thereby capping the stepped region or the rough surface with a metal material. capping). Accordingly, the generation of metal voids caused by the reflective electrode layer 152 in the stepped region or the rough surface can be suppressed, so that the reflection efficiency due to the reflective electrode layer 152 can be improved, and the characteristic change of the forward current can be improved. It can reduce, and the factor which affects the performance or reliability of a light emitting element can be reduced.

The center of the first capping layer 146 is open, and the reflective electrode layer 152 and the conductive layer 148 are in contact with each other through the center of the first capping layer 146. The contact areas of the first capping layer 146, the reflective electrode layer 152, and the conductive layer 148 may be contact between different materials, thereby enhancing physical adhesive force. Accordingly, the metal void may not be generated in the region where the adhesion is enhanced.

The second capping layer 147 opens the lower portion of the channel layer 142, and the second capping layer 147, the reflective electrode layer 152, and the conductive layer 148 are in contact with each other. The contact areas of the second capping layer 147, the reflective electrode layer 152, and the conductive layer 148 may be a contact between different materials to enhance physical adhesive strength. The first capping layer 146 ) May be formed under the conductive layer 148 corresponding to the circumference of the lower surface of the current blocking layer 144, and the first contact portion 147 of the second capping layer 147. '-1' may be formed below the conductive layer 148 corresponding to the circumference of the lower surface of the channel layer 142.

The first capping layer 146 is formed under the conductive layer 148 corresponding to the stepped region of the current blocking layer 144, and the second capping layer 147 is formed on the channel layer 42. It is formed under the conductive layer 148 corresponding to the stepped region.

The first capping layer 146 and the second capping layer 147 may be formed of a metal material, for example, among Ti, Ni, Pt, Pd, Rh, Ir, W, and an alloy including any one thereof. It may include at least one. The first capping layer 146 and the second capping layer 147 may be formed of the same metal material, for example, Ni or Ni-Alloy, but is not limited thereto. By forming a thin thickness of the first capping layer 146 and the second capping layer 147, even if the metal material can be transmitted light, it is possible to prevent the weakening of the adhesion between the different layers (148,152). The thickness of the first capping layer 146 and the second capping layer 147 may be formed to 100 ~ 500Å, but is not limited thereto. The metal material of the first capping layer 146 and the second capping layer 147 caps the stepped region or the rough surface of the conductive layer 148, thereby metal bonding with the reflective electrode layer 152. In this region, metal voids may be prevented from being generated.

In addition, the length of the first capping layer 146 is formed longer than the thickness of the current blocking layer 144 to cover the side of the current blocking layer 144. The length of the second capping layer 147 may be longer than the thickness of the channel layer 142 to cover the side surface of the channel layer 142.

A reflective electrode layer 152 is formed below the conductive layer 148 and the first and second capping layers 146 and 147, and the reflective electrode layer 152 is partially or entirely partially formed on the lower surface of the conductive layer 148. To cover.

The reflective electrode layer 152 is electrically connected to the conductive layer 148 and supplies power. The width of the reflective electrode layer 152 may be formed to be at least larger than the width of the light emitting structure 135, in this case it can effectively reflect the incident light. Accordingly, the light extraction efficiency can be improved.

The reflective electrode layer 152 is formed not to be exposed to the side surface of the light emitting device, which can prevent damage in the channel region of the light emitting structure 135 by the metal material of the reflective electrode layer 152.

The reflective electrode layer 152 may be formed in a single layer or multiple layers by selectively using a material composed of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, Hf, and a combination thereof. Can be. The reflective electrode layer 152 may be formed in multiple layers using the above materials and materials such as IZO, IZTO, IAZO, IGZO, IGTO, AZO, and ATO. For example, IZO / Ni, AZO / Ag, IZO / Ag / Ni, AZO / Ag / Ni and the like can be laminated. The thickness of the reflective electrode layer 152 may be formed to a thickness of 150 ~ 300nm, but is not limited thereto.

The barrier layer 154 may be formed under the reflective electrode layer 152 and may contact the conductive layer 148 disposed under the channel layer 142, but is not limited thereto. The barrier layer 154 may be a barrier metal, and may include at least one of Ti, W, Pt, Pd, Rh, and Ir, and block the influence of the reflective electrode layer 152 from the bonding layer 156. Will be done. The barrier layer 154 may have a thickness of 300 to 500 nm, but is not limited thereto.

A bonding layer 156 is formed below the barrier layer 154, and the bonding layer 156 bonds the support member 170 to the barrier layer 154.

The bonding layer 156 may include at least one of a bonding metal, for example, Ti, Au, Sn, Ni, Cr, Ga, In, Bi, Cu, Ag, or Ta. The bonding layer 156 serves as a bonding layer, for example, and a support member 170 is bonded thereunder. The support member 170 may be attached to the support member 170 under the reflective electrode layer 152 by plating or a conductive sheet without forming the bonding layer 156 and the barrier layer 154. The thickness of the bonding layer 156 may be formed of 5 ~ 9㎛, but is not limited thereto.

A support member 170 is formed below the bonding layer 156, and the support member 170 is a base substrate, and includes copper (Cu), gold (Au), nickel (Ni), and molybdenum (Mo). , Copper-tungsten (Cu-W) and the like. In addition, the support member 170 may be implemented as a carrier wafer (eg, Si, Ge, GaAs, ZnO, SiC, SiGe, Ga ₂ O ₃ , GaN, etc.). In addition, the support member 170 may not be formed or implemented as a conductive sheet. The support member 170 may be formed to 50 ~ 300㎛, it is not limited thereto.

The conductive layer 148, the reflective electrode layer 152, the barrier layer 154, and the bonding layer 156 may be defined as the conductive member 160 or the electrode member.

2 to 13 are views illustrating a manufacturing process of the light emitting device of FIG. 1.

2 and 3, the substrate 101 is loaded onto growth equipment, and a compound semiconductor of group 2 to 6 elements may be formed in a layer or pattern form thereon.

The growth equipment may be an electron beam evaporator, physical vapor deposition (PVD), chemical vapor deposition (CVD), plasma laser deposition (PLD), dual-type thermal evaporator sputtering, metal organic chemical vapor (MOCVD) deposition) and the like, and the like is not limited to such equipment.

The substrate 101 may be selected from an insulating, transmissive, or conductive material as a substrate, for example, sapphire substrate (Al ₂ 0 ₃ ), GaN, SiC, ZnO, Si, GaP, InP, Ga ₂ 0 ₃ , conductive Substrate, and GaAs. An uneven structure may be formed on the upper surface of the substrate 101. In addition, between the substrate 101 and the light emitting structure 135, a layer or a pattern using a compound semiconductor of Group 2 to Group 6 elements is, for example, a ZnO layer (not shown), a buffer layer (not shown), an undoped semiconductor layer (not shown). At least one layer may be formed. The buffer layer or the undoped semiconductor layer may be formed using a compound semiconductor of group III-V group elements, and the buffer layer may reduce the difference in lattice constant between the substrate and the compound semiconductor, and the undoped semiconductor layer may be It may be formed of a nitride-based semiconductor that is not doped. The undoped semiconductor layer may have lower conductivity than the first conductive semiconductor layer 110 and may improve crystallinity of the first conductive semiconductor layer 110.

A first conductive semiconductor layer 110 is formed on the substrate 101, an active layer 120 is formed on the first conductive semiconductor layer 110, and a second conductive semiconductor layer is formed on the active layer 120. 130 is formed.

The first conductive semiconductor layer 110 is a compound semiconductor of a group III-V element doped with a first conductive dopant, for example, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP , AlGaInP and the like. When the first conductive type is an N type semiconductor, the first conductive type dopant includes an N type dopant such as Si, Ge, Sn, Se, Te, or the like. The first conductive semiconductor layer 110 may be formed as a single layer or a multilayer, but is not limited thereto.

An active layer 120 is formed on the first conductive semiconductor layer 110, and the active layer 120 may be formed as a single quantum well structure or a multi quantum well structure. The active layer 120 may be formed using a compound semiconductor material of Group 3-5 elements, such as a period of a well layer and a barrier layer, for example, a period of an InGaN well layer / GaN barrier layer, a period of an InGaN well layer / AlGaN barrier layer, InGaN well layer / InGaN barrier layer may be formed in a cycle, and the like, but is not limited thereto. The band gap of the barrier layer may be wider than the band gap of the well layer.

The first conductive type and / or the second conductive cladding layer may be formed on or under the active layer 120, and the first and second conductive cladding layers may be formed of a nitride based semiconductor. . The first and second conductive clad layers may be formed of a material having a band gap wider than the band gap of the barrier layer.

The second conductive semiconductor layer 130 is formed on the active layer 120, and the second conductive semiconductor layer 130 is a compound semiconductor of a Group 3-5 element doped with a second conductive dopant. GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP and the like. When the second conductive type is a P type semiconductor, the second conductive type dopant includes a P type dopant such as Mg and Zn. The second conductive semiconductor layer 130 may be formed as a single layer or a multilayer, but is not limited thereto.

The first conductive semiconductor layer 110, the active layer 120, and the second conductive semiconductor layer 130 may be defined as a light emitting structure 135. In addition, a third conductive semiconductor layer, for example, an N-type semiconductor layer, having a polarity opposite to that of the second conductive type may be further formed on the second conductive semiconductor layer 130. Accordingly, the light emitting structure 135 may have at least one of an N-P junction, a P-N junction, an N-P-N junction, and a P-N-P junction structure.

3 and 4, the channel layer 142 is formed at the boundary of the unit chip size T1. The channel layer 142 may have a ring shape, a loop shape, a frame shape, and the like, and may be formed in a continuous pattern shape or a discontinuous pattern shape. The channel layer 142 may be selected from a material having a lower refractive index than a group III-V compound semiconductor, for example, a metal oxide, a metal nitride, or an insulating material. For example, the channel layer 142 may be formed of indium tin oxide (ITO), indium zinc oxide (IZO), or IZTO. (indium zinc tin oxide), indium aluminum zinc oxide (IAZO), indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO) ), SiO ₂ , SiO _x , SiO _x N _y , Si ₃ N ₄ , Al ₂ O ₃ , TiO _2, and the like.

In addition, a current blocking layer 144 in contact with an upper surface of the second conductive semiconductor layer 130 is formed in an inner region of the channel layer 142. The current blocking layer 144 may be formed of a metal oxide. For example, the current blocking layer 144 may be selected from SiO ₂ , SiO _x , SiO _x N _y , Si ₃ N ₄ , Al ₂ O ₃ , TiO _2, and the like. The channel layer 142 and the current blocking layer 144 are made of the same material and may be formed by the same process. The channel layer 142 and the current blocking layer 144 may be masked and patterned by photolithography, and may be formed by using a material such as a sputtering method or a deposition method.

As another method of forming the channel layer 142 and the current blocking layer 144, after forming a metal oxide layer, a region of the metal oxide layer to be protected is masked using a mask pattern, Is removed by wet etching. Accordingly, the channel layer 142 and the current blocking layer 144 may be formed in a predetermined area.

Referring to FIG. 4, a conductive layer 148 is formed on the second conductive semiconductor layer 130. The conductive layer 148 is in ohmic contact with the second conductive semiconductor layer 130. The conductive layer 148 may be formed of a sputter or deposition apparatus using a material such as a metal oxide.

The conductive layer 148 may be further formed on the surfaces of the channel layer 142 and the current blocking layer 144.

Referring to FIG. 5, a first capping layer 146 and a second capping layer 147 are formed under the conductive layer 148. The first capping layer 146 and the second capping layer 147 may be formed in a region in which a mask pattern is not formed by a sputtering method or a deposition method such as an E-beam.

The first capping layer 146 is formed in a stepped area or a rough surface by the current blocking layer 144 on the bottom surface of the conductive layer 148 and corresponds to the center of the top surface of the current blocking layer 144. The area to be formed, that is, the flat area may not be formed.

The second capping layer 147 is formed in a stepped area or a rough surface of the conductive layer 148 by the channel layer 142, and corresponds to a central portion of the upper surface of the channel layer 142. That is, the flat area may not be formed.

The first capping layer 146 and the second capping layer 147 may be formed of a metal material, for example, at least among Ti, Ni, Pt, Pd, Rh, Ir, W, and an alloy including any one thereof. It may include one. The first capping layer 146 and the second capping layer 147 may be formed of the same metal material, for example, Ni or Ni-Alloy, but is not limited thereto.

6 and 7, the reflective electrode layer 152 and the barrier layer 154 are formed on the conductive layer 148. The reflective electrode layer 152 may be deposited by an E-beam (electron beam) method or formed by a sputtering method. The reflective electrode layer 152 is formed of a material having a reflective property of 70% or more, such as Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, Hf, and a material composed of an optional alloy thereof. It may be formed in a single layer or multiple layers. In addition, the reflective electrode layer 152 may be formed in a multilayer using the metal material and conductive oxide materials such as IZO, IZTO, IAZO, IGZO, IGTO, AZO, and ATO. For example, IZO / Ni, AZO / Ag , IZO / Ag / Ni, AZO / Ag / Ni and the like. When the heat treatment or bonding process is performed on the reflective electrode layer 152, a migration of metals such as Ag may occur, which becomes a metal void. In this case, the metal agglomeration region as described above is a stepped region or a rough region by the channel layer 142 and the current blocking layer 144, and affects the surface of the conductive layer 148. According to an embodiment, the reflective metal layer 152 may be provided by providing the adhesive region between the metal in the stepped region or the rough surface of the conductive layer 148 by the first capping layer 146 and the second capping layer 147. It is possible to suppress the formation of some substances of voids.

The reflective electrode layer 152 may be formed up to the channel layer 142. Since the reflective electrode layer 152 is implemented using a reflective metal, the reflective electrode layer 152 may serve as an electrode.

A barrier layer 154 is formed on the reflective electrode layer 152, and the barrier layer 154 may be formed by a sputtering or deposition method. The barrier layer 154 may include at least one of Ti, W, Pt, Pd, Rh, and Ir as a barrier metal. The barrier layer 154 may also be in contact with the top surface of the conductive layer 148, but is not limited thereto.

The bonding layer 156 is formed on the barrier layer 154. The bonding layer 156 may be formed by a sputtering or deposition method, and the material may be a metal, for example, at least one of Ti, Au, Sn, Ni, Cr, Ga, In, Bi, Cu, Ag, or Ta. It may include, but is not limited thereto.

The bonding layer 156 is a bonding layer, and the support member 170 may be bonded thereon. The support member 170 is a conductive support member, and includes copper (Cu), gold (Au), nickel (Ni), molybdenum (Mo), copper-tungsten (Cu-W), and a carrier wafer (eg, Si, Ge, GaAs, ZnO, SiC, SiGe, Ga ₂ O ₃ , GaN, etc.) may be implemented. The support member 170 may be bonded to the bonding layer 156, formed as a plating layer, or attached in the form of a conductive sheet. In an embodiment, the bonding layer 156 and the barrier layer 154 may not be formed. In this case, the conductive support member 170 may be formed on the reflective electrode layer 152.

8 and 9, the support member 170 is positioned at the base, and the substrate 101 is positioned at the uppermost side. Thereafter, the substrate 101 disposed on the light emitting structure 135 is removed.

The removal method of the substrate 101 may be removed by a laser lift off (LLO) process. The laser lift-off method is a method of irradiating and separating a laser having a wavelength of a predetermined region to the substrate 101. Here, when there is another semiconductor layer (eg, buffer layer) or an air gap between the substrate 101 and the first conductive semiconductor layer 110, the substrate may be separated using a wet etching solution. It does not limit about a removal method.

Referring to FIG. 10, the light emitting structure 135 corresponding to the channel region 105, which is the boundary region of the chip size T1, is removed by isolation etching. That is, a portion of the channel layer 142 may be exposed by isolating the chip and the chip boundary region, and the side surface of the light emitting structure 135 may be inclined or vertically formed.

When the channel layer 142 is a light-transmissive material, the laser irradiated in the isolation etching or laser scribing process is transmitted to thereby transmit a metal material below the barrier layer 154, the bonding layer 156, and the supporting member. It is possible to suppress the material of 170 from protruding in the direction in which the laser is irradiated or generating debris.

Here, the channel layer 142 may transmit the light of the laser, thereby preventing the generation of metal fragments by the laser in the channel region 105, and may protect the outer wall of each layer of the light emitting structure 135.

The upper surface of the first conductive semiconductor layer 110 is etched to form a light extracting structure 112, and the light extracting structure 112 is formed in a roughness or uneven pattern to extract light. Can improve.

Referring to FIG. 11, an electrode 115 is formed on the first conductive semiconductor layer 110. The electrode 115 may be formed by a deposition method or a sputtering method, but is not limited thereto. The number of the electrodes 115 may be formed in one or more, and the positions thereof may be overlapped in the thickness direction of the region of the current blocking layer 144 and the light emitting structure 135. The electrode 115 may include a branched pattern and a pad having a predetermined shape. The formation process of the electrode 115 may be performed before or after chip separation, but is not limited thereto.

Referring to FIG. 12, an insulating layer 190 is formed around the light emitting structure 135. The insulating layer 190 is formed around the chip, and a lower end thereof is formed on the channel layer 142, and a portion 194 of the insulating layer 190 may extend to an upper surface of the first conductive semiconductor layer 110. have. The insulating layer 190 may be formed around the light emitting structure 135 to prevent a short between the layers 110, 120, and 130 of the light emitting structure 135. In addition, the insulating layer 190 and the channel layer 142 may prevent moisture from penetrating into the chip.

The insulating layer 190 may be formed of an insulating material having a lower refractive index than the compound semiconductor (eg, GaN: 2.4), for example, SiO ₂ , SiO _x , SiO _x N _y , Si ₃ N ₄ , Al ₂ O ₃ , TiO _2, or the like. Can be formed.

Then, based on the boundary of the unit chip size (T1) is separated into individual chip units. In this case, the chip-based separation method may selectively use a cutting process, a laser, or a breaking process.

FIG. 13 is a side cross-sectional view illustrating a light emitting device according to a second embodiment, and FIG. 14 is an enlarged view of the first and second capping layers of FIG. 13. In the description of the second embodiment, the same parts as the first embodiment will be referred to the first embodiment.

13 and 14, in the light emitting device 100A, the side surface 144A of the channel layer 142 and the side surface 142A of the current blocking layer 144 may have an inclined structure. The lower surface of the channel layer 142 may be formed narrower than the upper surface, and the lower surface of the current blocking layer 144 may be formed narrower than the upper surface. Here, the angle θ1 between the side surface 144A of the current blocking layer 144 and the bottom surface 131 of the second conductive semiconductor layer may be formed in a range of 10 ° <θ1 <90 °. θ1) may vary depending on the time or material of the wet etching and / or dry etching that proceeds after formation of each layer.

After the channel layer 142 and the current blocking layer 144 are formed as one layer in the process of FIG. 3, the channel layer 142 and the current blocking layer 144 are protected by a mask pattern for a region to be protected, and then wet etching. In this case, the side surface 142A of the channel layer 142 and the side surface 144A of the current blocking layer 144 may be inclined by the wet etching. Here, the inclination angle of the side surface 142A of the channel layer 142 may be the same as or different from the inclination angle θ1 of the side surface 144A of the current blocking layer 144.

In addition, the first capping layer 146 is formed to be inclined to correspond to the inclined side surface 144A of the current blocking layer 144 under the conductive layer 148, the second capping layer 147 ) Is formed to be inclined to correspond to the inclined side surface 142A of the channel layer 142 under the conductive layer 148. The first capping layer 146 is inclined at a predetermined angle θ2 by the inclined side surface of the channel layer 142. Light incident on the reflective electrode layer 152 is reflected and the light distribution may be adjusted by the angle θ2. The second capping layer 46 may be formed on the inclined side surface 144A of the current blocking layer 144 to adjust the light distribution of light.

15 and 16 show another example of FIG. 14.

Referring to FIG. 15, the first contact portion 146-1 of the first capping layer 146 corresponds to the circumference of the lower surface of the current blocking layer 144 under the conductive layer 148, and the second contact portion ( 146-2 is disposed to correspond to the bottom surface 131 of the second conductive semiconductor layer. Accordingly, the first capping layer 146 may suppress the generation of voids by the reflective electrode layer 152 by providing a metal junction region on the stepped structure or the rough surface of the current blocking layer 144.

The first contact portion 147-1 of the second capping layer 147 corresponds to the circumference of the lower surface of the channel layer 142 under the conductive layer 148, and the second contact portion 147-2 corresponds to the first contact portion 147-2. The lower surface 131 of the two-conducting semiconductor layer is disposed to correspond. Accordingly, the second capping layer 147 may suppress the generation of voids by the reflective electrode layer 152 by providing a metal junction region on the stepped structure or the rough surface of the channel layer 142. The second contact portion 146-2 of the first capping layer 146 and the second contact portion 147-2 of the second capping layer 147 correspond to the bottom surface 131 of the second conductive semiconductor layer. In this way, the contact area between the conductive layer 148 and the reflective electrode layer 152 may be adjusted to provide an effect of improving current spreading and adhesion.

Referring to FIG. 16, the second contact portions 146-2 and 147-2 of the first capping layer 146 and the second capping layer 147 correspond to the bottom surface 131 of the second conductive semiconductor layer. It may be further disposed below the conductive layer 148. Current characteristics in a region close to the bottom surface of the second conductive semiconductor layer by adjusting the widths of the second contact portions 146-2 and 147-2 of the first capping layer 146 and the second capping layer 147. It can suppress the change and the generation of metal voids. By removing the first contact portion from the first capping layer 146 and the second capping layer 147, the thickness of the current blocking layer 144 and the channel layer 142 may not be reduced.

17 is a side cross-sectional view of a light emitting device according to the third embodiment.

Referring to FIG. 17, in the light emitting device 100B, the width of the lower surface of the channel layer 142 is smaller than the width of the upper surface, and the side surface 142B is formed of a rough surface such as a stepped structure. The lower surface of the current blocking layer 144 is narrower than the upper surface, and the side surface 144B is formed with a rough surface such as a stepped structure. Here, the stepped structure includes a structure having a plurality of lower surfaces and side surfaces. The rough surface may change or scatter the critical angle of incident light, thereby improving light extraction efficiency.

The conductive layer 148 corresponding to the rough side surfaces 144B and 142B of the current blocking layer 144 and the channel layer 142, the first and second capping layers 146 and 147, and the reflective electrode layer 151 Since the region of is formed roughly, light scattering efficiency can be improved.

In the first to third embodiments, the first and second capping layers have been described as being disposed between the conductive layer 148 and the reflective electrode layer 152. And changing the position of the second capping layer to describe the structure located between the conductive layer, the current blocking layer, and the channel layer. Since the first and second capping layers described below may be formed of the same material as those of the fourth through fourth embodiments, the same reference numerals will be used.

18 is a fourth embodiment.

Referring to FIG. 18, the light emitting device 100C may include a channel layer 142, a current blocking layer 144, a conductive layer 148, and a first capping layer 146 under the second conductive semiconductor layer 130. And a second capping layer 147 is disposed.

The first capping layer 146 is disposed between the current blocking layer 144 and the conductive layer 148, and the second capping layer 147 is the channel layer 142 and the conductive layer 148. Is placed in between. The first capping layer 146 may be formed on the side surface of the current blocking layer 144 to improve the bonding force at the interface between the side surface of the current blocking layer 144 and the conductive layer 148. .

The second capping layer 147 may be formed on an inner side surface of the channel layer 142 and may improve the bonding force at an interface between the channel layer 142 and the conductive layer 148.

The first capping layer 146 and the second capping layer 147 may be formed of a metal material, for example, among Ti, Ni, Pt, Pd, Rh, Ir, W, and an alloy including any one thereof. It may include at least one. The first capping layer 146 and the second capping layer 147 may be formed of the same metal material, for example, Ni or Ni-Alloy, but is not limited thereto. By forming a thin thickness of the first capping layer 146 and the second capping layer 147, even a metal material can transmit light, it is possible to prevent the weakening of the adhesion between the different layers (142, 144, 148). The thickness of the first capping layer 146 and the second capping layer 147 may be formed to 100 ~ 500Å, but is not limited thereto.

The first contact portion 146-1 of the first capping layer 146 may be formed around the bottom surface of the current blocking layer 144, and the bottom surface of the current blocking layer 144 may be formed on the first capping layer ( 146 and the conductive layer 148 may be in contact.

The first contact portion 147-1 of the second capping layer 147 may be formed around the bottom surface of the channel layer 142, and the bottom surface of the channel layer 142 may be the second capping layer 147. And the conductive layer 148 may be in contact.

The conductive layer 148 may be in ohmic contact with a bottom surface of the second conductive semiconductor layer 130. The conductive layer 148 may be formed under the channel layer 142, the current blocking layer 144, the first capping layer 146, and the second capping layer 147. The conductive layer 148 may be formed to a thickness of 20 to 50 nm, and the material may include a conductive oxide and a conductive nitride, for example, indium tin oxide (ITO), indium zinc oxide (IZO), or IZO nitride (IZON). , Indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IAZO), indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium (GZO) zinc oxide). The conductive layer 148 may not be formed on the bottom surface of the channel layer 142, but is not limited thereto. Here, the conductive layer 148 may be formed of a metal material having reflective properties with a metal layer in ohmic contact. That is, the conductive layer 148 may be formed of a material of the reflective electrode layer, and may be stacked with a metal material on the surfaces of the current blocking layer 144 and the channel layer 142.

The reflective electrode layer 152 is formed under the conductive layer 148, and the reflective electrode layer 152 may be formed on the entire lower surface or a portion of the lower surface of the conductive layer 148.

The reflective electrode layer 152 is electrically connected to the conductive layer 148 and supplies power. The width of the reflective electrode layer 152 may be formed to be at least larger than the width of the light emitting structure 135, in this case it can effectively reflect the incident light. Accordingly, the light extraction efficiency can be improved.

19 to 29 are views illustrating a manufacturing process of the light emitting device of FIG. 18.

19 and 20, a first conductive semiconductor layer 110 is formed on a substrate 101, an active layer 120 is formed on the first conductive semiconductor layer 110, and the active layer 120 is formed on the substrate 101. ), A second conductive semiconductor layer 130 is formed.

20 and 21, a channel layer 142 is formed at a boundary of the unit chip size T1. The channel layer 142 may have a ring shape, a loop shape, a frame shape, and the like, and may be formed in a continuous pattern shape or a discontinuous pattern shape. The channel layer 142 may be selected from a material having a lower refractive index than a group III-V compound semiconductor, for example, a metal oxide, a metal nitride, or an insulating material. For example, the channel layer 142 may be formed of indium tin oxide (ITO), indium zinc oxide (IZO), or IZTO. (indium zinc tin oxide), indium aluminum zinc oxide (IAZO), indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO) ), SiO ₂ , SiO _x , SiO _x N _y , Si ₃ N ₄ , Al ₂ O ₃ , TiO _2, and the like.

In addition, a current blocking layer 144 in contact with an upper surface of the second conductive semiconductor layer 130 is formed in an inner region of the channel layer 142. The current blocking layer 144 may be formed of a metal oxide. For example, the current blocking layer 144 may be selected from SiO ₂ , SiO _x , SiO _x N _y , Si ₃ N ₄ , Al ₂ O ₃ , TiO _2, and the like.

Referring to FIG. 21, a first capping layer 146 and a second capping layer 147 are formed around the current blocking layer 144 and the channel layer 142 in a sputtering manner. The current blocking layer 144 and the channel layer 142 are masked on a region to be protected by a mask pattern, and then formed on the periphery of the current blocking layer 144 and the channel layer 142.

The first capping layer 146 may be formed on the entire side of the current blocking layer 144, and a part of the first capping layer 146 may extend to a part of the upper surface of the current blocking layer 144. Here, an inner region of the upper surface of the current blocking layer 144 is opened from the current blocking layer 144.

The second capping layer 147 may be formed on the entire side of the channel layer 142, and a part of the second capping layer 147 may extend to a portion of the upper surface of the channel layer 142. An inner region of the upper surface of the current blocking layer 144 is opened from the channel layer 142.

The first capping layer 146 and the second capping layer 147 may be formed of a metal material, for example, at least among Ti, Ni, Pt, Pd, Rh, Ir, W, and an alloy including any one thereof. It may include one. The first capping layer 146 and the second capping layer 147 may be formed of the same metal material, for example, Ni or Ni-Alloy, but is not limited thereto.

The first capping layer 146 may be formed around the current blocking layer 144 to improve a bonding force at an interface between the current blocking layer 144 and another layer. The second capping layer 147 may be formed on an inner side surface of the channel layer 142 and may improve the bonding force at an interface between the channel layer 142 and another layer.

When the first capping layer 146 and the second capping layer 147 are not formed, at the interface between the current blocking layer 144 and the channel layer 142 and another layer (eg, a conductive layer) Bonding force is weakened, and voids may be generated at the interface. The voids are formed in a size of several tens of nm to several hundred nm, which may cause a forward current to increase. This increase in the forward current can be suppressed and the bonding force between the insulating material layers 142 and 144 and the conductive layer can be improved, thereby improving the electrical reliability of the light emitting device 100.

21 and 22, a conductive layer 148 is formed on the second conductive semiconductor layer 130. The conductive layer 148 is in ohmic contact with the second conductive semiconductor layer 130. The conductive layer 148 may be formed of a sputter or deposition apparatus using a material such as a metal oxide.

The conductive layer 148 is formed on an upper surface of the channel layer 142, the current blocking layer 144, the first capping layer 146, the second capping layer 147, and the second conductive semiconductor layer 130. Can be.

Referring to FIG. 23, a reflective electrode layer 152 is formed on the conductive layer 148, and a barrier layer 154 is formed on the reflective electrode layer 152.

Referring to FIG. 24, the bonding layer 156 may be a bonding layer, and the support member 170 may be bonded thereon. The support member 170 is a conductive support member, and includes copper (Cu), gold (Au), nickel (Ni), molybdenum (Mo), copper-tungsten (Cu-W), and a carrier wafer (eg, Si, Ge, GaAs, ZnO, SiC, SiGe, Ga ₂ O ₃ , GaN, etc.) may be implemented.

24 to 26, the support member 170 is positioned at the base, and the substrate 101 is positioned at the uppermost side. Thereafter, the substrate 101 disposed on the light emitting structure 135 is removed.

The removal method of the substrate 101 may be removed by a laser lift off (LLO) process. The laser lift-off method is a method of irradiating and separating a laser having a wavelength of a predetermined region to the substrate 101. Here, when there is another semiconductor layer (eg, buffer layer) or an air gap between the substrate 101 and the first conductive semiconductor layer 110, the substrate may be separated using a wet etching solution. It does not limit about a removal method.

Referring to FIG. 27, the light emitting structure 135 corresponding to the channel region 105, which is the boundary region of the chip size T1, is removed by isolation etching. That is, a portion of the channel layer 142 may be exposed by isolating the chip and the chip boundary region, and the side surface of the light emitting structure 135 may be inclined or vertically formed.

Referring to FIG. 28, an electrode 115 is formed on the first conductive semiconductor layer 110. The electrode 115 may be formed by a deposition method or a sputtering method, but is not limited thereto. The number of the electrodes 115 may be formed in one or more, and the positions thereof may be overlapped in the thickness direction of the region of the current blocking layer 144 and the light emitting structure 135.

Referring to FIG. 29, an insulating layer 190 is formed around the light emitting structure 135. The insulating layer 190 is formed around the chip, and a lower end thereof is formed on the channel layer 142, and a portion 194 of the insulating layer 190 may extend to an upper surface of the first conductive semiconductor layer 110. have. The insulating layer 190 may be formed around the light emitting structure 135 to prevent a short between the layers 110, 120, and 130 of the light emitting structure 135. In addition, the insulating layer 190 and the channel layer 142 may prevent moisture from penetrating into the chip.

Then, based on the boundary of the unit chip size (T1) is separated into individual chip units. In this case, the chip-based separation method may selectively use a cutting process, a laser, or a breaking process.

Some light emitted from the active layer 120 is incident on the channel layer 142, and the light extraction structure 132 changes the critical angle of the light L1 traveling to the upper surface of the channel layer 142. Can be extracted to the outside.

30 is a side cross-sectional view illustrating a light emitting device according to a fifth embodiment, and FIG. 31 is an enlarged view of the third and second capping layers of FIG. 30. In the description of the fifth embodiment, the same parts as those of the first embodiment will be referred to the first embodiment.

30 and 31, the light emitting device 100D may have a side surface 144A of the channel layer 142 and a side surface 142A of the current blocking layer 144 having an inclined structure. The lower surface of the channel layer 142 may be formed narrower than the upper surface, and the lower surface of the current blocking layer 144 may be formed narrower than the upper surface. Here, the angle θ1 between the side surface 144A of the current blocking layer 144 and the bottom surface of the second conductive semiconductor layer may be formed in a range of 10 ° <θ1 <90 °, and this angle θ1 is Depending on the etching time or material.

In addition, the first capping layer 146 is formed to be inclined to the side surface 144A of the current blocking layer 144, the second capping layer 147 is formed to be inclined to the side surface 142A of the channel layer 142. do. The conductive layer 148 is inclined at a predetermined angle θ2 by the inclined side surfaces of the channel layer 142 and the current blocking layer 144. Light incident on the reflective electrode layer 152 is reflected and the light distribution may be adjusted by the angle θ2.

32 and 33 are other examples of FIG. 31.

Referring to FIG. 32, the first contact portion 146-1 of the first capping layer 146 extends around the bottom surface of the current blocking layer 144, and the second contact portion 146-2 is connected to the second conductive portion. It extends to the lower surface 131 of the type semiconductor layer.

The first contact portion 147-1 of the second capping layer 147 extends around the lower surface of the channel layer 142, and the second contact portion 147-2 is lower surface 131 of the second conductive semiconductor layer. Extends to).

The second contact portions 146-2 and 147-2 of the first capping layer 146 and the second capping layer 147 are disposed between the lower surface 131 of the second conductive semiconductor layer and the conductive layer 148. It is adhered to, to improve the adhesive force therebetween, and may be electrically connected to the lower surface 131 of the second conductive semiconductor layer.

Referring to FIG. 33, the second contact portions 146-2 and 147-2 of the first capping layer 146 and the second capping layer 147 may contact the bottom surface 131 of the second conductive semiconductor layer. Can be. By adjusting the widths of the second contact portions 146-2 and 147-2 of the first capping layer 146 and the second capping layer 147, the ohmic contact region of the conductive layer 148 may be adjusted. In addition, by removing the first contact portion from the first capping layer 146 and the second capping layer 147, it is not necessary to reduce the thickness of the current blocking layer 144 and the channel layer 142.

34 is a side cross-sectional view of a light emitting device according to the sixth embodiment.

Referring to FIG. 34, in the light emitting device 100E, the width of the lower surface of the channel layer 142 is formed to be narrower than the width of the upper surface, and the side surface 142B is formed of a rough surface such as a stepped structure. The lower surface of the current blocking layer 144 is narrower than the upper surface, and the side surface 144B is formed with a rough surface such as a stepped structure. Here, the stepped structure includes a structure having a plurality of lower surfaces and side surfaces. The rough surface may change or scatter the critical angle of incident light, thereby improving light extraction efficiency.

35 is a view showing a light emitting device package according to the embodiment.

Referring to FIG. 35, the light emitting device package 30 according to the embodiment may include a body 31, a first lead electrode 32 and a second lead electrode 33 installed on the body 31, and the body ( The light emitting device 100 according to the exemplary embodiment installed in the 31 and electrically connected to the first lead electrode 32 and the second lead electrode 33, and the molding member 37 surrounding the light emitting device 100. ).

The body 31 may include a silicon material, a synthetic resin material, or a metal material, and a cavity having an inclined surface may be formed around the light emitting device 100.

The first lead electrode 32 and the second lead electrode layer 33 are electrically separated from each other, and provide power to the light emitting device 100. In addition, the first lead electrode 32 and the second lead electrode 33 may increase light efficiency by reflecting light generated from the light emitting device 100, and heat generated from the light emitting device 100. It may also play a role in discharging it to the outside.

The light emitting device 100 may be installed on the body 31 or on the first lead electrode 32 or the second lead electrode 33.

The light emitting device 100 may be mounted on the first lead electrode 32 and connected to the second lead electrode 33 by a wire 36. As another example, the light emitting device 100 may be flipped or die bonded. It may be electrically connected.

The molding member 37 may surround and protect the light emitting device 100. In addition, the molding member 37 may include a phosphor to change the wavelength of the light emitted from the light emitting device 100.

The light emitting device of FIG. 1 or the light emitting device package of FIG. 18 according to the embodiment may be applied to a light unit. The light unit includes a structure in which a plurality of light emitting devices or light emitting device packages are arranged, and includes a display device shown in FIGS. 19 and 20 and a lighting device shown in FIG. 21. Etc. may be included.

36 is an exploded perspective view of a display device according to an exemplary embodiment.

Referring to FIG. 36, the display apparatus 1000 includes a light guide plate 1041, a light emitting module 1031 that provides light to the light guide plate 1041, a reflective member 1022 under the light guide plate 1041, and the light guide plate 1041. A bottom cover 1011 that houses an optical sheet 1051 on the light guide plate 1041, a display panel 1061 on the optical sheet 1051, the light guide plate 1041, a light emitting module 1031, and a reflective member 1022. ), But is not limited thereto.

The bottom cover 1011, the reflective sheet 1022, the light guide plate 1041, and the optical sheet 1051 can be defined as a light unit 1050.

The light guide plate 1041 serves to diffuse the light provided from the light emitting module 1031 to make a surface light source. The light guide plate 1041 is made of a transparent material, for example, acrylic resin-based such as polymethyl metaacrylate (PMMA), polyethylene terephthlate (PET), polycarbonate (PC), cycloolefin copolymer (COC), and polyethylene naphthalate (PEN). It may include one of the resins.

The light emitting module 1031 is disposed on at least one side of the light guide plate 1041 to provide light to at least one side of the light guide plate 1041, and ultimately serves as a light source of the display device.

The light emitting module 1031 may include at least one, and may provide light directly or indirectly at one side of the light guide plate 1041. The light emitting module 1031 may include a substrate 1033 and a light emitting device package 30 according to the above-described embodiment, and the light emitting device package 30 may be arranged on the substrate 1033 at predetermined intervals. have. The substrate may be a printed circuit board, but is not limited thereto. In addition, the substrate 1033 may include a metal core PCB (MCPCB, Metal Core PCB), flexible PCB (FPCB, Flexible PCB) and the like, but is not limited thereto. When the light emitting device package 30 is mounted on the side surface of the bottom cover 1011 or the heat dissipation plate, the substrate 1033 may be removed. A part of the heat radiation plate may be in contact with the upper surface of the bottom cover 1011. Therefore, heat generated in the light emitting device package 30 may be discharged to the bottom cover 1011 via the heat dissipation plate.

The plurality of light emitting device packages 30 may be mounted on the substrate 1033 such that an emission surface on which light is emitted is spaced apart from the light guide plate 1041 by a predetermined distance, but is not limited thereto. The light emitting device package 30 may directly or indirectly provide light to a light incident portion that is one side of the light guide plate 1041, but is not limited thereto.

The reflective member 1022 may be disposed under the light guide plate 1041. The reflective member 1022 reflects the light incident on the lower surface of the light guide plate 1041 and supplies the reflected light to the display panel 1061 to improve the brightness of the display panel 1061. The reflective member 1022 may be formed of, for example, PET, PC, or PVC resin, but is not limited thereto. The reflective member 1022 may be an upper surface of the bottom cover 1011, but is not limited thereto.

The bottom cover 1011 may house the light guide plate 1041, the light emitting module 1031, the reflective member 1022, and the like. To this end, the bottom cover 1011 may be provided with a housing portion 1012 having a box-like shape with an opened upper surface, but the present invention is not limited thereto. The bottom cover 1011 may be coupled to a top cover (not shown), but is not limited thereto.

The bottom cover 1011 may be formed of a metal material or a resin material, and may be manufactured using a process such as press molding or extrusion molding. In addition, the bottom cover 1011 may include a metal or a non-metal material having good thermal conductivity, but the present invention is not limited thereto.

The display panel 1061 is, for example, an LCD panel, and includes a first and second substrates of transparent materials facing each other, and a liquid crystal layer interposed between the first and second substrates. A polarizing plate may be attached to at least one surface of the display panel 1061, but the present invention is not limited thereto. The display panel 1061 displays information by transmitting or blocking light provided from the light emitting module 1031. The display device 1000 can be applied to video display devices such as portable terminals, monitors of notebook computers, monitors of laptop computers, and televisions.

The optical sheet 1051 is disposed between the display panel 1061 and the light guide plate 1041 and includes at least one light-transmitting sheet. The optical sheet 1051 may include at least one of a sheet such as a diffusion sheet, a horizontal / vertical prism sheet, a brightness enhanced sheet, and the like. The diffusion sheet diffuses incident light, and the horizontal and / or vertical prism sheet concentrates incident light on the display panel 1061. The brightness enhancing sheet reuses the lost light to improve the brightness I will. A protective sheet may be disposed on the display panel 1061, but the present invention is not limited thereto.

The light guide plate 1041 and the optical sheet 1051 may be included as an optical member on the optical path of the light emitting module 1031, but are not limited thereto.

37 is a diagram illustrating a display device having a light emitting device package according to an exemplary embodiment.

Referring to FIG. 37, the display device 1100 includes a bottom cover 1152, a substrate 1120 on which the light emitting device package 30 disclosed above is arranged, an optical member 1154, and a display panel 1155. .

The substrate 1120 and the light emitting device package 30 may be defined as a light emitting module 1060. The bottom cover 1152, at least one light emitting module 1060, and the optical member 1154 may be defined as a light unit (not shown).

The bottom cover 1152 may include an accommodating part 1153, but is not limited thereto.

The optical member 1154 may include at least one of a lens, a light guide plate, a diffusion sheet, a horizontal and vertical prism sheet, and a brightness enhancement sheet. The light guide plate may be made of a PC material or a poly methy methacrylate (PMMA) material, and the light guide plate may be removed. The diffusion sheet diffuses the incident light, and the horizontal and vertical prism sheets condense the incident light onto the display panel 1155. The brightness enhancing sheet reuses the lost light to improve the brightness .

The optical member 1154 is disposed on the light emitting module 1060, and performs surface light source, diffusion, condensing, etc. of the light emitted from the light emitting module 1060.

21 is a perspective view of a lighting apparatus according to an embodiment.

Referring to FIG. 21, the lighting device 1500 may include a case 1510, a light emitting module 1530 installed in the case 1510, and a connection terminal installed in the case 1510 and receiving power from an external power source. 1520).

The case 1510 may be formed of a material having good heat dissipation, for example, may be formed of a metal material or a resin material.

The light emitting module 1530 may include a substrate 1532 and a light emitting device package 30 according to an embodiment mounted on the substrate 1532. The plurality of light emitting device packages 30 may be arranged in a matrix form or spaced apart at predetermined intervals.

The substrate 1532 may be a circuit pattern printed on an insulator. For example, a general printed circuit board (PCB), a metal core PCB, a flexible PCB, a ceramic PCB, FR-4 substrates and the like.

In addition, the substrate 1532 may be formed of a material that reflects light efficiently, or a surface may be coated with a color, for example, white or silver, in which the light is efficiently reflected.

At least one light emitting device package 30 may be mounted on the substrate 1532. Each of the light emitting device packages 30 may include at least one light emitting diode (LED) chip. The LED chip may include a light emitting diode in a visible light band such as red, green, blue, or white, or a UV light emitting diode emitting ultraviolet (UV) light.

The light emitting module 1530 may be arranged to have a combination of various light emitting device packages 30 to obtain color and brightness. For example, a white light emitting diode, a red light emitting diode, and a green light emitting diode may be combined to secure high color rendering (CRI).

The connection terminal 1520 may be electrically connected to the light emitting module 1530 to supply power. The connection terminal 1520 is inserted into and coupled to an external power source in a socket manner, but is not limited thereto. For example, the connection terminal 1520 may be formed in a pin shape and inserted into an external power source, or may be connected to the external power source by a wire.

Features, structures, effects, and the like described in the above embodiments are included in at least one embodiment of the present invention, and are not necessarily limited to only one embodiment. Furthermore, the features, structures, effects, and the like illustrated in each embodiment may be combined or modified with respect to other embodiments by those skilled in the art to which the embodiments belong. Therefore, it should be understood that the present invention is not limited to these combinations and modifications.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is clearly understood that the same is by way of illustration and example only and is not to be taken by way of illustration, It can be seen that various modifications and applications are possible. For example, each component specifically shown in the embodiments can be modified and implemented. It is to be understood that all changes and modifications that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

100, 100A, 100B: light emitting element, 110: first conductive semiconductor layer, 120: active layer, 130: second conductive semiconductor layer, 115: electrode, 142: channel layer, 144: current blocking layer, 146,147: capping layer, 148: conductive layer, 152: reflective electrode layer, 154: barrier layer, 156: bonding layer, 170: support member

Claims (18)

A light emitting structure including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer between the first conductive semiconductor layer and the second conductive semiconductor layer;
An electrode on the light emitting structure;
A current blocking layer corresponding to a thickness direction of the electrode and the light emitting structure under the light emitting structure;
A channel layer disposed around a bottom surface of the light emitting structure;
A conductive layer in contact with a bottom surface of the light emitting structure and disposed below the current blocking layer;
A reflective electrode layer under the conductive layer;
A first capping layer disposed between the reflective electrode layer and the conductive layer and corresponding to a circumference of the current blocking layer; And
A light emitting device comprising a support member below the reflective electrode layer. The light emitting device of claim 1, wherein the first capping layer is disposed to correspond to a side surface of the current blocking layer between the conductive layer and the reflective electrode layer. The light emitting device of claim 2, wherein the first capping layer is formed to be longer than a thickness of the current blocking layer. The light emitting device of claim 1, wherein the first capping layer further comprises a contact portion corresponding to at least one of a bottom surface of the current blocking layer and a bottom surface of the second conductive semiconductor layer among the bottom surfaces of the conductive layer. . The light emitting device of claim 1, further comprising a second capping layer disposed between the reflective electrode layer and the conductive layer and corresponding to a side surface of the channel layer. The light emitting device of claim 5, wherein the second capping layer further comprises a contact portion corresponding to at least one of a lower surface of the channel layer and a lower surface of the second conductive semiconductor layer among the lower surface of the conductive layer. A light emitting structure including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer between the first conductive semiconductor layer and the second conductive semiconductor layer;
An electrode on the light emitting structure;
A current blocking layer corresponding to a thickness direction of the electrode and the light emitting structure under the light emitting structure;
A channel layer disposed around a bottom surface of the light emitting structure;
A conductive layer in contact with a bottom surface of the light emitting structure and disposed below the current blocking layer;
A first capping layer between the current blocking layer and the conductive layer;
A reflective electrode layer under the conductive layer; And
A light emitting device comprising a support member below the reflective electrode layer. The light emitting device of claim 7, wherein the first capping layer is formed around the current blocking layer, an upper portion of the first capping layer contacts a lower surface of the second conductive semiconductor layer, and a lower portion of the first capping layer contacts the conductive layer. The light emitting device of claim 7, further comprising a second capping layer between the side of the channel layer and the conductive layer. The light emitting device of claim 8, wherein the second capping layer further comprises a contact portion formed on at least one of a lower surface of the channel layer and a lower surface of the second conductive semiconductor layer. The light emitting device of claim 5 or 9, wherein the first capping layer and the second capping layer include at least one of Ni, Ti, Pt, Pd, Rh, Ir, W, and selected alloys thereof. The light emitting device of claim 11, wherein the first capping layer and the second capping layer transmit incident light. The light emitting device of claim 1, wherein at least one of the current blocking layer and the channel layer has an upper surface width that is wider than a lower surface width. The light emitting device of claim 13, wherein side surfaces of the current blocking layer and the channel layer are formed to have rough surfaces. The light emitting device of claim 5 or 9, wherein the first capping layer and the second capping layer have a thickness of 100 kPa to 500 kPa. The method of claim 1 or 7, wherein the current blocking layer comprises an insulating material,
The conductive layer and the current blocking layer includes a light-transmitting metal oxide or metal nitride. The semiconductor device of claim 1, further comprising: a barrier layer between the reflective electrode layer and the support member; And a bonding layer between the barrier layer and the support member. Forming a light emitting structure on the substrate, the light emitting structure including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer;
Forming a channel layer around an upper surface of the second conductive semiconductor layer;
Forming a current blocking layer on an upper surface of the second conductive semiconductor layer;
Forming a conductive layer on the top surface of the second conductive semiconductor layer, the channel layer, and the current blocking layer;
Forming a capping layer on the conductive layer;
Forming a reflective electrode layer on the conductive layer and the capping layer; And
Forming a conductive support member on the reflective electrode layer,
And the capping layer is disposed to correspond to at least one of a circumference of the current blocking layer and a circumference of the channel layer.

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