KR20120073741A - Light emission diode and manufacturing method of the same - Google Patents

Abstract

The present invention is a base substrate; An N-type semiconductor layer located on the base substrate; An active layer positioned on the N-type semiconductor layer; A P-type semiconductor layer located on the active layer; And an upper electrode layer disposed on the P-type semiconductor layer, wherein the upper electrode layer includes a plurality of transparent electrode patterns separated from each other, and a method of manufacturing the same. By increasing the critical angle through the light extraction efficiency, and by forming the transparent electrode pattern by wet etching, it is possible to prevent damage to the semiconductor layer, it is possible to provide a light emitting diode having excellent internal quantum efficiency.

Description

Light Emitting Diode and Manufacturing Method Thereof {Light emission Diode and Manufacturing Method of the same}

The present invention relates to a light emitting diode and a method for manufacturing the same, and more particularly, to a light emitting diode having excellent internal quantum efficiency and external quantum efficiency and a method for manufacturing the same.

A light emitting diode (LED) refers to a device that makes a minority carrier (electron or hole) injected using a pn junction structure of a semiconductor and emits a predetermined light by recombination thereof. GaAs, AlGaAs, GaN Various colors may be realized by configuring a light emitting source by changing a compound semiconductor material such as InGaN and AlGaInP.

Among the compound semiconductors, the nitride semiconductor material exhibits excellent luminescence properties in the visible and UV regions, and is also used in high power, high frequency electronic devices. In particular, gallium nitride (GaN) has a direct transition bandgap of 3.4 eV at room temperature and is combined with materials such as indium nitride (InN) and aluminum nitride (AlN) at 0.7 eV (InN) to 3.4 eV ( GaN) and 6.2eV (AlN) have direct energy bandgap, which can emit light in a wide wavelength range from visible light to ultraviolet light.

FIG. 1A is a schematic cross-sectional view showing a conventional semiconductor light emitting diode, and FIG. 1B is a schematic cross-sectional view showing total internal reflection of a conventional light emitting diode.

First, referring to FIG. 1A, a light emitting diode includes a substrate 1, an N-type semiconductor layer 2, an active layer 3, and a P-type semiconductor layer 4 sequentially formed on the substrate 1. . In addition, a portion of the P-type electrode 5 formed on the P-type semiconductor layer 4 and the N-type semiconductor layer 2 exposed by etching part of the P-type semiconductor layer 4 and the active layer 3 is exposed. The formed N-type electrode 6 is included. The P-type semiconductor layer 4 uses a semiconductor compound doped with P-type impurities, and the N-type semiconductor layer 2 uses a semiconductor compound doped with N-type impurities.

P-type and N-type semiconductor layers 4 and 2 formed on the upper and lower portions of the active layer 3 respectively supply current to the active layer 3 to emit light.

In order to improve the performance of the light emitting diode, the internal quantum efficiency of recombining electrons and holes must be high to obtain a large amount of light from the current flowing inside, and the generated light is emitted to the outside of the light emitting diode. The light extraction efficiency, that is, the external quantum efficiency should be high.

To this end, a semiconductor layer with low crystal defects and excellent crystallinity is first grown on a substrate to increase the internal quantum efficiency of the light emitting diode, and light generated in the active layer is reflected only inside the light emitting diode, that is, total internal reflection The rate of reflection should be reduced to increase the extraction efficiency of the light emitting diode.

On the other hand, according to the current technology trend, the internal quantum efficiency of a general light emitting device has been developed to almost 100%, but the external quantum efficiency is only about 30%.

This is due to the total internal reflection as described above. As shown in FIG. 1B, when the incident angle (the angle of light with the vertical line of the surface) is smaller than the critical angle (less than θ), part of the light is reflected and the rest Although the light is refracted, all the light is totally reflected at the angle of incidence greater than the critical angle, so that the light does not escape to the outside of the light emitting diode and is trapped inside the device, resulting in a very low light extraction efficiency.

The problem to be solved by the present invention is to provide a light emitting diode having excellent light extraction efficiency by preventing the light is totally reflected to prevent the light from being escaped to the outside of the light emitting diode and trapped inside the device.

The objects of the present invention are not limited to the above-mentioned objects, and other objects which are not mentioned will be clearly understood by those skilled in the art from the following description.

The present invention to solve the above-mentioned problems is the base substrate; An N-type semiconductor layer located on the base substrate; An active layer positioned on the N-type semiconductor layer; A P-type semiconductor layer located on the active layer; And an upper electrode layer disposed on the P-type semiconductor layer, wherein the upper electrode layer includes a plurality of transparent electrode patterns separated from each other.

The present invention also provides a light emitting diode, wherein the upper electrode layer further includes an ohmic contact layer positioned on the P-type semiconductor layer, and the plurality of transparent electrode patterns are positioned on the ohmic contact layer.

In addition, the present invention provides a light emitting diode, characterized in that the pattern surface of the plurality of transparent electrode patterns comprises a roughness.

In addition, the present invention provides a light emitting diode further comprising a P-type electrode pad positioned in an upper region of the upper electrode layer.

In addition, according to the present invention, a portion of the upper surface of the N-type semiconductor layer is bonded to the active layer, the remaining portion of the upper surface of the N-type semiconductor layer is exposed to the outside, and the constant upper part of the exposed N-type semiconductor layer Provided is a light emitting diode further comprising an N-type electrode pad in a region.

In addition, the present invention comprises the steps of providing a base substrate; Forming an N-type semiconductor layer on the base substrate; Forming an active layer on the N-type semiconductor layer; Forming a P-type semiconductor layer on the active layer; And forming an upper electrode layer on the P-type semiconductor layer, wherein the upper electrode layer includes a plurality of transparent electrode patterns separated from each other, and the plurality of transparent electrode patterns are patterned by wet etching. A method of manufacturing a light emitting diode is provided.

The present invention also provides a method of manufacturing a light emitting diode, wherein the upper electrode layer further includes an ohmic contact layer positioned on the P-type semiconductor layer, and the plurality of transparent electrode patterns are positioned on the ohmic contact layer. to provide.

The present invention also provides a method of manufacturing a light emitting diode, wherein the patterning of the plurality of transparent electrode patterns by wet etching comprises forming a transparent electrode layer on the ohmic contact layer and patterning the transparent electrode layer by wet etching. to provide.

According to the light emitting diode of the present invention and the manufacturing method thereof as described above, the light extraction efficiency is increased by increasing the critical angle through a plurality of transparent electrode patterns, and also a constant roughness on the pattern surface of the transparent electrode pattern by wet etching. By including, there is an effect that can provide a light emitting diode that can maximize the light extraction efficiency.

In addition, the present invention may provide a light emitting diode having excellent internal quantum efficiency by preventing the damage of the semiconductor layer by forming the transparent electrode pattern through wet etching.

FIG. 1A is a schematic cross-sectional view showing a conventional semiconductor light emitting diode, and FIG. 1B is a schematic cross-sectional view showing total internal reflection of a conventional light emitting diode.
2A to 2D are cross-sectional views illustrating a light emitting diode according to the present invention.
3 is a cross-sectional view showing a light emitting diode including an upper electrode layer according to the present invention.
4A is an illustration of an upper electrode including a transparent electrode pattern according to the present invention, and FIG. 4B is a schematic cross-sectional view showing total internal reflection of a light emitting diode according to the present invention.
5A is a photograph showing a light emitting state of a light emitting diode to which the transparent electrode pattern is applied according to the present invention, and FIG. 5B is a photograph showing a light emitting state of a light emitting diode having a structure not to apply the transparent electrode pattern according to the present invention.
FIG. 6A is a graph showing current-voltage characteristics of a light emitting diode, and FIG. 6B is a graph showing optical characteristics of a light emitting diode.

Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various forms, and only the present embodiments are intended to complete the disclosure of the present invention, and the general knowledge in the art to which the present invention pertains. It is provided to fully convey the scope of the invention to those skilled in the art, and the present invention is defined only by the scope of the claims.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. &Quot; and / or "include each and every combination of one or more of the mentioned items. ≪ RTI ID = 0.0 >

Although the first, second, etc. are used to describe various components, these components are of course not limited by these terms. These terms are used only to distinguish one component from another. Therefore, it goes without saying that the first component mentioned below may be the second component within the technical scope of the present invention.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. In the present specification, the singular form includes plural forms unless otherwise specified in the specification. As used herein, "comprises" and / or "comprising" does not exclude the presence or addition of one or more other components in addition to the mentioned components.

Unless otherwise defined, all terms (including technical and scientific terms) used in the present specification may be used in a sense that can be commonly understood by those skilled in the art. In addition, the terms defined in the commonly used dictionaries are not ideally or excessively interpreted unless they are specifically defined clearly.

The spatially relative terms " below ", " beneath ", " lower ", " above ", " upper " It may be used to easily describe the correlation of a component with other components. Spatially relative terms are to be understood as including terms in different directions of components in use or operation in addition to the directions shown in the figures. For example, when inverting an element shown in the figures, an element described as "below" or "beneath" of another element may be placed "above" another element . Thus, the exemplary term "below" can include both downward and upward directions. The components can be oriented in other directions as well, so that spatially relative terms can be interpreted according to the orientation.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2A to 2D are cross-sectional views illustrating a light emitting diode according to the present invention.

First, referring to FIG. 2D, the light emitting diode 100 according to the present invention includes a substrate 111 forming a base. In this case, the substrate 111 may be made of aluminum oxide which is a sapphire material, and alternatively, at least one of silicon (Si), gallium arsenide (GaAs), silicon carbide (SiC), zinc oxide (ZnO), and glass. It may be made of a material, and thus, does not limit the material of the substrate in the present invention.

A light emitting cell including an N-type semiconductor layer 113, an active layer 114, and a P-type semiconductor layer 115 is formed on the substrate 111.

However, although the light emitting diode according to the present invention includes one light emitting cell, the light emitting diode which can be operated by an AC power source including a plurality of light emitting cells is also within the scope of the present invention. Meanwhile, a portion of the N-type semiconductor layer 113 is exposed upward by the formation of mesas, and an N-type electrode pad 118 is formed at the exposed portion of the light emitting cell.

Subsequently, the active layer 114 is limitedly formed on a portion of the N-type semiconductor layer 113 by mesa formation, and the P-type semiconductor layer 115 is formed on the active layer 114.

Therefore, a portion of the upper surface of the N-type semiconductor layer 113 is bonded to the active layer 114, and the remaining portion of the upper surface is exposed to the outside.

In this case, the N-type semiconductor layer 113 may be formed of N-type Al _x In _y Ga _1-xy N (0 ≦ x, y, x + y ≦ 1), and may include an N-type cladding layer. The N-type semiconductor layer may be collectively referred to as an N-GaN layer.

In addition, the P-type semiconductor layer 115 may be formed of P-type Al _x In _y Ga _1-xy N (0 ≦ x, y, x + y ≦ 1), and may include a P-type cladding layer. The P-type semiconductor layer may be collectively referred to as a P-GaN layer.

The N-type semiconductor layer 113 is formed by adding silicon (Si) as a dopant. The P-type semiconductor layer 115 may be formed by adding dopants such as zinc (Zn) or magnesium (Mg).

In addition, an upper electrode layer 116 may be formed on the P-type semiconductor layer 115, and a P-type electrode pad 117 may be formed on a portion of the upper electrode layer 116. The upper electrode layer 116 will be described later.

In addition, the N-type electrode pad 118 may be formed in a predetermined region of the exposed N-type semiconductor layer 113 to form a light emitting diode according to the present invention.

Subsequently, referring to FIG. 2D, the active layer 114 includes InGaN as a region where electrons and holes are recombined. The emission wavelength extracted from the light emitting cell is determined according to the type of material constituting the active layer 114.

The active layer 114 may be a multi-layered film in which a quantum well layer and a barrier layer are repeatedly formed, and the barrier layer and the well layer are Al _x In _y Ga _1-xy N (0 ≦ x, y, x + y ≦ 1). 2 to 4 membered compound semiconductor layers may be represented by.

In addition, a buffer layer 112 may be interposed between the substrate 111 and the N-type semiconductor layer 113. The buffer layer 112 is used to mitigate lattice mismatch between the semiconductor layers to be formed thereon and the substrate 111.

In addition, when the substrate 111 is conductive, the buffer layer 112 may be formed of an insulating material or a semi-insulating material to electrically insulate the substrate 111 from the light emitting cell. For example, AlN, GaN, or the like may be used. It can be formed of a nitride of. Meanwhile, when the substrate 111 is insulative, such as sapphire, the buffer layer 112 may be formed of a conductive material. However, the present invention is not limited to the presence or absence of the buffer layer 112.

Subsequently, a manufacturing process of the light emitting diode according to the present invention will be described with reference to FIGS. 2A to 2D.

First, referring to FIG. 2A, a buffer layer 112 is formed on a substrate 111, an N-type semiconductor layer 113 is formed on the buffer layer 112, and on the N-type semiconductor layer 113. An active layer 114 is formed, and a P-type semiconductor layer 115 is formed on the active layer 114.

The buffer layer 112 and the N-type semiconductor layer 113 may be formed by metal organic chemical vapor deposition (MOCVD). Alternatively, the buffer layer 112 and the N-type semiconductor layer 113 may be formed by using a molecular beam growth (MBE) or a hydride vapor deposition (HVPE) method. Can be formed.

In particular, the N-type semiconductor layer 113 is a layer formed by adding a Si dopant, and is formed by growing vertically on the substrate 111 on which the buffer layer 112 is formed. The N-type semiconductor layer 113 is formed through organic metal chemical vapor deposition (MOCVD). The semiconductor layer can be grown on the substrate. However, in the present invention, the buffer layer may be omitted, and the method of forming the buffer layer and the N-type semiconductor layer is not limited.

In addition, a P-type dopant such as zinc (Zn) or magnesium (Mg) is added to the P-type semiconductor layer 115.

Next, referring to FIG. 2B, a process of forming a mesa using RIE or the like is performed to expose a portion of the N-type semiconductor layer 113. Next, as shown in FIG. 2C, the P-type semiconductor is performed. An upper electrode layer 116 is formed on top of the layer 115. The upper electrode layer 116 will be described later.

Subsequently, referring to FIG. 2D, a P-type electrode pad 117 is formed on the upper electrode layer 116, and an N-type electrode pad 118 is formed on the exposed N-type semiconductor layer 113. The light emitting diode according to the present invention can be formed.

The LED thus completed is applied with a positive load to the P-electrode pad 117 and a negative load to the N-electrode pad 118, whereby the P-type semiconductor layer 115 and the N-type semiconductor layer 113 are applied. Holes and electrons are collected into the active layer 114 and recombined, respectively, to emit light in the active layer 114.

3 is a cross-sectional view showing a light emitting diode including an upper electrode layer according to the present invention, which is taken along line I-I of FIG. 2D. Hereinafter, the upper electrode layer according to the present invention will be described with reference to FIG. 3.

First, referring to FIG. 3, the upper electrode layer 116 according to the present invention is positioned on the ohmic contact layer 116a and the ohmic contact layer 116a formed on the P-type semiconductor layer 115, and a plurality of transparent electrodes. It comprises a pattern 116b.

In this case, the ohmic contact layer 116a includes at least one material selected from the group consisting of metals consisting of Ni, Mn, Fe, Co, Cr, Cu, Sn, Ag, and Pd or metal oxides thereof. The plurality of transparent electrode patterns 116b may include indium tin oxide (ITO), indium oxide (IO), tin oxide (SnO ₂ ), zinc oxide (ZnO), or indium zinc oxide (IZO). It may comprise at least one material selected from the group consisting of.

In general, in the case of a P-type semiconductor, the conductivity is poor compared to the N-type semiconductor. Therefore, in the case of the N-type semiconductor, electrons can be injected through the formation of the N-type electrode pad on the exposed N-type semiconductor layer, but in the case of the P-type semiconductor, since the conductivity is not good, P It is difficult to effectively inject holes only by forming a P-type electrode pad on the upper portion of the semiconductor.

Therefore, in the case of the P-type semiconductor, it is necessary to form a material having good conductivity on the upper portion thereof to improve the hole injection characteristics, and in the present invention, the plurality of transparent electrode patterns 116b are formed on the upper portion of the P-type semiconductor. Thereby, the hole injection characteristic of a P-type semiconductor can be improved.

However, as shown in FIG. 3, since the transparent electrode pattern 116b according to the present invention is composed of a plurality of patterns in which respective patterns are separated, the transparent electrode patterns of the region where the P-type electrode pad is in contact with each other are P-type. It functions to inject holes into the semiconductor, but the transparent electrode patterns (region A) in regions where the P-type electrode pads are not in contact with each other do not receive a positive load, thereby injecting holes into the P-type semiconductor. It becomes impossible.

Accordingly, in the present invention, the ohmic contact layer 116a is formed under the transparent electrode pattern 116b so that the transparent electrode patterns in the region where the P-type electrode pad is not in contact can also receive a positive load. Can be.

In this case, the ohmic contact layer 116a should be formed thin so that light can be extracted while transferring a positive load to the transparent electrode pattern 116b. Thus, in the present invention, the ohmic contact layer 116a It is preferable to form thickness below 200 GPa.

In addition, the transparent electrode pattern 116b is preferably formed to 10 to 10,000nm for good hole injection to the P-type semiconductor layer.

Meanwhile, in the present invention, the plurality of transparent electrode patterns 116b may be formed through a wet etching process.

That is, after forming a transparent electrode layer (not shown) on the ohmic contact layer 116a, the transparent electrode layer may be patterned by wet etching to form a plurality of transparent electrode patterns 116b having a square pyramid shape.

By patterning the above-described transparent electrode layer by wet etching, damage to the ohmic contact layer 116a can be prevented, and damage to the P-type semiconductor layer 115 under the ohmic contact layer 116a can be prevented.

That is, when the transparent electrode layer is patterned by dry etching, the physical force caused by dry etching damages the ohmic contact layer 116a, and further, the P-type semiconductor layer 115 under the ohmic contact layer 116a. ) Damaged. However, when the transparent electrode layer is etched and patterned through wet etching with a high etching selectivity, the transparent electrode layer is etched with a transparent electrode pattern, but the ohmic contact layer and the P-type semiconductor layer thereunder are different from the transparent electrode layer and the material. Therefore, the ohmic contact layer and the P-type semiconductor layer below it can be protected.

Accordingly, the present invention can provide a light emitting diode having excellent internal quantum efficiency by providing a semiconductor layer having fewer crystal defects and excellent crystallinity by preventing damage to the P-type semiconductor layer.

In addition, when the transparent electrode layer is patterned by wet etching, the pattern surface of the transparent electrode pattern having a square pyramid shape also includes a certain roughness, thereby maximizing light extraction efficiency as will be described later.

In this case, the wet etching of the transparent electrode layer may use an aqueous solution including at least one material selected from the group consisting of BOE (buffered oxide etchant), NH ₄ OH, H ₃ PO ₄ , and HCl, between 100 ° C. at room temperature. By etching at a temperature, a transparent electrode pattern in the form of a square pyramid can be formed. However, the present invention does not limit the wet etching method of the transparent electrode layer and the solution to be used.

4A is an illustration of an upper electrode including a transparent electrode pattern according to the present invention, and FIG. 4B is a schematic cross-sectional view showing total internal reflection of a light emitting diode according to the present invention.

First, referring to FIG. 4A, as described above, the upper electrode 116 according to the present invention includes a transparent electrode pattern 116b having a square pyramid shape and an ohmic contact layer 116a under the transparent electrode pattern 116a. It is included.

At this time, the present invention discloses that the shape of the transparent electrode pattern is a square pyramid, but may be formed in a spherical shape, hemispherical shape, hexagonal pyramid shape or micro lens array shape by adjusting the etching ratio during wet etching, in the present invention The shape of the transparent electrode pattern is not limited.

Subsequently, referring to FIG. 4A, as described above, it is understood that damage to the ohmic contact layer 116a is prevented by patterning the transparent electrode layer by wet etching, and thus, the P-type semiconductor layer under the ohmic contact layer. It can be seen that the damage can be prevented.

In this case, in the case of the P-type semiconductor, the conductivity is not as good as that of the N-type semiconductor, but the transparent electrode layer is patterned by dry etching, for example, without the pattern of the transparent electrode layer by wet etching. , There is a problem in that the P-type semiconductor is damaged and the conductivity becomes worse.

Therefore, in the present invention, by patterning the transparent electrode layer by wet etching, it is possible to prevent the internal quantum efficiency from lowering.

In addition, as shown in FIG. 4A, when the transparent electrode layer is patterned by wet etching, the pattern surface of the transparent electrode pattern having a square pyramid shape also includes a certain roughness.

Subsequently, referring to FIG. 4B, which shows total internal reflection of the light emitting diode according to the present invention, the light emitting diode according to the present invention emits light emitted from the inside of the device to the outside by increasing the critical angle through a plurality of transparent electrode patterns. It is possible to increase the effect.

That is, as shown in FIG. 1B, when the incident angle is larger than the critical angle, when reflected, the light is reflected inside the device. As a result, the light cannot be emitted to the outside of the device, so that the light is trapped inside the device. However, since the refractive index of the plurality of transparent electrode patterns has an intermediate value between the light emitting device and the air, the light emitting diode according to the present invention has a smaller critical angle and is less reflected by the inside of the device.

In addition, as described above, when the transparent electrode layer is patterned by wet etching, since the pattern surface of the transparent electrode pattern also includes a certain roughness, the possibility that light is reflected into the device becomes smaller, and thus, light extraction efficiency. Can be maximized.

Therefore, the light emitting diode according to the present invention increases the light extraction efficiency by increasing the critical angle through a plurality of transparent electrode patterns, and also includes a constant roughness on the pattern surface of the transparent electrode pattern by wet etching, thereby increasing the light extraction efficiency. It can be maximized.

5A is a photograph showing a light emitting state of a light emitting diode to which the transparent electrode pattern is applied according to the present invention, and FIG. 5B is a photograph showing a light emitting state of a light emitting diode having a structure not to apply the transparent electrode pattern according to the present invention. In this case, the structure in which the transparent electrode pattern according to the present invention is not applied does not form the transparent electrode pattern in the above-described structure of FIG. 3 for comparison with the present invention, but directly on the upper portion of the ohmic contact layer 116a. The electrode pad 117 is formed.

As can be seen in Figures 5a and 5b, in the case of the light emitting diode to which the transparent electrode pattern according to the present invention is applied, it showed a brighter light emission state, that is, better light extraction efficiency than otherwise, in particular, Figure 5a In region A and region B of FIG. 5B, there is a marked difference in light extraction efficiency.

FIG. 6A is a graph showing current-voltage characteristics of a light emitting diode, and FIG. 6B is a graph showing optical characteristics of a light emitting diode. 6A and 6B, X represents a light emitting diode to which the transparent electrode pattern according to the present invention is applied, and Y represents a light emitting diode having a structure to which the transparent electrode pattern according to the present invention is not applied.

First, referring to FIG. 6A, it can be seen that the current and voltage characteristics are almost similar to those of the case where the transparent electrode pattern according to the present invention is not applied. Rather, at 4V or higher, the transparent electrode pattern according to the present invention is used. It can be seen that the current characteristics are better when applied.

Next, referring to FIG. 6B, in the case of applying the transparent electrode pattern according to the present invention, the optical property is better than that in the case of the optical property. Finally, by applying the transparent electrode pattern according to the present invention, It can be seen that the light extraction efficiency increases.

Therefore, in the present invention, by forming the transparent electrode pattern, it is possible to provide a light emitting diode capable of increasing the light extraction efficiency while maintaining the current-voltage characteristics.

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, It will be understood. It is therefore to be understood that the above-described embodiments are illustrative in all aspects and not restrictive.

100: light emitting diode 111: substrate
112: buffer layer 113: N-type semiconductor layer
114: active layer 115: p-type semiconductor layer
117: P-type electrode pad 118: N-type electrode pad
116: upper electrode layer 116a: ohmic contact layer
116b: transparent electrode pattern

Claims (15)

A base substrate;
An N-type semiconductor layer located on the base substrate;
An active layer positioned on the N-type semiconductor layer;
A P-type semiconductor layer located on the active layer; And
An upper electrode layer on the P-type semiconductor layer,
The upper electrode layer includes a plurality of transparent electrode patterns, each separated light emitting diode. The method of claim 1,
The plurality of transparent electrode patterns are selected from the group consisting of indium tin oxide (ITO), indium oxide (IO), tin oxide (SnO ₂ ), zinc oxide (ZnO), or indium zinc oxide (IZO). Light emitting diodes, characterized in that at least one material. The method of claim 1,
And the upper electrode layer further comprises an ohmic contact layer positioned on the P-type semiconductor layer, and the plurality of transparent electrode patterns are positioned on the ohmic contact layer. The method of claim 1,
The pattern surface of the plurality of transparent electrode patterns, the light emitting diode comprising a roughness. The method of claim 1,
The transparent electrode pattern is a light emitting diode, characterized in that the thickness of 10 to 10,000nm. The method of claim 3, wherein
The ohmic contact layer is at least one material selected from the group consisting of metals or metal oxides thereof consisting of Ni, Mn, Fe, Co, Cr, Cu, Sn, Ag, and Pd. The method of claim 3, wherein
The ohmic contact layer is a light emitting diode, characterized in that less than 200Å. The method of claim 1,
The light emitting diode further comprising a P-type electrode pad positioned in an upper portion of the upper electrode layer. The method of claim 1,
A portion of the upper surface of the N-type semiconductor layer is bonded to the active layer, the remaining portion of the upper surface of the N-type semiconductor layer is exposed to the outside,
The light emitting diode further comprising an N-type electrode pad in a predetermined region of the exposed N-type semiconductor layer. Providing a base substrate;
Forming an N-type semiconductor layer on the base substrate;
Forming an active layer on the N-type semiconductor layer;
Forming a P-type semiconductor layer on the active layer; And
Forming an upper electrode layer on the P-type semiconductor layer;
The upper electrode layer includes a plurality of transparent electrode patterns each separated, the plurality of transparent electrode patterns is a method of manufacturing a light emitting diode, characterized in that the pattern by wet etching. 11. The method of claim 10,
The plurality of transparent electrode patterns are selected from the group consisting of indium tin oxide (ITO), indium oxide (IO), tin oxide (SnO ₂ ), zinc oxide (ZnO), or indium zinc oxide (IZO). Method of manufacturing a light emitting diode, characterized in that at least one material. 11. The method of claim 10,
And the upper electrode layer further comprises an ohmic contact layer positioned on the P-type semiconductor layer, and the plurality of transparent electrode patterns are positioned on the ohmic contact layer. 11. The method of claim 10,
The pattern surface of the plurality of transparent electrode patterns comprises a roughness manufacturing method of the light emitting diode. The method of claim 12,
Patterning the plurality of transparent electrode patterns by wet etching,
Forming a transparent electrode layer on the ohmic contact layer, and patterning the transparent electrode layer by wet etching. 11. The method of claim 10,
The wet etching is performed by using an aqueous solution containing at least one material selected from the group BOE (buffered oxide etchant), NH ₄ OH, H ₃ PO ₄ , HCl, and etching at a temperature between 100 ℃ and room temperature Method of manufacturing a diode.

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