KR20090043210A - FFT / IFFT dual mode device and control method thereof for OPDM - Google Patents

Abstract

The present invention discloses an FFT / IFFT dual mode device for OFDM and a control method thereof. The present invention receives 2N (0 ≤ N, integer) data each consisting of a pair of real and imaginary parts in parallel and outputs N odd-numbered data and N even-numbered data in fast Fourier transform mode. And an input buffer multiplexer for outputting the real part and the imaginary part of the N odd data and the N even data in the inverse fast Fourier transform mode, and the N odd data and the N even data, respectively. First and second N-point Radix-4 FFT processors that receive fast fast Fourier transforms, and first and second Radix-4 butterfly operations on the outputs of the first and second N-point Radix-4 FFT processors, respectively. In the fast Fourier transform mode, a butterfly unit and the Radix-4 butterfly unit are arranged to output 2N data, and the inverse fast Fourier There are those characterized by including the output buffer multiplexer, and a control part for controlling the fast Fourier transform mode, or an inverse fast Fourier transform mode in which the aligned one of 2N pieces of data the real and imaginary parts of the exchange outputs from the ring mode.

The FFT / IFFT dual mode device for OFDM and its control method according to the present invention process two 2N-point fast Fourier transforms using the DIT (Decimation In Time) method in parallel by M time, so that the time delay is low and the system operation speed is low. The hardware is easy to implement and control and the performance is excellent.

OFDM, FFT / IFFT Dual-Mode, FFT Processors, Butterfly Math, Tweed Factor

Description

FFT / IFFT dual mode device and control method for OPDM {Apparatus providing FFT / IFFT for OFDM by Dual Mode and the Controlling Method

The present invention relates to an FFT / IFFT dual-mode device for OFDM and a control method thereof. In particular, a time delay is reduced by performing DIT (Decimation In Time) fast Fourier transform operation of 2N pieces of M data in parallel, and hardware implementation and control are easy. The present invention relates to an FFT / IFFT dual mode device for easy and excellent performance of OFDM and a control method thereof.

Orthogonal Frequency Division Multiplexing (OFDM) is a method of dividing data having a high data rate into a large number of data strings having a low data rate and transmitting them simultaneously using a plurality of subcarriers.

In this case, the process of creating such a subcarrier and loading data is referred to as an Inverse Fast Fourier Transform (IFFT) and vice versa, called an FFT (Fast Fourier Transform, or Fast Fourier Transform).

Specifically, the OFDM transmitter performs IFFT operation to load data on several subcarriers, and the receiver performs FFT operation to obtain data on several subcarriers.

The transmitter inserts zero padding or guard interval (GI) into the inverse fast Fourier transform operation, and then performs low frequency filtering and frequency through a digital to analog converter (DAC) and a low pass filter (LPF). Perform the transition process.

At this time, the LPF extracts only the baseband signal components of the OFDM signals repeated at predetermined frequency intervals to carry the signal to the desired carrier frequency.

On the other hand, if the transition band of the LPF is wider than the repeated OFDM frequency spectrum interval, noise may occur, so proper setting of the transition band is very important in the LPF design.

However, if the OFDM frequency repeating spectral spacing is too narrow, it is difficult to implement LPF, and there is a problem that it is difficult to guarantee accurate filtering.

In order to prevent this, a method of solving the problem by widening the interval between repeated frequency spectrums by inserting an N-point '0' into N-point data in an IFFT operation is used. In this case, the transmitter IFFT processor operates on 2N points composed of N zeros and N data, and the receiver FFT processor operates on N points.

As such, an OFDM system frequently uses a combination of a 2N-point IFFT processor at a transmitter and an N-point FFT processor at a receiver.

However, such a combination has a lower performance than the case of applying the 2N-point FFT processor, and the N-point FFT processor and the 2N-point FFT processor have to be designed separately, so that the design is difficult and the implementation cost increases.

In order to solve this problem, two N-point FFT operations are performed at the same time during the 2N-point IFFT operation, thereby reducing the waste of hardware by implementing the 2N-point IFFT processor and the N-point FFT processor as one processor. An apparatus that improves the performance of a receiver by performing two N-point FFT operations simultaneously in a 2N-point operation has been proposed.

1 is a block diagram illustrating a 2N-point and N-point FFT / IFFT dual mode device according to the prior art disclosed in Korean Patent Application No. 10-2004-0088768. As shown in FIG. 1, the 2N-point and N-point FFT / IFFT dual mode apparatus according to the related art receives a 2N data when the control signal '0' is input from the controller 210 and performs a butterfly operation. A butterfly operator 220; When the control signal 210 receives the control signal '0', the butterfly operation unit 220 receives the result values, respectively, and outputs N pieces. The control signal 210 receives the control signal '1'. First and second mux (MUX) 230 and 240 respectively outputting the first and second muxes; And first and second N-point FFT processors 250 and 260 for outputting N-point FFT operations on the output values of the first and second mux 230 and 240 under the control of the controller 210, respectively. It consists of.

However, the 2N-point and N-point FFT / IFFT dual-mode devices according to the prior art have a high latency Fourier transform using a DIF (Decimation In Frequency) method, and have a high latency and hardware to match the system speed due to serial data processing. There is also a problem that is difficult to implement.

Literature Information of the Prior Art

[Patent 1] Korean Patent Application No. 10-2004-0088768

The present invention provides a FFT / IFFT dual mode device for OFDM with low time delay, easy hardware implementation and control, and high performance by performing DIT (Decimation In Time) fast Fourier transform operation of M pieces of 2N data in parallel. The purpose is to provide a method.

In order to achieve the above object, the FFT / IFFT dual mode device for OFDM according to the present invention is configured to receive 2N (0 ≤ N, integer) data each consisting of a pair of real and imaginary parts in parallel and receive M data in parallel. An input for dividing the N odd data and the N even data in the Fourier transform mode and outputting the real and imaginary parts of the N odd data and the N even data in reverse fast Fourier transform mode. A buffer multiplexer, first and second N-point Radix-4 FFT processors that receive the N odd-numbered data and the N even-numbered data, respectively, and perform Fast Fourier Transform, and the first and second N-point Radix First and second Radix-4 butterfly portions for respectively computing -4 FFT processor outputs and the Radix-4 butter in the fast Fourier transform mode The output buffer multiplexer for arranging the output of the lie portion and outputting 2N data, and exchanging the real and imaginary portions of the aligned 2N data in the inverse fast Fourier transform mode, and the fast Fourier transform mode or inverse fast speed. It is characterized in that it comprises a control unit for controlling the Fourier transform mode.

Here, the input buffer multiplexer, the first and second N-point Radix-4 FFT processors, the first and second Radix-4 butterfly units, and the output buffer multiplexer operate by the DIT method.

The input buffer multiplexer splits / aligns 2N M-parallel data inputs into the N odd-numbered data and the N even-numbered data in the fast Fourier transform mode, and outputs the N-parallel data in the inverse fast Fourier transform mode. A multiplexer for exchanging and outputting the odd-numbered data and the real and imaginary parts of the N even-numbered data, and dividing the N-numbered and the even-numbered data by a predetermined number and temporarily storing them (M-2 ) FIFOs (First In First Out), and the (M-2) FIFOs output a predetermined number of data when they are stored.

In addition, M / 2 (0 ≦ M, integer) data are inputted in parallel to the first and second N-point Radix-4 FFT processors, and the first and second N-point Radix-4 FFT processors are each provided with a predetermined number. Contains the Radix-4 module.

Herein, the Radix-4 module includes a Radix-4 butterfly unit for butterfly input, a (M / 2-1) multiplier for multiplying the Radix-4 butterfly unit output and a tweed factor, and the Radix- And a commutator to align the butterfly output and the multiplier output.

In this case, the commutator includes a switch for switching the order of inputs, a delay unit delaying the commutator input by the time required for alignment, and a delay unit delaying the commutator output by the time required for alignment.

In addition, the output buffer multiplexer outputs the N odd-numbered data and the N even-numbered data by 2N in parallel in the fast Fourier transform mode, and outputs 2N in parallel in the inverse fast Fourier transform mode. A multiplexer for exchanging the real and imaginary parts of data and outputting the data; and (M-2) FIFOs for temporarily storing a predetermined number of 2N data in parallel, each of M pieces; The FIFO outputs a predetermined number of data when it is stored.

According to another aspect of the present invention, (a) setting a fast Fourier transform mode or an inverse fast Fourier transform mode, and (b) if the set mode is a fast Fourier transform mode, 2N pieces of input data Dividing / aligning the data into N odd-numbered data, (c) converting the N even-numbered and N odd-numbered data into an N-point Radix-4 fast Fourier transform, and (d) the N- A method for controlling an FFT / IFFT dual mode device for OFDM, characterized in that it comprises the steps of sorting and outputting N even-numbered data and N odd-numbered data with Point Radix-4 fast Fourier transform into 2N data. Is provided.

In this case, if the mode set in step (a) is an inverse fast Fourier transform mode, the method may further include exchanging a real part and an imaginary part of the data before the step (b) or the step (d). .

Here, step (c) is a step of performing the Radix-4 fast Fourier transform (c-1) a predetermined number of times, and in step (c-1), the step of performing the one of the Radix-4 fast Fourier transforms is (( c-2) performing butterfly operation on the N odd-numbered data and the N even-numbered data, respectively, (c-3) multiplying the butterfly operation by a tween factor, and (c- And 4) sorting the butterfly calculated data and the multiplied data.

The FFT / IFFT dual mode device for OFDM and the control method thereof according to the present invention have a 2N-point DIT (Decimation In Time) type fast Fourier transform operation of 2N pieces of data in parallel in M, so that time delay is low, and hardware implementation and control are possible. It is easy and the performance is excellent.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following embodiments are provided to those skilled in the art to fully understand the present invention, can be modified in various forms, the scope of the present invention is limited to the embodiments described below no.

2 to 3 are block diagrams illustrating an FFT / IFFT dual mode device for OFDM according to an embodiment of the present invention. 3 is an embodiment in the case where N = 128, and in the case of M = 8 in FIGS.

As shown in FIG. 2, the FFT / IFFT dual mode device for OFDM receives 2N (0 ≤ N, integer) data and distinguishes N odd-numbered data and N even-numbered data in fast Fourier transform mode. And an input buffer multiplexer 210 for outputting the real and imaginary parts of the N odd data and the N even data in an inverse fast Fourier transform mode, and the N odd data and the N data. First and second N-point Radix-4 FFT processors 220 and 230 that receive even-numbered data and perform Fast Fourier Transform, respectively, and the first and second N-point Radix-4 FFT processors 220 and 230. 2N data by aligning the outputs of the first and second Radix-4 butterfly parts 240 and 250 which respectively calculate an output, and the output of the Radix-4 butterfly parts 240 and 250 in the fast Fourier transform mode. To The output buffer multiplexer 260 which outputs the real part and the imaginary part of the 2N pieces of data in the inverse fast Fourier transform mode, and controls the fast Fourier transform mode or the inverse fast Fourier transform mode. It consists of.

The input buffer multiplexer 210 receives 2N (0 ≤ N, integer) data and outputs the N odd-numbered data and the N even-numbered data in the fast Fourier transform mode, and outputs the N number in the inverse fast Fourier transform mode. A multiplexer (not shown) for switching the real and imaginary parts of the sorted data, and (M-2) FIFOs (not shown) for temporarily storing the N odd data and the N even data by dividing a predetermined number. It is composed of

In this case, 2N (0 ≤ N, integer) data of the input buffer multiplexer 210 are inputted in parallel by M (0 ≤ M, integer), and each bit is composed of a pair of real and imaginary parts. It can be seen that there are 2M inputs.

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,For example, when N = 128 and M = 8, each input of the input buffer multiplexer 210 has M = 8 inputs as shown in FIG.

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The first N-point Radix-4 FFT processor 220 receives N even-numbered data and performs N-point fast Fourier transform.

The second N-point Radix-4 FFT processor 230 receives N odd-numbered data and performs N-point fast Fourier transform.

The first Radix-4 butterfly unit 240 performs a butterfly operation on the N even-numbered data and the N odd-numbered data which are fast Fourier transformed.

The second Radix-4 butterfly unit 250 performs a butterfly operation on the N odd-numbered data and the N even-numbered data which are fast Fourier transformed.

The output buffer multiplexer 260 receives the outputs of the N first Radix-4 butterfly parts 240 and the outputs of the N second Radix-4 butterfly parts 250 and rearranges the order to output 2N data. do.

The output buffer multiplexer 260 outputs (M-2) FIFOs (not shown) for dividing a predetermined number of 2N data inputted in parallel by M at a predetermined number and 2N aligned data in fast Fourier transform mode. And a multiplexer (not shown) for exchanging the real and imaginary parts of the 2N aligned data in the inverse fast Fourier transform mode.

The controller 270 controls the fft_ifft_mode signal according to the fast Fourier transform mode or the inverse fast Fourier transform mode to control the input buffer multiplexer 210 and the output buffer multiplexer 260.

For example, when the fft_ifft_mode signal is 0, the input buffer multiplexer 210 and the output buffer multiplexer 260 are controlled to operate in the fast Fourier transform mode. When the fft_ifft_mode signal is 1, the input buffer multiplexer 210 and the output buffer multiplexer 260 are controlled. Control to operate in inverse fast Fourier transform mode.

4 and 5 are block diagrams illustrating a 128-point Radix-4 FFT processor in accordance with one embodiment of the present invention. As shown in FIG. 4, the 128-point Radix-4 FFT processor includes three Radix-4 modules 410, 420, and 430, and as shown in FIG. 5, each Radix-4 module 410. , 420, 430 are three radix-4 butterfly parts 510 for butterfly input and three multipliers 521, 522, 523 for multiplying the output of the radix-4 butterfly part 510 with a tweed factor. ), And a commutator 530 that aligns the output of the Radix-4 butterfly unit 510 and the output of the multiplier units 521, 522, and 523.

The Radix-4 butterfly unit 510 receives N pieces of data in parallel and performs butterfly operations.

The multipliers 521, 522, and 523 receive the output of the Radix-4 butterfly unit 510 and the tweed factor, and output a multiplication result thereof.

Here, the Twiddle Factor is a periodic function used for converting a time signal into a frequency signal or converting a frequency signal into a time signal.

The commutator 530 is composed of a delay unit (not shown) for delaying an input, a switch (not shown) for exchanging an order of inputs, and a delay unit (not shown) for delaying an output, and each of the Radix-4 modules 410. The configuration of the commutator 530 included in, 420 and 430 may be slightly different.

As described above, the 128-point Radix-4 FFT processors 220 and 230 output the fast Fourier transform operation by performing a butterfly operation, a tween factor and a multiplication operation, a delay, or an alignment.

6 is a flowchart illustrating a method for controlling an FFT / IFFT dual mode device for OFDM according to an embodiment of the present invention. A description with reference to FIG. 6 is as follows.

First, a fast Fourier transform mode or an inverse fast Fourier transform mode is set (S600).

If the set mode is the fast Fourier transform mode (S610), the 2N input data are divided / sorted into N even-numbered data and N odd-numbered data and outputted (S620).

If the set mode is the inverse fast Fourier transform mode (S610), the real and imaginary parts of the 2N pieces of input data are exchanged (S670), and the result is divided / sorted into N even-numbered data and N odd-numbered data (S620). ).

Subsequently, the N even-numbered data and the N odd-numbered data are fast Fourier transformed by an N-point Radix-4 fast Fourier transform processor (S630).

Here, the N-point Radix-4 fast Fourier transform processor outputs a result of the fast Fourier transform operation on the input through a butterfly operation, a tween factor and multiplication operation, a delay and an alignment.

Next, a complete 2N-point Radix-4 fast Fourier transform is performed by performing a Radix-4 butterfly operation (S640).

If the set mode is the fast Fourier transform mode (S650), the N even-numbered data and the N odd-numbered data are rearranged to 2N data and output (S660).

If the set mode is the inverse fast Fourier transform mode (S650), the real part and the imaginary part of the N even-numbered data and the N odd-numbered data are exchanged (S680), and then rearranged to 2N data (S660).

The configuration of the present invention has been described above through the preferred embodiments and the accompanying drawings. However, these are only examples and are not used to limit the scope of the present invention. Those skilled in the art will understand that various modifications and equivalent other embodiments are possible therefrom, and the true scope of protection of the present invention should be determined by the technical spirit of the appended claims.

1 is a block diagram illustrating a 2N-point and N-point FFT / IFFT dual mode device according to the prior art.

2 to 3 are block diagrams illustrating an FFT / IFFT dual mode device for OFDM according to the present invention.

4 and 5 are block diagrams illustrating a 128-point Radix-4 FFT processor in accordance with the present invention.

6 is a flowchart illustrating a method for controlling an FFT / IFFT dual mode device for OFDM according to the present invention.

<Description of main parts of drawing>

210: input buffer multiplexer 220: N-point Radix-4 FFT processor

260: output buffer multiplexer 230: N-point Radix-4 FFT processor

240: first Radix-4 butterfly unit 270: control unit

250: second Radix-4 butterfly part

Claims (14)

2N (0 ≤ N, integer) data each consisting of a pair of real and imaginary parts are input in parallel, and each of N odd-numbered data and N even-numbered data is separated and output in the fast Fourier transform mode. An input buffer multiplexer for outputting the real part and the imaginary part of the N odd-numbered data and the N even-numbered data in a fast Fourier transform mode; First and second N-point Radix-4 FFT processors which receive the N odd-numbered data and the N even-numbered data and respectively perform fast Fourier transform; First and second Radix-4 butterfly parts for butterfly computing the first and second N-point Radix-4 FFT processor outputs, respectively; The output buffer for aligning the radix-4 butterfly part output in the fast Fourier transform mode and outputting 2N data, and exchanging the real and imaginary parts of the aligned 2N data in the inverse fast Fourier transform mode. Multiplexer, A controller for controlling the fast Fourier transform mode or the inverse fast Fourier transform mode FFT / IFFT dual mode device for OFDM comprising a. The system of claim 1, wherein the input buffer multiplexer, the first and second N-point Radix-4 FFT processors, the first and second Radix-4 butterfly portions, and the output buffer multiplexer are: A FFT / IFFT dual mode device for OFDM, characterized in that a fast Fourier transform operation of a DIT method. The method of claim 1, wherein the input buffer multiplexer, In the fast Fourier transform mode, 2N data inputs inputted in parallel by M are divided and outputted into the N odd-numbered data and the N even-numbered data, and the N odd-numbered data are output in the inverse fast Fourier transform mode. And a multiplexer for exchanging the real part and the imaginary part of the N even-numbered data to be output. (M-2) FIFOs for temporarily storing the N odd-numbered data and the N even-numbered data by dividing a predetermined number of pieces; The (M-2) FIFO is a FFT / IFFT dual mode device for OFDM, characterized in that for outputting a predetermined number of data stored. The input of claim 1 wherein the inputs of the first and second N-point Radix-4 FFT processors are: FFT / IFFT dual mode device for OFDM, characterized in that M / 2 (0 ≦ M, integer) parallel data. The method of claim 1, wherein the first and second N-point Radix-4 FFT processors are: An FFT / IFFT dual mode device for OFDM, characterized in that it comprises a predetermined Radix-4 module. The method of claim 5, wherein the Radix-4 module, Radix-4 butterfly part to calculate the input, (M / 2-1) multipliers multiplying the Radix-4 butterfly output and the tweed factor, A commutator that aligns the Radix-4 butterfly output and the multiplier output FFT / IFFT dual mode device for OFDM comprising a. The method of claim 6, wherein the commutator, Switch to switch the order of input, A delay unit delaying the commutator input by a time necessary for sorting; A delay unit delaying the commutator output by a time necessary for sorting FFT / IFFT dual mode device for OFDM comprising a. The method of claim 1, wherein the output buffer multiplexer, In the fast Fourier transform mode, the N odd-numbered data and the N even-numbered data are arranged in parallel by M data and output, and in the inverse fast Fourier transform mode, 2N data arranged in parallel by M in real number are real. A multiplexer for outputting by exchanging a part and an imaginary part, (M-2) FIFOs for temporarily storing a predetermined number of 2N pieces of data arranged in parallel by M pieces, The (M-2) FIFO is a FFT / IFFT dual mode device for OFDM, characterized in that for outputting a predetermined number of data stored. (a) setting a fast Fourier transform mode or an inverse fast Fourier transform mode; (b) if the set mode is a fast Fourier transform mode, dividing / aligning 2N input data into N even-numbered data and N odd-numbered data; (c) N-point Radix-4 fast Fourier transform of the N even and N odd data; (d) sorting and outputting the N even-numbered data and the N odd-numbered data of the N-point Radix-4 fast Fourier transform into 2N data FFT / IFFT dual mode device control method for OFDM comprising a. 10. The method of claim 9, wherein if the mode set in step (a) is an inverse fast Fourier transform mode, before the step (b) or the step (d), Exchanging a real part and an imaginary part of the data with each other; FFT / IFFT dual mode device control method for OFDM characterized in that it further comprises. The method of claim 9, wherein step (c) comprises: (c-1) performing a RADIX-4 fast Fourier transform a predetermined number of times. 12. The method of claim 11, wherein performing the one of the Radix-4 fast Fourier transforms in the step (c-1), (c-2) butterfly operation of the N odd-numbered data and the N even-numbered data, respectively; (c-3) multiplying the butterfly operation data with a tween factor; (c-4) sorting the butterfly operation data and the multiplication data FFT / IFFT dual mode device control method for OFDM comprising a. The method according to any one of claims 9 to 12, wherein the N even data and the N odd data, A method for controlling an FFT / IFFT dual mode device for OFDM, characterized by M / 2 parallel data. The method according to any one of claims 9 to 12, wherein the 2N data, A method of controlling an FFT / IFFT dual mode device for OFDM, characterized by M (0 ≦ M, integer) parallel data.

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