KR20090012461A - Gate structure of semiconductor memory device and method for forming same - Google Patents

Abstract

A gate structure and a method for forming the semiconductor memory device having a low interfacial resistance and thermally stable dual metal gate structure, the gate structure of the semiconductor memory device is formed on a gate insulating film pattern formed on a semiconductor substrate and a gate insulating film pattern A polysilicon film pattern doped with an impurity to be formed, a first barrier film pattern formed of cobalt formed by a chemical vapor deposition process and an atomic layer deposition process on a polysilicon film pattern doped with an impurity, and a first barrier film pattern And a tungsten film pattern formed on the second barrier film pattern and the second barrier film pattern formed of the metal and the metal nitride. As described above, by forming a barrier film containing cobalt that is less likely to react with the impurity than titanium on the polysilicon layer doped with impurities, the interfacial reaction may be blocked to lower the interface resistance.

Description

Gate structure in a semiconductor memory device and method of forming the same

The present invention relates to a gate structure of a semiconductor memory device and a method of forming the same. More particularly, the present invention relates to a gate structure of a low resistance semiconductor memory device including a barrier film for diffusion prevention and resistance reduction in a dual metal gate, and a method of forming the same.

As the manufacturing technology of semiconductor devices is developed and applications to semiconductor memory devices have been expanded, memory devices having high capacities have been developed. In particular, the degree of integration of DRAM devices in which a memory cell consists of one capacitor and one transistor has been significantly improved. As the semiconductor manufacturing process becomes complicated and the degree of integration of semiconductor chips increases to 1G bit DRAM or more, a gate structure having a relatively small size is required for a design rule of 0.25 μm or less.

In order to form the gate structure on the semiconductor substrate on which the gate insulating film is formed, a barrier film for reducing contact resistance is first formed on a polysilicon film containing impurities such as boron (B). The barrier layer forms a titanium layer by a chemical vapor deposition process or a sputtering method that provides titanium chloride (TiCl ₄ ) as a titanium source, and then ammonia (NH ₃ ) is injected onto the titanium layer to nitride the upper portion of the titanium layer to prevent diffusion. It is formed by changing to a titanium nitride film used as. Next, a tungsten film containing tungsten (W) as a conductive material is formed on the titanium nitride film. Thus, a gate structure of a dual metal gate structure including doped polysilicon and tungsten is completed.

In this case, the upper portion of the titanium film is nitrided to form a titanium nitride film, and then a subsequent heat treatment process is performed. When the p-type impurity is heavily doped in the polysilicon layer by the heat treatment process, titanium and the impurity of the titanium film under the barrier film actively react at the interface to form a deteriorated adhesion. For example, when the p-type impurity is boron (B) and has a dose of about 5E16, the deteriorated coalesced material is formed of titanium diboride (TiB ₂ ). The deteriorated coalesced material as described above forms a non-uniform surface with thermal stress generated at the interface between the polysilicon film and the titanium film. In addition, since a high resistance material such as titanium diboride is formed, there is a problem in that the electrical resistance of the gate structure is increased to decrease the reliability.

On the other hand, the impurity doped into the polysilicon film is an n-type impurity, and when doped at a low concentration, there is almost no thermal stress and adhesion at the interface with the titanium film and the titanium nitride film after the heat treatment process, and thus a relatively uniform surface is obtained. Was formed.

FIG. 1 is an electron micrograph for explaining a barrier film including a polysilicon film doped with a p-type impurity and titanium.

Referring to FIG. 1, a barrier made of a polysilicon film formed by plasma doping boron (B) at high concentration as a p-type impurity and formed by pulse laser ablation deposition (PLAD) and a lower portion formed on the polysilicon film is a titanium film. Severe lifting phenomenon L appears at the membrane interface. This lifting phenomenon occurs more and more toward the edge portion. When the polysilicon film is doped with a p-type impurity such as boron (B), the barrier film made of Ti / TiN is actively reacted with titanium (Ti) and boron (B) by a subsequent heat treatment process. This is because TiB ₂ ) is formed.

Therefore, the dopants doped in the polysilicon film and the lower portion of titanium (Ti) and the upper portion of the barrier film containing titanium nitride (TiN) to reduce the reactivity of titanium hardly generates a high resistance material, thermally Research on the gate structure of the semiconductor memory device that can increase the stability and to secure the disadvantage that the step coverage characteristics of the chemical vapor deposition process or sputtering process to form a barrier film made of Ti / TiN is relatively low It is becoming.

One object of the present invention for solving the above problems is to form a barrier film containing titanium and titanium nitride, and then to reduce the adhesion by heat treatment at the interface with the polysilicon film doped with impurities, low interface resistance and excellent To provide a gate structure of a semiconductor memory device having a thermal stability.

It is another object of the present invention to block the interfacial reaction with a polysilicon film doped with impurities during the heat treatment process after formation of the barrier film made of titanium and titanium nitride, and to improve low resistance and thermal safety. It is to provide a method for forming a structure.

A gate structure of a semiconductor memory device according to an embodiment of the present invention for achieving the above object is a gate insulating film pattern formed on a semiconductor substrate, and a polysilicon film pattern doped with an impurity formed on the gate insulating film pattern And a first barrier film pattern formed on the polysilicon film pattern doped with the impurity by a chemical vapor deposition process and an atomic layer deposition process, and made of cobalt, a chemical vapor deposition process on the first barrier film pattern, and And a tungsten film pattern formed by the atomic layer deposition process and formed on the second barrier film pattern formed of the metal and the metal nitride.

In addition, a lower portion of the first barrier layer pattern may be made of cobalt, and an upper portion of the first barrier layer pattern may be made of cobalt nitride.

In this case, a lower portion of the first barrier layer pattern is deposited by a chemical vapor deposition process using a cobalt source, and an upper portion is obtained by nitriding a cobalt precursor thin film formed by supplying a precursor source gas including cobalt.

A method of forming a gate structure of a semiconductor memory device according to an embodiment of the present invention for achieving the above another object, sequentially forming a gate insulating film and a polysilicon film doped with impurities on a semiconductor substrate. A first barrier layer made of cobalt is formed on the polysilicon layer doped with the impurity using a chemical vapor deposition process and an atomic layer deposition process. A second barrier film including metal and metal nitride is formed on the first barrier film by using a chemical vapor deposition process and an atomic layer deposition process. A tungsten film is formed on the second barrier film. A patterning process is performed to form a gate structure including a gate insulating layer pattern, a polysilicon layer pattern, a first barrier layer pattern, a second barrier layer pattern, and a tungsten layer pattern on the semiconductor substrate.

In one embodiment of the present invention, the first barrier film forms a cobalt film by a chemical vapor deposition process using a cobalt source on the polysilicon film doped with the impurity. A cobalt precursor thin film is formed on the polysilicon layer doped with the impurity by supplying a precursor source gas including cobalt on the cobalt layer. It may be formed by supplying a purge gas to remove the precursor source gas physically adsorbed on the cobalt precursor thin film.

In addition, the cobalt precursor thin film may be nitrided to form a cobalt nitride layer, and the upper portion of the first barrier layer may be formed of cobalt nitride.

As described above, since the first barrier layer is formed by including cobalt having a reaction lower than that of titanium doped with the polysilicon layer, the impurities may react with metals such as titanium of the second barrier layer. It may contain little coalesce to form a resistive material. In addition, since the first barrier film and the second barrier film are formed by a chemical vapor deposition process and an atomic layer stacking process, the barrier film may have excellent step coverage, and thus the uniformity of the film thickness may be improved, and the lower structure may be three-dimensional. This can also be useful if you have a structure.

According to the present invention as described above, a first barrier made of cobalt or cobalt and cobalt nitride using a gate insulating film pattern, a polysilicon film pattern doped with impurities, a chemical vapor deposition process and an atomic layer deposition process on a semiconductor substrate The film pattern, the second barrier film containing the metal and the metal nitride, and the tungsten pattern are sequentially provided. As a result, a gate structure is formed on the semiconductor substrate.

Since the first barrier layer pattern includes cobalt having a reaction lower than that of titanium doped with the polysilicon layer pattern, the impurities react with metals such as titanium of the second barrier layer pattern. It may contain little coalesce to form a high resistance material. In addition, since the first barrier layer pattern and the second barrier layer pattern are formed by a chemical vapor deposition process and an atomic layer deposition process, the uniformity of the barrier layer patterns can be improved, thereby improving the uniformity of the film thickness. It can be usefully applied even when the substructure has a three-dimensional structure.

Hereinafter, embodiments of the gate structure of the semiconductor memory device of the present invention and a method of forming the same will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the following embodiments. Those skilled in the art will be able to implement the invention in various other forms without departing from the spirit of the invention. In the accompanying drawings, the dimensions of the substrate, film, region, pattern or structure are shown to be larger than actual for clarity of the invention.

In the present invention, a film, region, pattern, or structure may be used "on", "up", "on", "top" or "bottom", "bottom" of a substrate, film, region, pad or pattern. When referred to as being "formed" or "under", it means that each film, region, pattern or structure is formed directly over or below a substrate, film, region or pattern, or is a different film, another region, another pattern or Other structures may additionally be formed on the substrate. In addition, where the thickness, region, pattern or structure is referred to as "first" and / or "second", it is not intended to limit these members but merely to distinguish the thickness, film, region, pattern or structure. Thus, "first" and / or "second" may be used selectively or interchangeably with respect to thickness, width, film, region, pattern or structure, respectively.

First embodiment

2 is a cross-sectional view illustrating a gate structure of a semiconductor memory device according to a first embodiment of the present invention.

Referring to FIG. 2, the gate structure 160 of the semiconductor memory device may include a gate insulating layer pattern 112, a polysilicon layer pattern 122 doped with an impurity formed on the gate insulating layer pattern 112, and a polysilicon doped with an impurity. Tungsten film formed on the first barrier film pattern 132 formed on the film pattern 122, the second barrier film pattern 142 formed on the first barrier film pattern 132, and the second barrier film pattern 142. Pattern 152.

The gate insulating layer pattern 112 is provided on the active region of the semiconductor substrate 100 made of silicon. Therefore, an isolation layer (not shown) is formed in the semiconductor substrate 100 to limit the aforementioned active region. Here, the device isolation layer corresponds to a field region. The gate insulating layer pattern 112 includes silicon oxide, and sufficiently reduces the leakage current between the polysilicon layer pattern 122 and the channel region (not shown) doped with an impurity thereon while maintaining a thin equivalent oxide layer thickness. It is formed to be.

The polysilicon layer pattern 122 doped with an impurity is formed on the gate insulating layer pattern 112, and the impurity may be an N-type impurity or a P-type impurity. Phosphor (P), arsenic (As) or antimony (Sb) may be used as the n-type impurity. Indium (In), gallium (Ga), or boron (B) may be used as the P-type impurity. These impurities may be used alone or in combination.

In general, polysilicon has a number of interfaces. Polysilicon has a relatively low electrical conductivity because electrons mainly move through the interface. Therefore, the electrical conductivity may be increased by doping the impurities. According to an embodiment of the present invention, the conductivity of the polysilicon layer pattern 122 may be increased by doping boron (B) with the impurities.

The first barrier film pattern 132 is provided on the polysilicon film pattern 122 doped with the impurity. The first barrier layer pattern 132 may be formed of a cobalt single layer. In addition, the first barrier layer pattern 132 may have a double layer structure having a lower portion of cobalt and an upper portion of cobalt nitride. In this case, the cobalt of the first barrier film pattern 132 serves as an ohmic film to reduce contact resistance, and the cobalt nitride is a diffusion barrier for preventing impurity ions from diffusing out of the polysilicon film pattern 122 and reacting. Act as. That is, the first barrier film pattern 132 serves to block the formation of a high resistance material by reacting the metal of the second barrier film pattern 142 with the impurities of the polysilicon film pattern 122 doped with impurities. do. Therefore, the material of the first barrier film pattern 132 may be a material having a lower reactivity with the impurities than the material of the second barrier film pattern 142. In the present invention, a substance having a low reactivity with boron (B) is used.

As an example, when boron (B) is used as the impurity and titanium is used as the metal of the second barrier film pattern 142, cobalt boride, which is a reactant of cobalt and boron of the first barrier film pattern 132, is used. (CoB) may be less formed than titanium diboride (TiB ₂ ), which is a reactant of the titanium and boron.

Theoretically, the Gibbs free energy (ΔG) generated when the titanium is formed of titanium diboride (TiB ₂ ) is about 800 to 1000 J / mol in the temperature range of 320 to 1100 ° C., whereas the cobalt Is the Gibbs free energy (ΔG) generated when cobalt boride (CoB) is formed at about -800 to 200 J / mol. Therefore, the free energy value of cobalt boride (CoB) is very large, it can be seen that the coupling reaction is relatively difficult to perform. Therefore, the first barrier layer pattern 132 including relatively low cobalt may be used as a reaction prevention layer for forming titanium diboride (TiB ₂ ).

On the other hand, even if arsenic (As) is used as the impurity and titanium is used as the second barrier layer pattern 142, cobalt arsenide, which is a reactant of cobalt and arsenic of the first barrier layer pattern 132, is used as another embodiment. (CoAs) may be less formed than titanium arsenide (TiAs), which is a reactant of titanium and arsenic.

Theoretically, the Gibbs free energy (ΔG) generated when the titanium is formed of titanium arsenide (TiAs) is about -1100 to -1000J / mol in the temperature range of 320 to 1100 ° C, whereas the cobalt is cobalt ace The Gibbs free energy (ΔG) generated when forming nit (CoAs) is measured to be about −500 to −50 J / mol. Therefore, it can be seen that the free energy value of cobalt arsenide (CoAs) is relatively large and the binding reaction is relatively less active. Accordingly, the first barrier layer pattern 132 including cobalt having a relatively low reactivity with arsenic may be used as an anti-reaction layer for forming titanium arsenide (TiAs).

The lower portion of the first barrier layer pattern 132 is formed by a chemical vapor deposition process in a temperature range of about 630 ° C to 650 ° C using a cobalt source containing a cobalt element on the polysilicon layer pattern 122 doped with impurities. A cobalt nitride film (not shown) formed by repeatedly performing one deposition cycle including a cobalt precursor source gas supply step, a purge step, a nitriding gas supply step, and a pumping step. Include.

In this case, CoCp (CO) ₂ , Co (acac) ₂ , CoCp _2, or CCTBA may be used as the precursor source gas including the cobalt source and cobalt. In the purge step, hydrogen gas may be used as the purge gas, and a portion where the cobalt precursor is physically adsorbed is removed. Ammonia (NH ₃ ) gas may be used as the nitride gas, and nitrogen (N ₂ ) plasma or ammonia (NH ₃ ) plasma excited through a remote plasma generator may be used as the nitride gas. The cobalt nitride film is formed by substituting nitrogen for a portion where the ligand is bonded to cobalt by the nitriding gas.

The second barrier film pattern 142 is provided on the first barrier film pattern 132. The lower portion of the second barrier layer pattern 142 is made of metal, and the upper portion is made of metal nitride. In this case, the metal of the second barrier layer pattern 142 lowers the contact resistance together with the first barrier layer pattern 132, and the metal nitride of the polysilicon layer pattern 122 doped with the impurity. It serves to prevent the diffusion of impurity ions. Therefore, the material of the second barrier layer pattern 142 may be formed of a material having a lower resistance than that of the polysilicon layer pattern 122 and the tungsten layer pattern 152 doped with impurities.

A lower portion of the second barrier layer 142 may include a metal such as titanium, tungsten, tantalum, or molybdenum, and an upper portion thereof may include a metal such as titanium nitride, tungsten nitride, tantalum nitride, or molybdenum nitride, including at least one of the metals. It may include a nitride film. As an example of a suitable structure as the second barrier film pattern 142, the lower portion may be made of titanium and the upper portion may be made of titanium nitride.

Specifically, the lower portion of the second barrier layer pattern 142 is supplied by a titanium gas source containing a titanium element on the first barrier layer pattern 132 by a chemical vapor deposition process in a temperature range of about 630 ° C to 650 ° C. A titanium nitride film (not shown) is formed, and an upper portion of the titanium nitride film (not shown) is formed by repeatedly performing one deposition cycle including a supply step, a purge step, a nitride gas supply step, and a pumping step of a titanium precursor source gas. Include.

Titanium chloride (TiCl ₄ ) may be used as the titanium source and the precursor source gas including titanium. In the purge step, hydrogen gas is used as the purge gas, and the portion where the titanium precursor is physically adsorbed by the purge is removed. Ammonia (NH ₃ ) gas may be used as the nitride gas, and nitrogen (N ₂ ) plasma or ammonia (NH ₃ ) plasma excited through a remote plasma generator may be used as the nitride gas. The titanium nitride film is formed by substituting nitrogen for the ligand-bonded portion with the nitride gas.

The tungsten film pattern 152 is positioned on the second barrier film pattern 142. Since the second barrier film pattern 142 is positioned under the tungsten film pattern 152, the tungsten (W) included in the tungsten film pattern 152 is almost toward the polysilicon film 122 doped with impurities, which is a conductive material. It does not spread.

Here, each of the first barrier layer pattern 132 and the second barrier layer pattern 142 is used for wiring of word lines, and thus, the polysilicon layer pattern 122 and the tungsten layer pattern 152 doped with impurities are formed. It is made of a material with low resistance compared to each.

As described above, according to an exemplary embodiment of the present invention, a barrier metal material made of cobalt and cobalt nitride having a low resistance between the doped polysilicon film pattern 122 and the tungsten film pattern 152 and having low reactivity with the impurities is used. By forming the barrier film pattern of the double thin film structure, it is possible to sufficiently prevent the formation of coalesced deteriorated by the subsequent heat treatment process. Therefore, a word line having a low interfacial resistance and a thermally stable gate structure can be easily implemented and utilized.

3 to 6 are cross-sectional views illustrating a method of forming a gate structure of the semiconductor memory device shown in FIG. 2.

Referring to FIG. 3, a gate insulating layer 110 is formed on a semiconductor substrate 100, and a polysilicon layer 120 doped with impurities is formed on the gate insulating layer 110. The gate insulating layer 110 may include silicon oxide.

The impurities may be N-type impurities or P-type impurities. Phosphor (P), arsenic (As) or antimony (Sb) may be used as the n-type impurity. Indium (In), gallium (Ga), or boron (B) may be used as the P-type impurity. These impurities may be used alone or in combination.

In the present invention, the conductive thin film having an appropriate electrical conductivity may be formed by doping boron (B) to the polysilicon film 120 doped with the impurity.

Referring to FIG. 4, the first barrier layer 130 is formed on the polysilicon layer 120 doped with impurities. The first barrier layer 130 may include cobalt. In addition, the first barrier layer 130 may include a lower portion of cobalt and an upper portion of cobalt nitride. At this time, the cobalt acts as an ohmic film to reduce contact resistance, and the cobalt nitride acts as a diffusion barrier to prevent impurity ions from diffusing out of the polysilicon film 120 and reacting. That is, the first barrier film 130 serves to block the formation of the high resistance material due to the reaction between the metal of the second barrier film 140 and the impurities of the polysilicon film 120 doped with impurities. . Therefore, the material of the first barrier layer 130 may be formed of a material having a lower reactivity with the impurities such as boron (B) or arsenic (As) than the material of the second barrier layer 140.

In detail, the first barrier layer 130 forms a cobalt layer (not shown) on the polysilicon layer 120 doped with impurities by a chemical vapor deposition process using a cobalt source. CoCp (CO) ₂ , Co (acac) ₂ , CoCp ₂ or CCTBA may be used as the cobalt source.

If the temperature when performing the chemical vapor deposition process is less than about 630 ℃, there is a problem that the cobalt is not effectively separated from the cobalt source. On the other hand, when the temperature of performing the chemical vapor deposition process exceeds about 650 ℃, there is a problem that the thermal stress on the polysilicon film 120 doped with impurities. Therefore, the temperature when performing the chemical vapor deposition process may be about 630 ℃ to about 650 ℃.

Subsequently, a cobalt precursor thin film (not shown) is formed on the surface of the polysilicon film 120 doped with impurities by supplying a precursor source gas including cobalt on the cobalt film in a gas phase.

CoCp (CO) ₂ , Co (acac) ₂ , CoCp _2, or CCTBA may be used as the precursor source gas including the cobalt. In this case, the precursor source gas is maintained in a liquid phase, but may be bubbled by a carrier gas such as argon or nitrogen to be vaporized.

The cobalt precursor thin film is formed by chemical adsorption and physical adsorption of cobalt precursors. Specifically, the cobalt precursor thin film includes a portion chemically adsorbed on the surface of the cobalt film and a portion physically adsorbed on the chemically adsorbed cobalt precursor thin film.

Subsequently, a purge gas is supplied to the cobalt precursor thin film in order to remove cobalt precursors physically adsorbed on the cobalt film. Hydrogen gas may be used as the purge gas. As described above, after the physically adsorbed portion is removed by the purge gas, the cobalt precursor thin film in atomic layer units remains on the cobalt film and the cobalt film on the doped polysilicon film 120.

Subsequently, a cobalt nitride film (not shown) in atomic layer units may be formed on the cobalt film by nitriding the cobalt precursor thin film by supplying a nitride gas onto the cobalt precursor thin film remaining on the cobalt film.

Ammonia (NH ₃ ) gas may be used as the nitride gas, and nitrogen (N ₂ ) plasma or ammonia (NH ₃ ) plasma excited through a remote plasma generator may be used as the nitride gas. In this case, the cobalt nitride film is formed on the polysilicon layer 120 doped with impurities by cobalt and ligand-substituted portions with nitrogen.

Subsequently, the cobalt film and the atomic layer are formed on the polysilicon film 120 doped with impurities by pumping and removing reaction by-products generated in the process of forming an upper portion of the first barrier film 130 as a cobalt nitride film using a nitride gas. The first barrier film 130 formed of the cobalt nitride film in units is completed.

Impurity-doped polysilicon as shown in FIG. 4 by repeatedly performing one deposition cycle comprising the supplying step, purging step, nitriding gas supplying step and pumping step of the cobalt precursor source gas as described above. A first barrier film 130 having a desired thickness may be formed on the film 120. In the case of forming the first barrier layer 130 using the atomic layer stacking process, the step barrier is excellent, so that it is easy to form on the structure having a three-dimensional structure, and simultaneously deposits the metal layers serving as the ohmic layer and the barrier layer. It is possible.

If the barrier layer is formed of titanium and titanium nitride without forming the first barrier layer 130 made of cobalt and cobalt nitride on the doped polysilicon layer 120, the impurities and titanium are actively React to form a high resistance material. If the impurity is boron (B), the high resistance material is titanium diboride (TiB ₂ ). Therefore, when the high resistance material is generated, a problem arises in that a non-uniform surface is formed by thermal stress given to the surface on the polysilicon layer 120 doped with the impurity.

Therefore, in the present invention, the first barrier containing cobalt or cobalt and cobalt nitride using cobalt having a larger Gibbs free energy value than that of titanium diboride (TiB ₂ ), which is difficult to bind with the impurity (B). By forming the film 130, it is possible to effectively reduce the problem that a high resistance material is formed by reaction of titanium and the impurities of the second barrier film 140 (FIG. 5) including titanium.

Referring to FIG. 5, a second barrier layer 140 is formed on the first barrier layer 130. A lower portion of the second barrier layer 140 includes a metal and an upper portion includes a metal nitride. In this case, the metal lowers the contact resistance together with the first barrier layer 130, and the metal nitride serves to prevent diffusion of impurity ions of the polysilicon layer 120 doped with the impurity. The lower portion of the second barrier layer 140 may include a metal such as titanium, tungsten, tantalum, or molybdenum, and the upper portion may include a metal such as titanium nitride, tungsten nitride, tantalum nitride, or molybdenum nitride including at least one of the metals. It may include a nitride film. In this case, as a suitable structure for the second barrier film 140, a structure including a lower portion of titanium and a titanium nitride portion of an upper portion may be used.

In an embodiment of the present invention, the lower portion of the second barrier layer 140 may be formed by a chemical vapor deposition process using titanium chloride (TiCl ₄ ) as a titanium source.

If the temperature when performing the chemical vapor deposition process is less than about 630 ℃, there is a problem that titanium is not effectively separated from the titanium source. On the other hand, when the temperature of performing the chemical vapor deposition process exceeds about 650 ℃, there is a problem that can give a thermal stress to the first barrier film 130 or the polysilicon film 120 doped with impurities. . Therefore, the temperature when performing the chemical vapor deposition process may be about 630 ℃ to about 650 ℃.

An upper portion of the second barrier layer 240 supplies a precursor source gas including titanium to the titanium layer to form a titanium precursor thin film (not shown) on the titanium layer. Titanium chloride (TiCl ₄ ) may be used as the precursor source gas including titanium. Subsequently, a purge gas is supplied to remove the precursor source gas physically adsorbed on the titanium precursor thin film. Hydrogen gas may be used as the purge gas. As described above, after the physically adsorbed portion is removed by the purge gas, the cobalt precursor thin film and the cobalt precursor thin film in atomic layer units remain on the first barrier film 130.

Subsequently, the nitride gas is supplied onto the titanium precursor thin film remaining on the cobalt film to nitride the titanium nitride film, thereby forming a titanium nitride film in atomic layer units on the titanium film.

Subsequently, the second barrier layer 140 including the titanium layer and the titanium nitride layer is completed on the first barrier layer 130 by pumping and removing reaction byproducts generated in the process of forming the titanium nitride layer using the nitride gas. . As such, the upper portion of the second barrier layer 140 may form a titanium nitride layer in atomic layer units.

In the same manner as described above, that is, by repeatedly performing one deposition cycle including the supplying step, the purging step, the nitriding gas supplying step, and the pumping step of the titanium precursor source gas, the second barrier film 140 as shown in FIG. It is possible to form a titanium nitride film having a desired thickness on the titanium film under the bottom.

Referring to FIG. 6, a tungsten film 150 is formed on the second barrier film 140. The tungsten film 150 is formed by performing a chemical vapor deposition process and is formed as a gate conductive film.

Subsequently, as shown in FIG. 1, a patterning process is performed to form a gate insulating film pattern 112, a polysilicon film pattern 122, a first barrier film pattern 132, and a second barrier on the semiconductor substrate 100. The gate structure 160 including the film pattern 142 and the tungsten film pattern 152 is completed.

Second embodiment

7 is a cross-sectional view illustrating a gate structure according to a second embodiment of the present invention. The gate structure according to the present embodiment further includes a cobalt film pattern 212 between the second barrier film pattern 142 and the tungsten film pattern 152. It is substantially the same as the gate structure according to. Therefore, repeated descriptions are omitted and reference numerals substantially the same as those used in FIG. 7 are used for components that are substantially the same as those described in FIG. 2.

Referring to FIG. 7, a cobalt film pattern 212 is disposed between the second barrier film pattern 142 and the tungsten film pattern 152 to lower the contact resistance. The cobalt film pattern 212 reduces contact resistance together with the first barrier film pattern 132 and the second barrier film pattern 142.

8 to 9 are cross-sectional views for describing a method of forming the gate structure illustrated in FIG. 7.

The method of forming the gate structure according to the present embodiment is substantially similar to the method of forming the gate structure already described with reference to FIGS. 3 to 6 except for forming the second cobalt film pattern. Therefore, repeated descriptions are omitted and the same reference numerals are used in FIGS. 8 to 9 for components that are substantially the same as those described in FIGS. 3 to 6.

Referring to FIG. 8, a gate insulating layer 110, a polysilicon layer 120 doped with impurities, a first barrier layer 130, and a second barrier layer 140 are sequentially formed on the semiconductor substrate 100. . Subsequently, a second cobalt film 210 is formed on the second barrier film 140. The second cobalt film 210 is formed by a chemical vapor deposition process using a cobalt source, and serves to reduce contact resistance. In this case, CoCp (CO) ₂ , Co (acac) ₂ , CoCp ₂ or CCTBA may be used as the cobalt source.

Referring to FIG. 9, a tungsten film 150 is formed on the second cobalt film 210.

Subsequently, as shown in FIG. 7, a patterning process is performed to form a gate insulating film pattern 112, a polysilicon film pattern 122, a first barrier film pattern 132, and a second film on the semiconductor substrate 100. The gate structure 260 including the barrier film pattern 142, the cobalt film pattern 212, and the tungsten film pattern 152 is completed.

Although the above has been described with reference to preferred embodiments of the present invention, those skilled in the art will variously modify and change the present invention without departing from the spirit and scope of the invention as set forth in the claims below. I can understand that you can.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a gate structure of a semiconductor memory device, wherein a barrier film containing cobalt that is less likely to react with titanium as an ohmic film and a barrier film is formed on a polysilicon film doped with impurities when a dual metal gate is formed. It is possible to reduce the thermal stability and interfacial resistance by blocking the formation of coalescence due to the interfacial reaction.

FIG. 1 is an electron micrograph for explaining a barrier film including a polysilicon film doped with a p-type impurity and titanium.

2 is a cross-sectional view illustrating a gate structure of a semiconductor memory device according to a first embodiment of the present invention.

3 to 6 are cross-sectional views illustrating a method of forming a gate structure of the semiconductor memory device shown in FIG. 2.

7 is a cross-sectional view illustrating a gate structure according to a second embodiment of the present invention.

8 to 9 are cross-sectional views for describing a method of forming the gate structure illustrated in FIG. 7.

<Description of the symbols for the main parts of the drawings>

100 semiconductor substrate 110 gate insulating film

112 gate insulating film pattern 120 impurity doped polysilicon film

121: impurity doped polysilicon film pattern

130: first barrier film 132: first barrier film pattern

140: second barrier film 142: second barrier film pattern

150: tungsten film 152: tungsten film pattern

160, 260: gate structure 210: cobalt film

212 cobalt film pattern

Claims (13)

A gate insulating film pattern formed on the semiconductor substrate; A polysilicon film pattern doped with an impurity formed on the gate insulating film pattern; A first barrier film pattern formed of cobalt on the polysilicon film pattern doped with the impurity by a chemical vapor deposition process and an atomic layer deposition process; A second barrier film pattern formed on the first barrier film pattern by a chemical vapor deposition process and an atomic layer deposition process and formed of metal and metal nitride; And A gate structure of a semiconductor memory device including a tungsten film pattern formed on the second barrier film pattern. The gate structure of claim 1, wherein a lower portion of the first barrier layer pattern is made of cobalt, and an upper portion of the first barrier layer pattern is made of cobalt nitride. The method of claim 2, wherein the lower portion of the first barrier layer pattern is deposited by a chemical vapor deposition process using a cobalt source, and the upper portion is obtained by nitriding a cobalt precursor thin film formed by supplying a precursor source gas including cobalt. A gate structure of a semiconductor memory device, characterized in that. The method of claim 3, wherein the impurity is boron (B), the precursor source gas containing the cobalt is any one selected from the group consisting of CoCp (CO) ₂ , Co (acac) ₂ , CoCp ₂ and CCTBA. A gate structure of a semiconductor memory device. The method of claim 1, wherein the lower portion of the second barrier layer pattern is made of one metal selected from the group consisting of titanium, tungsten, tantalum, and molybdenum, and the upper portion of the second barrier layer pattern is formed of at least one of the metals. A gate structure of a semiconductor memory device, characterized in that consisting of a metal nitride containing. The gate structure of claim 1, further comprising a cobalt pattern for lowering a contact resistance between the second barrier film pattern and the tungsten film pattern. Sequentially forming a gate insulating film and a polysilicon film doped with an impurity on the semiconductor substrate; Forming a first barrier film made of cobalt on the polysilicon film doped with the impurity using a chemical vapor deposition process and an atomic layer deposition process; Forming a second barrier film including a metal and a metal nitride on the first barrier film by using a chemical vapor deposition process and an atomic layer deposition process; Forming a tungsten film on the second barrier film; And Performing a patterning process to form a gate structure including a gate insulating layer pattern, a polysilicon layer pattern, a first barrier layer pattern, a second barrier layer pattern, and a tungsten layer pattern on the semiconductor substrate; Method of forming the structure. The method of claim 7, wherein the forming of the first barrier film, Forming a cobalt film on the polysilicon film doped with the impurity by a chemical vapor deposition process using a cobalt source; Supplying a precursor source gas including cobalt on the cobalt film to form a cobalt precursor thin film on the doped polysilicon film; And And supplying a purge gas to remove the precursor source gas that is physically adsorbed onto the cobalt precursor thin film. The method of claim 8, wherein the impurity is boron (B), and the cobalt source and the precursor source gas including cobalt are any one selected from the group consisting of CoCp (CO) ₂ , Co (acac) ₂ , CoCp _2, and CCTBA. A method of forming a gate structure of a semiconductor memory device, characterized in that. The method of claim 8, further comprising nitriding the cobalt precursor thin film to form a cobalt nitride layer so that an upper portion of the first barrier layer is formed of cobalt nitride. . The method of claim 10, wherein the nitriding is performed by supplying ammonia (NH ₃ ) gas, nitrogen (N ₂ ) plasma, or ammonia (NH ₃ ) plasma on the cobalt precursor thin film to form a ligand moiety coupled to cobalt of the cobalt precursor thin film. A method of forming a gate structure of a semiconductor memory device, characterized in that the substitution with nitrogen. The metal nitride of claim 7, wherein a lower portion of the second barrier layer is made of one metal selected from the group consisting of titanium, tungsten, tantalum, and molybdenum, and an upper portion of the second barrier layer includes at least one of the metals. A method of forming a gate structure of a semiconductor memory device, characterized in that consisting of. The method of claim 7, after the forming of the second barrier film, And forming a cobalt pattern on the second barrier layer to lower the contact resistance with the tungsten layer.

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