KR20080062743A - Semiconductor device and manufacturing method - Google Patents

Abstract

The semiconductor device of the present invention includes a hafnium zirconium oxide (HfZrO) film pattern arranged as a gate insulating film on a semiconductor substrate. A gate electrode film pattern is disposed on the hafnium zirconium oxide (HfZrO) film pattern.

Description

Semiconductor device and method of manufacturing the same {Semiconductor device and method of fabricating the same}

1 is a cross-sectional view showing an example of a conventional semiconductor device.

2 and 3 are cross-sectional views illustrating a semiconductor device and a method of manufacturing the same according to the present invention.

4 is a view illustrating an example of a method of forming a hafnium zirconium oxide (HfZrO) film of FIGS. 2 and 3.

FIG. 5 is a diagram illustrating another example of a method of forming a hafnium zirconium oxide (HfZrO) film of FIGS. 2 and 3.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, to a semiconductor device having a ternary oxide gate insulating film and a method of manufacturing the same.

With the recent increase in the degree of integration of semiconductor devices, in devices with a line width of 0.1 µm or less, the gate insulating film has an electrical thickness of approximately 40 kW or less for reducing short channel effects, effective channel control, and the like. Is required. However, at such a thickness, leakage current increases due to direct tunneling between the semiconductor substrate and the gate electrode, causing abnormal operation of the transistor.In the case of a semiconductor memory device such as DRAM, the refresh time associated with the capacitor Various problems arise, such as reduced refresh time. Therefore, recent studies have been actively conducted to form a gate insulating film using a high-k dielectric that can reduce electrical thickness while maintaining a sufficient physical thickness to prevent such direct tunneling. .

1 is a cross-sectional view illustrating an example of a semiconductor device having a gate insulating film having such a high dielectric constant. As shown in FIG. 1, the semiconductor substrate 100 has an active region 120 defined by the device isolation layer 110. A gate stack is disposed on the active region 120. The gate stack includes a silicon oxide film 130, a high dielectric constant gate insulating film 140, a barrier metal film 150, and a gate electrode film 160. It has a structure arranged sequentially. Instead of the silicon oxide film 130, a silicon oxide nitride film (SiON) film may be used. The high dielectric constant gate insulating film 140 may be formed of a metal oxide film such as a hafnium oxide (HfO ₂ ) film or a tantalum oxide (Ta ₂ O ₅ ) film. The barrier metal film 150 may be formed of a titanium nitride (TiN) film or a tungsten nitride (WN) film. The gate electrode layer 160 may include a tungsten silicide (WSi) film, a tungsten (W) film, or a titanium silicide (TiSi ₂ ) film.

By using a hafnium oxide (HfO ₂ ) film or a tantalum oxide (Ta ₂ O ₅ ) film as the high dielectric constant gate insulating film 140, as described above, a small electrical thickness is achieved while maintaining a sufficient physical thickness. have. This is due to the high dielectric constant of the hafnium oxide (HfO ₂ ) film or the tantalum oxide (Ta ₂ O ₅ ) film. It is known that the dielectric constant? Of the hafnium oxide (HfO ₂ ) film is approximately 20, and the dielectric constant? Of the tantalum oxide (Ta ₂ O ₅ ) film is approximately 25.

However, when the metal gate electrode film is used as the gate electrode film 160, only such a dielectric constant has a limit in suppressing the deterioration of the device performance. As an example, in a structure in which a tantalum oxide (Ta ₂ O ₅ ) film is used as the gate insulating film 140 and a metal film is used as the gate electrode film 160, the work function of the metal gate electrode film is large, and thus, n A problem arises in that the threshold voltage of the channel-type MOS transistor is measured as high as about 1V or more. In order to solve this problem, the high threshold voltage should be reduced, and thus, when channel ion implantation, phosphorus (P) should be used as impurity ion instead of boron (B). Due to the high diffusion rate, channels are not formed near the surface, but buried channels are formed, which leads to a problem of degrading the performance of the device.

The technical problem to be achieved by the present invention is to secure a thin electrical thickness while having a sufficient physical thickness, and to solve the difficulty of controlling the threshold voltage due to the high work function of the metal gate electrode film even when the metal film is used as the gate electrode film. It is to provide a semiconductor device.

Another object of the present invention is to provide a method of manufacturing the semiconductor device as described above.

In order to achieve the above technical problem, a semiconductor device according to the present invention, a hafnium zirconium oxide (HfZrO) film pattern disposed as a gate insulating film on a semiconductor substrate; And a gate electrode film pattern disposed on the hafnium zirconium oxide (HfZrO) film pattern.

In the present embodiment, a silicon oxide film or a silicon oxide nitride film may be further provided between the semiconductor substrate and the hafnium zirconium oxide (HfZrO) film pattern.

In this case, the silicon oxide film or silicon oxide nitride film preferably has a thickness of less than 15 kPa.

The hafnium zirconium oxide (HfZrO) film pattern preferably has a thickness of 20-500 Å.

In an embodiment, the barrier metal film pattern may be further provided between the hafnium zirconium oxide (HfZrO) film pattern and the gate electrode film pattern.

In this case, the barrier metal film pattern may be formed of a titanium nitride film or a tungsten nitride film.

The gate electrode film pattern may be formed of a polysilicon film, a tungsten silicide film, a tungsten film, or a titanium silicide film.

In order to achieve the above technical problem, a method of manufacturing a semiconductor device according to the present invention, forming a buffer insulating film on a semiconductor substrate; Forming a hafnium zirconium oxide (HfZrO) film on the buffer insulating film; And forming a gate electrode film on the hafnium zirconium oxide (HfZrO) film.

The forming of the buffer insulating film may be performed by using a rapid heat treatment method in an oxygen atmosphere or a nitrogen dioxide atmosphere and a temperature of 700 to 1100 ° C.

The hafnium zirconium oxide (HfZrO) film may be performed using an atomic layer deposition method.

In this case, the atomic layer deposition method, using a C ₁₆ H ₃₆ HfO ₄ as a precursor as a hafnium (Hf) source gas, using a C ₁₆ H ₃₆ ZrO ₄ as a precursor as a zirconium (Zr) source gas, the reaction gas As ozone, plasma oxygen or water vapor.

Forming a hafnium zirconium oxide (HfZrO) film by using the atomic layer deposition method, the first step of sequentially performing hafnium (Hf) source gas supply, purge gas supply, reaction gas supply and purge gas supply, and zirconium (Zr) performing a second step of sequentially performing source gas supply, purge gas supply, reactant gas supply, and purge gas supply, wherein the ratio of the first step and the second step is at least 9: 1 or less; Can be

Forming a hafnium zirconium oxide (HfZrO) film using the atomic layer deposition method, hafnium (Hf) source gas supply, purge gas supply, zirconium (Zr) source gas supply, purge gas supply, reaction gas supply and purge gas The step of sequentially performing the supply may be performed repeatedly, but the number of supply of the hafnium (Hf) source gas and the supply of the zirconium (Zr) source gas may be at least 9: 1 or less.

In the present embodiment, after forming the hafnium zirconium oxide (HfZrO) film may further comprise performing a plasma annealing in a bias of 100 to 500W, low temperature of 200 to 500 ℃ and N ₂ O atmosphere.

In addition, after forming the hafnium zirconium oxide (HfZrO) film may further include performing annealing in an O ₂ / N ₂ atmosphere having a temperature of 500 to 900 ℃ and N ₂ atmosphere or a ratio of 0.1 or less.

The method may further include forming a barrier metal film on the hafnium zirconium oxide (HfZrO) film before forming the gate electrode film.

In this case, the barrier metal film may be formed of a titanium nitride film or a tungsten nitride film.

The gate electrode film may be formed of a polysilicon film, a tungsten silicide film, a tungsten film, or a titanium silicide film.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, embodiments of the present invention may be modified in many different forms, and the scope of the present invention should not be construed as being limited by the embodiments described below.

2 and 3 are cross-sectional views illustrating a semiconductor device and a method of manufacturing the same according to the present invention.

First, referring to FIG. 3, a semiconductor device according to the present invention is formed on a semiconductor substrate 200 having an active region 220 defined by an isolation layer 210. The buffer insulating layer pattern 230 is disposed on the active region 220 of the semiconductor substrate 200. The buffer insulating film pattern 230 is formed of a silicon oxide (SiO ₂ ) film or a silicon oxide nitride (SiON) film having a thickness of less than about 15 μs. The buffer insulating film pattern 230 not only improves the interfacial characteristics between the subsequent gate insulating film and the semiconductor substrate 200, but also suppresses oxidation of the semiconductor substrate 200 during subsequent heat treatment in an oxygen (O ₂ ) atmosphere. .

A hafnium zirconium oxide (HfZrO) film pattern 240 is disposed on the buffer insulating film pattern 230 as a gate insulating film. The dielectric constant (ε) of the hafnium zirconium oxide (HfZrO) film pattern 240 is approximately 30-50, and a tantalum oxide (Ta ₂ O ₅ ) film (ε = 25) and hafnium oxide, which are generally used as a high dielectric constant gate insulating film. It is larger than the dielectric constant of the (HfO ₂ ) film (ε = 20) or the aluminum oxide (Al ₂ O ₃ ) film (ε = 9). Therefore, it is possible to secure a thin electrical thickness while having a sufficient physical thickness. It can also increase resistance to subsequent thermal processes and oxidation atmospheres. In particular, the process margin is increased because the effective thickness of the selective oxidation process performed when the gate electrode film is formed of a metal film and resistance to deterioration of reliability in a hydrogen rich (H ₂ rich) oxidation atmosphere are larger than in the conventional case. And a highly reliable gate insulating film. The hafnium zirconium oxide (HfZrO) film pattern 240 has a thickness of about 20-500 Å.

The barrier metal film pattern 250 and the gate electrode film pattern 260 are sequentially disposed on the hafnium zirconium oxide (HfZrO) film pattern 240. The barrier metal film pattern 250 may be formed of a titanium nitride (TiN) film or a tungsten nitride (WN) film. The gate electrode pattern 260 may be formed of a metal film such as a titanium silicide (TiSi _x ) film, a tungsten silicide (WSi) film, or a tungsten (W) film, and in some cases, may be formed of a polysilicon film. Although not shown in the drawing, a source / drain region (not shown) is disposed in the active region 220 of the semiconductor substrate 200.

In order to manufacture the semiconductor device according to the present invention, first, as shown in FIG. 2, the buffer insulating film 231 is formed on the semiconductor substrate 200 having the active region 220 defined by the device isolation film 210. do. Next, a hafnium zirconium oxide (HfZrO) film 241 is formed on the buffer insulating film 231 as a gate insulating film. The barrier metal film 251 and the gate electrode film 261 are sequentially formed thereon.

The buffer insulating film 231 is formed of a silicon oxide (SiO ₂ ) film or a silicon oxide nitride (SiON) film. In the case of forming a silicon oxide (SiO ₂ ) film, it is formed using an Rapid Thermal Process (RTP) at an oxygen (O ₂ ) atmosphere and at a temperature of approximately 700-1100 ° C. In the case of forming a silicon oxide nitride (SiON) film, it is formed using a rapid heat treatment method at a nitrogen dioxide (N ₂ O) atmosphere and at a temperature of approximately 700-1100 ° C. In either case, if the thickness of the buffer insulating film 231 is thick, the dielectric constant characteristic of the gate insulating film is reduced, so that the thickness of the buffer insulating film 231 is 15 kΩ or less.

A hafnium zirconium oxide (HfZrO) film 241 as a gate insulating film is formed using atomic layer deposition (ALD). The barrier metal film 251 is formed of a titanium nitride (TiN) film or a tungsten nitride (WN) film. The gate electrode film 261 is formed of a metal film such as a titanium silicide (TiSi _x ) film, a tungsten silicide (WSi) film, or a tungsten (W) film, and in some cases, may also be formed of a polysilicon film.

In order to form the hafnium zirconium oxide (HfZrO) film 241 using the atomic layer deposition (ALD) method, an organic metal compound such as C ₁₆ H ₃₆ HfO ₄ is used as a precursor as a hafnium (Hf) source gas. As a zirconium (Zr) source gas, an organometallic compound such as C ₁₆ H ₃₆ ZrO ₄ is used as a precursor. As the reaction gas, ozone (O ₃ ), plasma oxygen (plasma O ₂ ), or water vapor (H ₂ O vapor) is used. The thickness of the hafnium zirconium oxide (HfZrO) film 241 is approximately 20-500 kPa.

4 is a diagram illustrating an example of a process of forming a hafnium zirconium oxide (HfZrO) film of FIGS. 2 and 3 in more detail.

Referring to FIG. 4, first, a semiconductor substrate 200 on which a buffer insulating film 231 is formed is loaded into an atomic layer deposition facility. And hafnium (Hf) source gas, purge gas, reaction gas and purge gas are sequentially supplied. Then, one cycle (cNbcle) in which a hafnium oxide (Hf _x O _y ) atomic layer is formed is performed. As a hafnium (Hf) source gas, an organometallic compound such as C ₁₆ H ₃₆ HfO ₄ is used as a precursor. Hafnium (Hf) source gas is supplied by approximately 50-500 sccm. As the reaction gas, ozone (O ₃ ), plasma oxygen (plasma O ₂ ) or water vapor (H ₂ 0 vapor) is used. When using ozone (O ₃ ) at a concentration of approximately 200 ± 20 g / m ₃ as the reaction gas, the supply amount is approximately 0.1-1 slm. Nitrogen (N ₂ ) gas or argon (Ar) gas is used as the purge gas.

After performing one cycle for forming a hafnium oxide (Hf _x O _y ) atomic layer, one cycle for forming a zirconium oxide (Zr _x O _y ) atomic layer is performed. Specifically, zirconium (Zr) source gas, purge gas, reaction gas and purge gas are sequentially supplied. As a source gas of the zirconium (Zr) component, an organometallic compound such as C ₁₆ H ₃₆ ZrO ₄ is used as a precursor. Zirconium (Zr) source gas supplies approximately 50-500 sccm. As the reaction gas, ozone (O ₃ ), plasma oxygen (plasma O ₂ ) or water vapor (H ₂ 0 vapor) is used. When using ozone (O ₃ ) at a concentration of approximately 200 ± 20 g / m ₃ as the reaction gas, the supply amount is approximately 0.1-1 slm. Nitrogen (N ₂ ) gas or argon (Ar) gas is used as the purge gas.

As such, when one cycle in which a hafnium oxide (Hf _x O _y ) atomic layer is formed and one cycle in which a zirconium oxide (Zr _x O _y ) atomic layer is formed are performed, hafnium zirconium oxide in atomic layer units is formed on the buffer insulating film 231. A (HfZrO) film 241 is formed, and the above process may be repeatedly performed to finally form a hafnium zirconium oxide (HfZrO) film 241 having a desired thickness, for example, approximately 20-500 Å thickness. At this time, one cycle in which the hafnium oxide (Hf _x O _y ) atomic layer is formed and one cycle in which the zirconium oxide (Zr _x O _y ) atomic layer is formed are performed at a ratio of about 9: 1 or less, thereby performing hafnium (Hf) and Control the relative composition of zirconium (Zr).

FIG. 5 is a view illustrating another example of a process of forming a hafnium zirconium oxide (HfZrO) film of FIGS. 2 and 3.

Referring to FIG. 5, first, a semiconductor substrate 200 on which a buffer insulating film 231 is formed is loaded into an atomic layer deposition facility. The hafnium (Hf) source gas, purge gas, zirconium (Zr) source gas, purge gas, reaction gas and purge gas are sequentially supplied into the atomic layer deposition facility. Then, one cycle in which the hafnium zirconium oxide (HfZrO) film 241 is formed in atomic layer units is performed. Also in this case, as the hafnium (Hf) source gas, an organometallic compound such as C ₁₆ H ₃₆ HfO ₄ is used as a precursor. As a source gas of the zirconium (Zr) component, an organometallic compound such as C ₁₆ H ₃₆ ZrO ₄ is used as a precursor. The hafnium (Hf) source gas and the zirconium (Zr) source gas are supplied at approximately 50-500 sccm, respectively. As the reaction gas, ozone (O ₃ ), plasma oxygen (plasma O ₂ ) or water vapor (H ₂ 0 vapor) is used. When using ozone (O ₃ ) at a concentration of approximately 200 ± 20 g / m ₃ as the reaction gas, the supply amount is approximately 0.1-1 slm. Nitrogen (N ₂ ) gas or argon (Ar) gas is used as the purge gas. At this time, the number of supply of hafnium (Hf) source gas and the number of supply of zirconium (Zr) source gas is at least 9: 1 or less to adjust the relative composition ratio of hafnium (Hf) and zirconium (Zr). In some cases, instead of adjusting the supply frequency, the supply amount of hafnium (Hf) source gas and the supply amount of zirconium (Zr) source gas may be adjusted.

After forming the hafnium zirconium oxide (HfZrO) film 241, plasma anneal was performed by a bias of approximately 100-500 W, a low temperature of approximately 200-500 ° C., and a nitrogen dioxide (N ₂ O) atmosphere, and deposited hafnium zirconium oxide. The oxygen is supplied to the oxygen depletion portion of the (HfZrO) film 241 to remove voids, and the organic material and nitrogen components included in the hafnium zirconium oxide (HfZrO) film 241 are removed during the deposition process. In performing the plasma annealing, the pressure of the chamber is maintained at about 0.1-10torr, the supply amount of the atmospheric gas is set to about 5sccm to 5slm, and the running time is set at about 1-5 minutes.

After performing low temperature plasma annealing, high temperature annealing in a nitrogen (N ₂ ) atmosphere or an oxygen / nitrogen (O ₂ / N ₂ ) atmosphere having a ratio of 0.1 or less can be performed. Can be. In this case, the hafnium zirconium oxide (HfZrO) film 241 is formed amorphous, the crystallization of the amorphous hafnium zirconium oxide (HfZrO) film 241 by high temperature annealing, the dielectric properties are improved, and the hafnium zirconium oxide ( Impurities in the HfZrO) film 241 are also removed. The high temperature annealing can be performed in a furnace or in a Rapid Thermal Process (RTP) chamber. In carrying out the high temperature annealing, the temperature in the furnace is approximately 600-800 ° C. when the furnace is used and the temperature in the rapid heat treatment chamber is approximately 500-800 ° C. when the rapid heat treatment chamber is used. In either case, an atmospheric pressure of approximately 700-760 torr or a reduced pressure of approximately 1-100 torr is maintained, and the supply amount of atmospheric gas is set to about 5 sccm to 5 slm, and the running time is set to about 60 seconds.

As described above, after the buffer insulating film 231, the hafnium zirconium oxide (HfZrO) film 241, the barrier metal film 251, and the gate electrode film 261 are sequentially formed on the semiconductor substrate 200, normal patterning is performed. As shown in FIG. 3, a buffer insulating film pattern 230, a hafnium zirconium oxide (HfZrO) film pattern 240, a barrier metal film pattern 250, and a gate electrode film pattern 260 are formed on the semiconductor substrate 200. This sequentially stacked structure is formed. After the patterning is performed, normal heat treatment may be performed.

As described above, according to the semiconductor device having a high dielectric constant gate insulating film and a method of manufacturing the same, it is difficult to control the threshold voltage by using a metal gate electrode film by using a hafnium zirconium oxide (HfZrO) film as the gate insulating film. It is possible to reduce the temperature and to increase resistance to subsequent thermal process and oxidation atmosphere. In particular, the selective oxidation process performed when the metal gate electrode film is employed increases resistance to increase the effective thickness of the gate insulating film and decrease the reliability in the H ₂ rich atmosphere, thereby increasing the process margin and improving the reliability of the device. There is also an advantage to this.

Although the present invention has been described in detail with reference to preferred embodiments, the present invention is not limited to the above embodiments, and various modifications may be made by those skilled in the art within the technical spirit of the present invention. Do.

Claims (18)

A hafnium zirconium oxide (HfZrO) film pattern disposed on the semiconductor substrate as a gate insulating film; And A semiconductor device comprising a gate electrode film pattern on the hafnium zirconium oxide (HfZrO) film pattern. The method of claim 1, And a silicon oxide film or a silicon oxide nitride film disposed between the semiconductor substrate and the hafnium zirconium oxide (HfZrO) film pattern. The method of claim 2, The silicon oxide film or the silicon oxide nitride film has a thickness of less than 15 kHz. The method of claim 1, The hafnium zirconium oxide (HfZrO) film pattern has a thickness of 20-500Å. The method of claim 1, And a barrier metal film pattern disposed between the hafnium zirconium oxide (HfZrO) film pattern and the gate electrode film pattern. The method of claim 5, The barrier metal film pattern comprises a titanium nitride film or a tungsten nitride film. The method of claim 1, The gate electrode film pattern is a semiconductor device, characterized in that made of a polysilicon film, tungsten silicide film, tungsten film or titanium silicide film. Forming a buffer insulating film on the semiconductor substrate; Forming a hafnium zirconium oxide (HfZrO) film on the buffer insulating film; And And forming a gate electrode layer on the hafnium zirconium oxide (HfZrO) film. The method of claim 8, wherein the forming of the buffer insulating film, A method of manufacturing a semiconductor device, characterized in that performed using an rapid heat treatment method in an oxygen atmosphere or a nitrogen dioxide atmosphere and a temperature of 700 to 1100 ° C. The method of claim 8, The hafnium zirconium oxide (HfZrO) film is a method of manufacturing a semiconductor device, characterized in that performed using the atomic layer deposition method. The method of claim 10, The atomic layer deposition method uses C ₁₆ H ₃₆ HfO ₄ as a precursor as hafnium (Hf) source gas, C ₁₆ H ₃₆ ZrO ₄ as a precursor as zirconium (Zr) source gas, and ozone as a reaction gas. Method for manufacturing a semiconductor device, characterized in that performed using plasma oxygen or water vapor. The method of claim 10, Forming a hafnium zirconium oxide (HfZrO) film by using the atomic layer deposition method, the first step of sequentially performing hafnium (Hf) source gas supply, purge gas supply, reaction gas supply and purge gas supply, and zirconium (Zr) performing a second step of sequentially performing source gas supply, purge gas supply, reactant gas supply, and purge gas supply, wherein the ratio of the first step and the second step is at least 9: 1 or less; Method for manufacturing a semiconductor device, characterized in that to be. The method of claim 10, Forming a hafnium zirconium oxide (HfZrO) film using the atomic layer deposition method, hafnium (Hf) source gas supply, purge gas supply, zirconium (Zr) source gas supply, purge gas supply, reaction gas supply and purge gas The method may be performed by repeatedly performing a supplying step, wherein the number of supply of the hafnium (Hf) source gas and the supply of the zirconium (Zr) source gas is at least 9: 1 or less. Method of manufacturing the device. The method of claim 8, And forming a hafnium zirconium oxide (HfZrO) film and then performing plasma annealing in a bias of 100 to 500 W, a low temperature of 200 to 500 ° C., and an N ₂ O atmosphere. The method of claim 8, And forming an hafnium zirconium oxide (HfZrO) film and then performing annealing in an O ₂ / N ₂ atmosphere having a temperature of 500 to 900 ° C. and an N ₂ atmosphere or a ratio of 0.1 or less. Manufacturing method. The method of claim 8, And forming a barrier metal film on the hafnium zirconium oxide (HfZrO) film before forming the gate electrode film. The method of claim 16, And the barrier metal film is formed of a titanium nitride film or a tungsten nitride film. The method of claim 8, And the gate electrode film is formed of a polysilicon film, a tungsten silicide film, a tungsten film or a titanium silicide film.

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