KR20080054066A - Display device - Google Patents

Abstract

A display apparatus is provided to prevent blurring by displaying black according to the level variation of sustain voltages during a predetermined time of a frame. A display apparatus includes a switching element, a liquid crystal capacitor, and a storage capacitor. The switching element delivers data voltages according to gate signals. The liquid crystal capacitor is connected between the switching element and a common voltage. The storage capacitor is connected between the switching element and a sustain voltage. The sustain voltage has at least two voltage levels that is varied during a frame. The frame includes an image display interval and a black display interval. The sustain voltage includes a first voltage(V1) during the image display interval and a second voltage(V2) during the black display interval.

Description

Display device {DISPLAY DEVICE}

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is an equivalent circuit diagram of one pixel in a liquid crystal display according to an exemplary embodiment of the present invention.

3 is a circuit diagram illustrating a change in pixel voltage in a liquid crystal display according to an exemplary embodiment of the present invention.

4 is a signal waveform diagram for describing an operation of a liquid crystal display according to an exemplary embodiment of the present invention.

5 is a signal waveform diagram illustrating a voltage change of a pixel electrode according to an exemplary embodiment of the present invention.

6 is a signal waveform diagram for describing an operation of a liquid crystal display according to an exemplary embodiment of the present invention in frame inversion.

7 is a signal waveform diagram illustrating an operation of a liquid crystal display according to an exemplary embodiment of the present invention in row inversion.

The present invention relates to a display device.

In recent years, with the reduction in weight and thickness of personal computers and televisions, display devices are also required to be lighter and thinner, and cathode ray tubes (CRTs) are being replaced by flat panel displays.

Such flat panel displays include liquid crystal displays (LCDs), field emission displays (FEDs), organic light emitting displays, plasma display panels (PDPs), and the like. There is this. In general, in an active flat panel display, a plurality of pixels arranged in a matrix form is arranged in a matrix form, and an image is displayed by controlling luminance of each pixel according to given image information.

However, since a liquid crystal display is a hold type display device, blurring occurs when an edge of an object is not clear and blurred when displaying a moving image.

An object of the present invention is to provide a liquid crystal display device that can prevent the blurring phenomenon.

In accordance with an aspect of the present invention, a display device includes: a switching device for transmitting a data voltage according to a gate signal; a liquid crystal capacitor connected between the switching device and a common voltage; and the switching device and a sustain voltage. And a holding capacitor connected therebetween, said holding voltage having at least two voltage levels, wherein the voltage level changes during one frame.

One frame may include an image display period and a black display period. The sustain voltage may have a first voltage during the image display period, and the sustain voltage may have a second voltage during the black display period.

The polarity of the second voltage with respect to the first voltage may be determined according to the polarity of the data voltage with respect to the common voltage.

The second voltage may be set such that the voltage change amount of the liquid crystal capacitor according to the level change of the sustain voltage has a difference greater than or equal to the highest gray voltage and the lowest gray voltage.

The sustain voltage may change from the first voltage to the second voltage in sequence along the pixel row.

The image display section and the black display section may be maintained for the same time.

The image display section may be longer than the black display section.

The data voltage may change in polarity with alternating frames.

The data voltage may change in polarity in alternating pixel rows.

The common voltage alternates two different voltage levels every two horizontal periods, and the first and second voltages may change in the same period as the common voltage.

The first voltage may be at the same level as the common voltage.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

A liquid crystal display, which is one example of a display device, will now be described in detail with reference to FIGS. 1 and 2.

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram of one pixel in the liquid crystal display according to an exemplary embodiment of the present invention.

As shown in FIG. 1, a liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal panel assembly 300, a gate driver 400, a data driver 500, and a sustain voltage driver connected thereto. 700, a gray voltage generator 800 connected to the data driver 500, and a signal controller 600 for controlling the gray voltage generator 800.

The liquid crystal panel assembly 300 may include a plurality of signal lines G ₁ -G _n , S ₁ -S _n , and D ₁ -D _m , which are connected to the plurality of signal lines in an equivalent circuit and arranged in a substantially matrix form. pixel) PX. On the other hand, in the structure shown in FIG. 2, the liquid crystal panel assembly 300 includes lower and upper panels 100 and 200 facing each other and a liquid crystal layer 3 interposed therebetween.

The signal lines G ₁ -G _n , S ₁ -S _n , and D ₁ -D _m transmit a plurality of gate lines G ₁ -G _n that transmit a gate signal (also called a “scan signal”), and a sustain voltage. A plurality of sustain voltage lines (S ₁ -S _n ) and a plurality of data lines (D ₁ -D _m ) for transmitting a data voltage. The gate lines G ₁ -G _n and the storage voltage lines S ₁ -S _n extend substantially in the row direction and are substantially parallel to each other, and the data lines D ₁ -D _m extend substantially in the column direction and mutually Almost parallel

Each of the pixels (PX), for instance the i-th (i = 1, 2, ... , n) gate line (G _i) and the sustain voltage line (S _i) and the j-th (j = 1, 2, ... , m) data line pixels (PX) is a signal switching element (Q) and a liquid crystal capacitor (liquid crystal capacitor) connected thereto (Clc) and a storage capacitor (storage capacitor) is connected to the (G _i, D _j) connected to the (D _j) (Cst) It includes.

The switching element Q is a three-terminal element of a thin film transistor or the like provided in the lower panel 100, the control terminal of which is connected to the gate line G _i , and the input terminal of which is connected to the data line D _j . The output terminal is connected to the liquid crystal capacitor Clc and the storage capacitor Cst. The thin film transistor may include polycrystalline silicon or amorphous silicon.

The liquid crystal capacitor Clc has two terminals, the pixel electrode 191 of the lower panel 100 and the common electrode 270 of the upper panel 200, and the liquid crystal layer 3 between the two electrodes 191 and 270 is a dielectric material. Function as. The pixel electrode 191 is connected to the switching element Q, and the common electrode 270 is formed on the front surface of the upper panel 200 and receives the common voltage Vcom. Unlike in FIG. 2, the common electrode 270 may be provided in the lower panel 100. In this case, at least one of the two electrodes 191 and 270 may be formed in a linear or bar shape.

The storage capacitor Cst, which serves as an auxiliary role of the liquid crystal capacitor Clc, is formed by overlapping the storage voltage line S _i and the pixel electrode 191 provided in the lower panel 100 with an insulator interposed therebetween. (S _i) is applied to the holding voltage.

 On the other hand, in order to implement color display, each pixel PX uniquely displays one of the primary colors (spatial division) or each pixel PX alternately displays the primary colors over time (time division). The desired color is recognized by the spatial and temporal sum of these primary colors. Examples of the primary colors include three primary colors such as red, green, and blue. FIG. 2 illustrates that each pixel PX includes a color filter 230 representing one of the primary colors in an area of the upper panel 200 corresponding to the pixel electrode 191 as an example of spatial division. Unlike in FIG. 2, the color filter 230 may be disposed above or below the pixel electrode 191 of the lower panel 100.

At least one polarizer (not shown) for polarizing light is attached to an outer surface of the liquid crystal panel assembly 300.

Referring back to FIG. 1, the gray voltage generator 800 generates two sets of gray voltages related to the transmittance of the pixel PX. One of the two sets has a positive value for the common voltage Vcom and the other set has a negative value. The number of gray voltages included in the set of gray voltages generated by the gray voltage generator 800 may be the same as the number of grays that the liquid crystal display can display.

A gate driver 400, a gate line (G ₁ -G _n) and is connected to the gate turn-on voltage (Von), and a gate signal consisting of a combination of a gate-off voltage (Voff), a gate line (G ₁ of the liquid crystal panel assembly 300 -G _n ).

Data driver 500 is connected with the data lines (D ₁ -D _m) of the liquid crystal panel assembly 300, select a gray voltage from the gray voltage generator 800 and the data lines do this as a data voltage (D ₁ -D _m ).

The sustain voltage driver 700 is connected to the sustain voltage lines S ₁ -S _n of the liquid crystal panel assembly 300 to form the sustain voltage Vst ₁ -Vst formed by a combination of the first voltage V1 and the second voltage V2. _n ) is applied to the sustain voltage lines S ₁ -S _n .

The signal controller 600 controls the gate driver 400, the data driver 500, the sustain voltage driver 700, and the like.

Each of the driving devices 400, 500, 600, 700, and 800 includes a signal line G ₁ -G _n , S ₁ -S _n , D ₁ -D _m , and a thin film transistor (Q) switching element (Q). It may be integrated in the liquid crystal panel assembly 300. Alternatively, these driving devices 400, 500, 600, 800 may be mounted directly on the liquid crystal panel assembly 300 in the form of at least one integrated circuit chip, or may be a flexible printed circuit film (not shown). It may be mounted on the liquid crystal panel assembly 300 in the form of a tape carrier package (TCP), or may be mounted on a separate printed circuit board (not shown). In addition, the driving devices 400, 500, 600, 700, and 800 may be integrated into a single chip, in which case at least one of them or at least one circuit element constituting them may be outside the single chip.

Next, the operation of the liquid crystal display will be described in detail.

The signal controller 600 receives input image signals R, G, and B and an input control signal for controlling the display thereof from an external graphic controller (not shown). The input image signals R, G, and B contain luminance information of each pixel PX, and the luminance is a predetermined number, for example, 1024 (= 2 ¹⁰ ), 256 (= 2 ⁸ ), or 64 (= 2 ⁶ ) It has gray. Examples of the input control signal include a vertical sync signal Vsync, a horizontal sync signal Hsync, a main clock MCLK, and a data enable signal DE.

The signal controller 600 properly processes the input image signals R, G, and B according to operating conditions of the liquid crystal panel assembly 300 based on the input image signals R, G, and B and the input control signal. After generating the control signal CONT1, the data control signal CONT2, the sustain control signal CONT3, and the like, the gate control signal CONT1 is sent to the gate driver 400, and the image control signal CONT2 and the processed image signal are processed. (DAT) is sent to the data driver 500, and the sustain control signal CONT3 is sent to the sustain voltage driver 700.

The gate control signal CONT1 includes a scan start signal STV indicating a scan start and at least one clock signal controlling an output period of the gate-on voltage Von. The gate control signal CONT1 may also further include an output enable signal OE that defines the duration of the gate-on voltage Von.

The data control signal CONT2 applies an analog data voltage to the horizontal synchronizing start signal STH and the data lines D ₁ -D _m indicating the start of transmission of the digital image signal DAT for one row of pixels PX. Includes a load signal LOAD and a data clock signal HCLK. The data control signal CONT2 is also an inverted signal that inverts the voltage polarity of the analog data voltage relative to the common voltage Vcom (hereinafter referred to as " polarity of the data voltage " RVS) may be further included.

According to the data control signal CONT2 from the signal controller 600, the data driver 500 receives the digital image signal DAT for the pixel PX in one row and corresponds to each digital image signal DAT. By selecting the gray scale voltage, the digital image signal DAT is converted into an analog data voltage and then applied to the corresponding data lines D ₁ -D _m .

The gate driver 400 applies the gate-on voltage Von to the gate lines G ₁ -G _n in response to the gate control signal CONT1 from the signal controller 600, thereby applying the gate lines G ₁ -G _n . Turn on the switching element (Q) connected to. Then, the data voltage applied to the data lines D ₁ -D _m is applied to the pixel PX through the turned-on switching element Q.

The difference between the voltage of the data voltage applied to the pixel PX and the common voltage Vcom is shown as the charging voltage of the liquid crystal capacitor C _LC , that is, the pixel voltage. The arrangement of the liquid crystal molecules varies depending on the magnitude of the pixel voltage, thereby changing the polarization of light passing through the liquid crystal layer 3. The change in polarization is represented by a change in the transmittance of light by a polarizer attached to the display panel assembly 300, whereby the pixel PX displays the luminance represented by the gray level of the image signal DAT.

And the one horizontal period (period) writes, also known as "1H", the same as one period of the horizontal synchronization signal (Hsync) and the data enable signal (DE)] as a unit by repeating this procedure, all gate lines (G ₁ The image of one frame is displayed by sequentially applying a gate-on voltage Von to -G _n and a data voltage to all the pixels PX.

When one frame ends, the state of the inversion signal RVS applied to the data driver 500 is controlled so that the next frame starts and the polarity of the data voltage applied to each pixel PX is opposite to the polarity of the previous frame. "Invert frame"). In this case, the polarities of the data voltages flowing through one data line may be changed (eg, row inversion and point inversion), or polarities of data voltages applied to one pixel row may be different depending on the characteristics of the inversion signal RVS within one frame. (E.g. column inversion, point inversion).

Hereinafter, a liquid crystal display device capable of preventing blurring will be described with reference to FIGS. 3 to 5.

3 is a circuit diagram illustrating a change in pixel voltage in a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 4 is a signal waveform diagram illustrating an operation of a liquid crystal display according to an exemplary embodiment of the present invention. 5 is a signal waveform diagram illustrating a voltage change of a pixel electrode according to an exemplary embodiment of the present invention.

Referring to FIG. 3, each pixel PX of the liquid crystal display is formed between two capacitors Clc and Cst having the pixel electrode 191 of FIG. 2 as one electrode and a gate-source of the switching element Q. Parasitic capacitors (Cgs).

When the gate signal transitions from the gate-on voltage Von to the gate-off voltage Voff and the switching element Q is turned off, the node n1, that is, the voltage of the pixel electrode 191 maintains the data voltage. Therefore, the parasitic capacitor Cgs between the gate and the source charges a charge corresponding to the difference between the gate-off voltage Voff and the data voltage, and the liquid crystal capacitor Clc corresponds to the difference between the common voltage Vcom and the data voltage. The charge capacitor is charged, and the sustain capacitor Cst charges a charge corresponding to the difference between the sustain voltage Vst and the data voltage.

At this time, the voltage of the node n1 is leveled by the coupling of the capacitors Cgs, Clc, Cst as the voltages Voff, Vcom, Vst of the other electrodes of the three capacitors Cgs, Clc, Cst change. This data voltage changes from one voltage to another.

Referring to FIG. 4, the signal controller 600 controls the sustain voltage driver 700 by outputting a sustain voltage control signal CONT3 for impulsive driving to the sustain voltage driver 700.

Maintaining the voltage driver 700 is a frame (1FT) first holding voltage of the first voltage (V1) for the time (T1) (Vst -Vst _{1 n),} the output, and maintains voltage (Vst ₁ -Vst _n) of The voltage level is changed from the first voltage V1 to the second voltage V2 and maintained for the second time T2.

That is, the sustain voltage driver 700 are each in turn transitions into each holding voltage line hold voltage (Vst -Vst _{n 1)} of the first voltage (V1), a second voltage (V2) from the (S ₁ -S _n), a second It maintains for the time T2, and in turn, it transits from the 2nd voltage V2 to the 1st voltage V1, and maintains it for the 1st time T1.

Referring to FIG. 5, when the voltage applied to one pixel PX is applied, when the gate-on voltage Von is supplied and the switching element Q is turned on, the data voltage is applied to the pixel electrode 191, that is, the node n1. (Vdat) is passed.

As shown in FIG. 5, when the data voltage Vdat has a positive polarity with respect to the common voltage Vcom, the liquid crystal capacitor Clc may convert the difference voltage between the data voltage Vdat and the common voltage Vcom into the pixel voltage Vpx. As a result, the light is transmitted to display an image.

Meanwhile, the storage capacitor Cst charges the difference voltage between the data voltage Vdat and the first voltage V1, where the first voltage V1 may be a voltage having the same magnitude as the common voltage Vcom.

As described above, when the first time T1 passes after the gate-on voltage Von is supplied, the sustain voltage Vst _i transitions to the second voltage V2.

In this case, the second voltage V2 may have a positive or negative polarity with respect to the first voltage V1, and the polarity of the second voltage V2 corresponds to the polarity of the data voltage Vdat.

Therefore, as shown in FIG. 5, when the data voltage Vdat has a positive polarity, the second voltage V2 has a higher level than the first voltage V1.

When the level of the sustain voltage Vst _i changes, the node voltage Vn1 changes according to the following equation.

[Equation 1]

Vb = Va + Cst ㅧ ?? V1 / (Cst + Cgs + Clc)

At this time, Va is the node voltage Vn1 at the first time T1, Vb is the node voltage Vn1 at the second time T2, ?? V1 is the second voltage V2 and the first voltage V1. ), Respectively.

At this time, the change amount ?? V2 of the node voltage Vn1, that is, (Vb-Va) has a magnitude as shown below.

[Equation 2]

?? V2 ?? │Vmax-Vmin│

At this time, Vmax is the data voltage level for the maximum gradation, and Vmin is the data voltage level for the minimum gradation.

As such, when the node voltage Vn1 is changed by adjusting the magnitude of the second voltage V2, the pixel PX displays black for the second time T2, thereby enabling impulsive driving. Therefore, blurring between the current frame and the next frame can be prevented.

In this case, the first time T1 may be longer than the second time T2 and may be the same as the second time T2. In this way, the impulsive effect can be adjusted by adjusting the holding time of the first time T1 and the second time T2.

The sustain voltage driver 700 transitions the sustain voltage Vst _i back to the first voltage V1 before the next frame starts after the second time T2 passes.

As described above, black is displayed for a predetermined time of one frame by changing the sustain voltage Vst _i , so that impulsive driving can be performed while maintaining driving frequencies of the gate driver 400 and the data driver 500.

Hereinafter, a specific embodiment to which the present invention is applied will be described with reference to FIGS. 6 and 7.

FIG. 6 is a signal waveform diagram illustrating an operation of a liquid crystal display according to an exemplary embodiment of the present invention in frame inversion. FIG. 7 illustrates an operation of the liquid crystal display according to an exemplary embodiment of the present invention in row inversion. It is a signal waveform diagram for illustration.

Referring to FIG. 6, the polarity of the data voltage Vdat is alternately changed between frames, and thus the polarity of the second voltage V2 is also changed. Therefore, the second voltage V2 also has the positive polarity during the second time T2 of the frame in which the data voltage Vdat has the positive polarity, so that the node voltage Vn1 is the first time T1 during the second time T2. It is further raised to display black for the second time T2. Meanwhile, in the next frame, since the data voltage Vdat has a negative polarity, the second voltage V2 also has a negative polarity during the second time T2, and thus the node voltage Vn1 falls further than the first time T1. So it also displays black.

The amount of change in node voltage Vn1 in each frame follows [Equation 2].

In addition, in the case of row inversion as shown in FIG. 7, while the data voltage Vdat of the positive polarity is applied to the pixel PX of the previous row, the data voltage Vdat of the negative polarity is applied to the pixel PX of the next row. Is approved. Accordingly, the second voltage V2 of positive polarity is applied to the pixels PX of the previous row, and the second voltage V2 of negative polarity is applied to the pixels PX of the next row.

That is, in the case of row inversion, the sustain voltage driver 700 alternately supplies the pixels of the second voltage V2 by alternating the pixel rows.

In addition, when the common voltage Vcom of an alternating current having a period of 2 horizontal periods 2H is supplied at the time of row inversion, the sustain voltage Vst _i is also an alternating current having a period of 2 horizontal periods 2H, and a second voltage V2. ) May display black for a predetermined time by adding the voltage equal to Equation 2 from the first voltage V1.

As described above, according to the present invention, the blurring phenomenon can be prevented by changing the level of the sustain voltage for a predetermined period of one frame to display black.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

Claims (11)

A switching element transferring a data voltage according to a gate signal, A liquid crystal capacitor connected between the switching element and a common voltage, and A holding capacitor connected between the switching element and the holding voltage Including; The holding voltage has at least two voltage levels, and the voltage level changes during one frame. Display device. In claim 1, One frame includes a video display section and a black display section. The sustain voltage has a first voltage during the image display period. The sustain voltage has a second voltage during the black display period. Display device. In claim 2, The polarity of the second voltage with respect to the first voltage is determined according to the polarity of the data voltage with respect to the common voltage. In claim 3, And the second voltage is set such that a voltage change amount of the liquid crystal capacitor according to a change in the level of the sustain voltage is equal to or greater than a difference between the highest gray voltage and the lowest gray voltage. In claim 4, And the sustain voltage is sequentially changed from the first voltage to the second voltage along the pixel row. In claim 5, And the image display section and the black display section are maintained for the same time. In claim 5, The image display section is longer than the black display section. In claim 6 or 7, The data voltage may change in polarity in alternating frames. In claim 6 or 7, The data voltage may change in polarity with alternating pixel rows. In claim 9, The common voltage alternates two different voltage levels every two horizontal periods. The first and second voltages change in the same period as the common voltage. In claim 10, And the first voltage is at the same level as the common voltage.

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