KR20070119447A - Manufacturing method of liquid crystal display device - Google Patents

Abstract

The present invention relates to a method for manufacturing a thin film transistor of a liquid crystal display device. The disclosed method forms a gate electrode on an insulating substrate. An active layer and a source / drain electrode, which are sequentially stacked, are sequentially formed on the substrate having the gate electrode, and a mask for exposing the passivation layer and the drain electrode is sequentially formed on the substrate having the source / drain electrode. . The protective layer exposed by the mask is etched to form a contact hole exposing the drain electrode. A transparent conductive film is formed on the drain electrode and the mask exposed by the contact hole. The mask and the transparent conductive film on the mask are removed to form the pixel electrode connected to the drain electrode by filling the contact hole. As described above, the present invention can manufacture a liquid crystal display device through a four mask process to which the lift-off method is applied. Thus, the process is simplified compared to the existing five mask process, thereby increasing the production efficiency.

Description

Manufacturing method of liquid crystal display device {METHOD FOR FABRICATING LIQUID CRYSTAL DISPLAY DEVICE}

1 is a plan view of a liquid crystal display device according to the prior art.

FIG. 2A to FIG. 2F are cross-sectional views illustrating processes of cutting lines taken along line II ′, II-II ′, and III-III ′ of FIG. 1.

3 is a plan view of a liquid crystal display device according to the present invention;

4A to 4F are cross-sectional views illustrating processes of cutting lines IV-IV`, V-V`, and VI-VI` of FIG. 3.

The present invention relates to a method for manufacturing a liquid crystal display device, and more particularly, to a method for manufacturing a liquid crystal display device that can simplify the manufacturing process by reducing the number of masks.

As is generally known, a liquid crystal display device includes a thin film transistor array substrate (hereinafter referred to as an insulated substrate) on which thin film transistors are arranged as switching elements, and a color filter substrate for displaying an image in color. The liquid crystal layer is filled in the space formed between the filter substrate and the thin film transistor array substrate. Among them, the thin film transistor array substrate manufacturing process is an important device for determining the performance of a liquid crystal display device and involves many processes. Hereinafter, a process of manufacturing a thin film transistor array substrate will be described.

1 is a plan view of a liquid crystal display device according to the prior art, in which the cut line I-I 'represents the channel region and the storage region, the cut line II-II' the data pad portion, and cut line III-III '. Denotes the gate pad portions, respectively. 2A to 2F are cross-sectional views of the process of FIG. 1 showing the cut planes of I-I ', II-II', and III-III ', and show that a conventional liquid crystal display device is manufactured using five masks.

As shown in FIG. 1 and FIG. 2A, an insulating substrate 1 having a gate pad portion, a data pad portion, a storage region, and a channel region is provided. The insulating substrate 1 may be a transparent substrate such as glass. A gate wiring material film 3 is formed on the insulating substrate 1. The gate film material layer 3 may use a metal film. A predetermined first mask 31 is formed on the material layer 3 for gate wiring. The first mask 31 may be a photoresist pattern.

As shown in FIGS. 1 and 2B, the first metal layer is patterned using the first mask to form a gate wiring 3P1 and a storage electrode 3P2, respectively. The gate line 3P1 extends in one direction on the substrate, and includes a gate pad 3P1a at one end and a gate electrode 3P1b at the channel region. Next, the first mask is removed. Next, a gate insulating film 5, a silicon layer 7, and an etch stopper 9 are sequentially formed on the substrate from which the first mask is removed. A predetermined second mask 33 is formed on the substrate having the etch stop layer 9.

As shown in FIGS. 1 and 2C, the etch stop layer is patterned using the second mask to form an etch stop layer pattern 9P on the channel region. The second mask is removed. The second metal layer 11 is formed on the substrate having the etch stop layer pattern 9P. The second metal film 11 may use a metal having a different etching selectivity from the first metal film. A predetermined third mask 35 is formed on the substrate having the second metal film 11.

As shown in FIGS. 1 and 2D, the second metal layer and the silicon layer are patterned using the third mask to form an active layer 7P and a data line 11P that are sequentially stacked. The data line 11P crosses the gate line 3P1 perpendicularly to define the pixel region A, the data pad portion 11Pa in the data pad portion, and the source / drain electrode 11Pb in the channel region ( 11Pc). The third mask is removed. The passivation layer 13 is formed on the substrate from which the third mask is removed. A predetermined fourth mask 37 is formed on the substrate including the passivation layer 13.

As shown in FIGS. 1 and 2E, the passivation layer is patterned using the fourth mask to form a contact hole 13H exposing the drain electrode 11Pc of the channel region. While the protective layer is etched to form the contact hole 13H exposing the drain electrode 11Pc in the channel region, the gate pad portion is etched not only the protective layer but also the gate insulating layer to expose the gate pad 3P1. A hole may be formed, and the data pad 11Pa may be excessively etched in the data pad part to form a contact hole exposing a gate insulating layer under the data pad 11Pa. Next, the fourth mask is removed. Next, a transparent conductive film 15 is formed on the substrate from which the fourth mask is removed. A predetermined fifth mask 39 is formed on the substrate including the transparent conductive film 15. The fifth mask 39 is for forming a pixel electrode in a subsequent process.

As shown in FIGS. 1 and 2F, the transparent conductive layer is patterned using the fifth mask to form the pixel electrode 15P contacting the drain electrode 11Pc through the contact hole 13H. In this case, the pixel electrode 15P may cover contact holes in the gate pad part and the data pad part. Subsequently, the fifth mask is removed.

However, to manufacture such a conventional liquid crystal display device, a first mask for forming a gate electrode, a second mask for forming an etch stop layer pattern, a third mask for forming an active layer and a source / drain electrode, and a contact A total of five masks are required, including a fourth mask for forming holes and a fifth mask for forming pixel electrodes. Therefore, in order to manufacture the above-described conventional liquid crystal display device, a number of processes are required, and as the number of processes increases, there is a problem in that process costs such as material costs increase.

Therefore, there is a need for a new liquid crystal display device manufacturing process that can simplify the process by reducing the number of masks.

An object of the present invention is to provide a method for manufacturing a liquid crystal display device that can simplify the process by reducing the number of masks from the existing 5 mask to 4 mask.

In order to achieve the above object, the present invention provides a method for manufacturing a thin film transistor of a liquid crystal display device. The method forms a gate electrode on an insulating substrate. An active layer and a source / drain electrode that are sequentially stacked are formed on the substrate having the gate electrode through a gate insulating film. A mask for exposing the protective film and the drain electrode is sequentially formed on the substrate having the source / drain electrodes. The protective layer exposed by the mask is etched to form a contact hole exposing the drain electrode. A transparent conductive film is formed on the drain electrode and the mask exposed by the contact hole. The mask and the transparent conductive film on the mask are removed to form the pixel electrode connected to the drain electrode by filling the contact hole.

Forming the active layer and the source / drain electrodes includes sequentially forming a silicon layer and a metal film on the substrate having the gate electrode, and patterning the metal film and the silicon layer.

The silicon layer is formed by sequentially stacking an amorphous silicon layer and an amorphous silicon layer doped with a high concentration of impurities.

After the silicon layer is formed on the substrate, an etch stop layer is formed on the substrate having the silicon layer, and the etch stop layer is etched to form an etch stop layer pattern on the silicon layer corresponding to the gate electrode. Include.

It is preferable that the mask uses a photoresist pattern.

The transparent conductive film is preferably formed of any one of indium tin oxide and indium zinc oxide.

It is preferable to use the lift-off method to remove the mask and the transparent conductive film on the mask.

The present invention provides a method of manufacturing a liquid crystal display device. The method provides an insulating substrate in which a channel region, a storage region, a data pad portion and a gate pad portion are defined. Gate wirings are formed in the channel region and the gate pad portion of the insulating substrate, and storage electrodes are formed in the storage region. The gate wirings include a gate electrode in the channel region and a gate pad in the gate pad portion. do. An active layer and a data line are sequentially formed on the substrate having the storage electrode through a gate insulating layer, and the data lines are arranged in a direction perpendicular to the gate line, and source / drain electrodes are formed in the channel region. The data pad unit is provided with data pads, respectively. A protective film and a mask are sequentially formed on the substrate having the data wiring, wherein the mask covers at least the space between the gate wiring and the data wiring on the channel region and is patterned to expose the drain electrode. The protective layer is patterned using the mask to form a contact hole exposing the drain electrode. A transparent conductive film is formed on the drain electrode and the mask exposed by the contact hole. The mask and the transparent conductive film on the mask are removed to form a pixel electrode connected to the drain electrode by filling a contact hole.

(Example)

Hereinafter, a method of manufacturing a liquid crystal display device according to the present invention will be described with reference to the accompanying drawings.

3 is a plan view of a liquid crystal display according to an exemplary embodiment of the present invention, in which line IV-IV ′ is a channel region and storage region, line V-V ′ is a data pad portion, and line VI-VI ′ is a cut line. The gate pads are shown respectively. 4A through 4F are cross-sectional views illustrating processes of cutting lines IV-IV`, V-V`, and VI-VI` of FIG. 3, and manufacturing a liquid crystal display device according to the present invention using four masks. It is seen.

As shown in FIGS. 3 and 4A, an insulating substrate 51 having a gate pad portion, a data pad portion, a storage region, and a channel region is provided. The insulating substrate 51 may be a transparent substrate such as glass. The first metal film 53 is formed on the insulating substrate 51. The first metal layer 53 may be one or more selected from a group of conductive metals including aluminum (Al), aluminum alloy (AlNd), tungsten (W), chromium (Cr), and the like. The first metal film 53 may be formed by a sputtering method. A predetermined first mask 81 is formed on the first metal film 53. The first mask 81 may be a photoresist pattern. The first mask 81 is for forming a gate wiring and a storage electrode in a later process.

As shown in FIGS. 3 and 4B, the first metal layer is patterned using the first mask to form a gate wiring 53P1 in a channel region and a gate pad portion, and a storage electrode 53P2 in a storage region, respectively. Form. The gate wiring 53P1 extends in one direction on the substrate 51, and includes a gate pad 53P1a at one end and a gate electrode 53P1b at the channel region. Next, the first mask is removed. Next, the gate insulating layer 55, the silicon layer 57, and the etch stop layer 59 are sequentially formed on the substrate from which the first mask is removed. The gate insulating layer 55 may use a silicon oxide film or a silicon nitride film. The silicon layer 57 may be formed by sequentially stacking an amorphous silicon layer and an amorphous silicon layer doped with a high concentration of impurities. A predetermined second mask 83 is formed on the substrate having the etch stop layer 59. The second mask 83 may be a photoresist pattern. The second mask 83 is for patterning the etch stop layer in a subsequent process.

As shown in FIGS. 3 and 4C, the etch stop layer is patterned using the second mask to form an etch stop layer pattern 59P in the channel region. In detail, the etch stop layer pattern 59P is formed on the silicon layer corresponding to the gate electrode. Thereafter, the second mask is removed. The second metal layer 61 is formed on the substrate having the etch stop layer pattern 59P. The second metal layer 61 may be formed of a material having a different etching selectivity from the first metal layer. The second metal layer 61 may be one or more selected from a group of conductive metals including molybdenum (Mo), molybdenum alloy, and the like. The second metal layer 61 may be formed by vapor deposition or sputtering. A predetermined third mask 85 is formed on the substrate having the second metal film 61. The third mask 35 may be a halftone mask or a graytone mask. The third mask 85 is for forming data lines through the following process.

3 and 4D, the second metal layer and the silicon layer are patterned using the third mask to form an active layer 57P and a data line 61P1 that are sequentially stacked. The data line 61P1 crosses the gate line 53P1 perpendicularly to define the pixel area B, source / drain electrodes 61P1b and 61Pc in the channel area, and a data pad part in the data pad part. 61Pa). Next, the third mask is removed. The passivation layer 63 is formed on the substrate from which the third mask is removed. The passivation layer 63 may be formed of a single inorganic insulating material film or a laminated film thereof, or a single film or a laminated film of any one of an organic insulating material film including benzocyclobutene (BCB) and an acrylic resin. have. A predetermined fourth mask 87 is formed on the substrate including the passivation layer 63. The fourth mask 87 may be a photoresist pattern. The fourth mask 87 covers at least a space between the gate line 53P1 and the data line 61P of the channel region, and is patterned to expose the drain electrode 61Pc.

As shown in FIGS. 3 and 4E, the passivation layer 63 is patterned using the fourth mask to form a first contact hole 63H1 exposing the drain electrode 61Pc of the channel region. While the protective layer is etched to form the contact hole 63H exposing the drain electrode 61Pc in the channel region, the gate pad portion is etched not only to the protective layer but also to the gate insulating layer to expose the gate pad 53P1. A hole may be formed, and the data pad 61Pa may be excessively etched in the data pad part to form a contact hole exposing a gate insulating layer under the data pad 61Pa. In this case, since the gate pad 53P1 is formed of a metal such as aluminum (Al), aluminum alloy (AlNd), tungsten (W), or chromium (Cr), data that is a conductive metal component such as molybdenum (Mo) or molybdenum alloy is used. In the process of over-etching the pad 61Pa, it is not affected at all. Subsequently, a transparent conductive film 65 is formed on the substrate having the fourth mask. The transparent conductive film 65 may be one of indium tin oxide or indium zinc oxide.

3 and 4F, the transparent conductive film on the fourth mask and the fourth mask is removed by a lift-off method to form a pixel electrode 65P connected to the drain electrode 61Pc. In this case, the pixel electrode 65P may cover each contact hole in the gate pad part and the data pad part. Subsequently, the fourth mask is removed.

According to the present invention, a liquid crystal display device may be manufactured through a four mask process using a lift off method. Thus, the process is simplified compared to the existing five mask process, thereby increasing the production efficiency. Meanwhile, when the four mask process of the present invention is applied, a photo process, a strip process, a cleaning process, and the like for mask formation can be omitted. As a result, the manufacturing cost is reduced.

Claims (14)

Forming a gate electrode on the insulating substrate, Forming an active layer and a source / drain electrode sequentially stacked on the substrate having the gate electrode through a gate insulating film; A mask for sequentially exposing a protective film and the drain electrode is formed on a substrate having the source / drain electrodes; Forming a contact hole exposing the drain electrode by etching the passivation layer exposed by the mask; Forming a transparent conductive film on the drain electrode and the mask exposed by the contact hole, And removing the mask and the transparent conductive film on the mask to fill the contact hole to form a pixel electrode connected to the drain electrode. The method of claim 1, wherein the forming of the active layer and the source / drain electrodes is performed. A silicon layer and a metal film are sequentially formed on the substrate having the gate electrode, The metal film and the silicon layer is patterned, the thin film transistor manufacturing method of the liquid crystal display device. The method of claim 2, wherein the silicon layer is formed by sequentially stacking an amorphous silicon layer and an amorphous silicon layer doped with a high concentration of impurities. The method of claim 2, wherein after forming a silicon layer on the substrate, Forming an etch stop layer on the substrate having the silicon layer, And etching the etch stop layer to form an etch stop layer pattern on the silicon layer corresponding to the gate electrode. The method of claim 1, wherein the mask uses a photoresist pattern. The method of claim 1, wherein the transparent conductive film is formed of at least one of indium tin oxide and indium zinc oxide. The method of manufacturing a thin film transistor of a liquid crystal display device according to claim 1, wherein the mask and the transparent conductive film on the mask are removed using a lift-off method. Providing an insulating substrate having a channel region, a storage region, a data pad portion and a gate pad portion defined therein; Gate wirings are formed in the channel region and the gate pad portion of the insulating substrate, and storage electrodes are formed in the storage region. The gate wirings include a gate electrode in the channel region and a gate pad in the gate pad portion. Become, An active layer and a data line are sequentially formed on the substrate having the storage electrode through a gate insulating layer, and the data lines are arranged in a direction perpendicular to the gate line, and source / drain electrodes are formed in the channel region. The data pad unit includes a data pad, A protective film and a mask are sequentially formed on a substrate having the data wiring, wherein the mask covers at least a space between the gate wiring and the data wiring on the channel region, and is patterned to expose the drain electrode, Patterning the passivation layer using the mask to form a contact hole exposing the drain electrode, Forming a transparent conductive film on the drain electrode and the mask exposed by the contact hole, And removing the mask and the transparent conductive film on the mask to fill contact holes to form a pixel electrode connected to the drain electrode. 9. The method of claim 8, wherein forming the active layer and the data wiring A silicon layer and a metal film are sequentially formed on the substrate having the gate electrode, And patterning the metal film and the silicon layer. 10. The method of claim 9, wherein the silicon layer is formed by sequentially stacking an amorphous silicon layer and an amorphous silicon layer doped with a high concentration of impurities. The method of claim 9, after forming a silicon layer on the substrate, Forming an etch stop layer on the substrate having the silicon layer, And etching the etch stop layer to form an etch stop layer pattern on the silicon layer corresponding to the gate electrode. The method of claim 8, wherein the mask uses a photoresist pattern. The method of claim 8, wherein the transparent conductive film is formed of at least one of indium tin oxide and indium zinc oxide. The method of manufacturing a liquid crystal display device according to claim 8, wherein the mask and the transparent conductive film on the mask are removed using a lift-off method.

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