KR20070075163A - Mold for Forming Fine Pattern and Manufacturing Method of Thin Film Transistor Display Panel Using the Same - Google Patents

Abstract

A mold for forming a fine pattern and a method of manufacturing a thin film transistor array panel using the same are provided. The mold for forming a fine pattern includes a transparent substrate, a light blocking pattern on the transparent substrate, and a concave-convex pattern having convex portions or recesses on the transparent substrate and the light blocking pattern and not overlapping the light blocking pattern.

Description

Mold for formation of fine pattern and method for manufacturing thin film transistor display panel using same {mold for formation of fine pattern and method for fabricating thin film transistor plate using the same}

1 is a cross-sectional view of a mold for forming a fine pattern according to an embodiment of the present invention.

2 to 6 are cross-sectional views of intermediate structures in a manufacturing process of a thin film transistor array panel according to an exemplary embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

100: mold 110 for forming a fine pattern: transparent substrate

120: light blocking pattern 130: uneven pattern

131: convex portion 132, 133: concave portion

The present invention relates to a mold and a method of manufacturing a liquid crystal display using the same, and more particularly, to a mold for forming a fine pattern and a method of manufacturing a thin film transistor array panel using the same.

BACKGROUND ART In the manufacturing process of a semiconductor device or a liquid crystal display (LCD), a photolithography method has been widely used as a pattern transfer technique for forming a fine structure. .

When manufacturing a thin film transistor array panel by using a four-sheet mask process using the photolithography method, a photoresist pattern including a multilayer structure, for example, a two-layer structure, is formed by diffraction exposure using a mask having a transflective region. To form. Since the semi-transmissive area of the mask must be adjusted for the exposure amount, for example, by adjusting the slit width or by combining a material film having various light transmittances, it must undergo a lot of trial and error in determining this. In addition, the difference in the exposure amount due to diffraction in the semi-transmissive region of the mask according to the exposure intensity of the exposure apparatus is severe, which makes it difficult to form a desired pattern.

The technical problem to be achieved by the present invention is to provide a mold suitable for forming a fine pattern.

Another object of the present invention is to provide a method of manufacturing a thin film transistor array panel which can increase process efficiency by using a mold for forming a fine pattern.

The technical problems of the present invention are not limited to the above-mentioned technical problems, and other technical problems not mentioned will be clearly understood by those skilled in the art from the following description.

According to an aspect of the present invention, a mold for forming a fine pattern includes a transparent substrate, a light blocking pattern on the transparent substrate, and a light blocking pattern on the transparent substrate and the light blocking pattern. The uneven pattern provided with the convex part or the recessed part in the area | region which does not overlap is included.

According to another aspect of the present invention, there is provided a method of manufacturing a thin film transistor array panel, including sequentially forming an insulating layer, a semiconductor layer, a conductive layer, and a photoresist layer on an insulating substrate on which a gate line is formed; A mold for forming a fine pattern including a transparent substrate, a light blocking pattern on the transparent substrate, and a concave-convex pattern having a convex portion or a concave portion in a region which is disposed on the transparent substrate and the light blocking pattern and does not overlap the light blocking pattern. Pressurizing the photoresist layer to form a photoresist pattern including a two-layer structure of a high layer and a low layer, and collectively etching the semiconductor layer and the conductive layer using the photoresist pattern as an etching mask to form a data line. Forming and removing the bottom layer of the photoresist pattern and etching it Croissant and a step of exposing the channel region of the semiconductor layer by etching the conductive layer.

Specific details of other embodiments are included in the detailed description and the drawings.

Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but may be implemented in various forms, and only the embodiments are to make the disclosure of the present invention complete, and the general knowledge in the technical field to which the present invention belongs. It is provided to fully convey the scope of the invention to those skilled in the art, and the invention is defined only by the scope of the claims. In the drawings, the sizes and relative sizes of layers and regions may be exaggerated for clarity.

References to elements or layers "on" other elements or layers include all instances where another layer or other element is directly over or in the middle of another element. On the other hand, when a device is referred to as "directly on", it means that no device or layer is intervened in the middle. Like reference numerals refer to like elements throughout. “And / or” includes each and all combinations of one or more of the items mentioned.

The spatially relative terms " below ", " beneath ", " lower ", " above ", " upper " It may be used to easily describe the correlation of a device or components with other devices or components. Spatially relative terms are to be understood as including terms in different directions of the device in use or operation in addition to the directions shown in the figures. For example, when flipping a device shown in the figure, a device described as "below" or "beneath" of another device may be placed "above" of another device. Thus, the exemplary term "below" may include both an orientation of above and below. The device can also be oriented in other directions, so that spatially relative terms can be interpreted according to orientation.

Unless the steps constituting the manufacturing method described herein are sequential or continuous or unless otherwise stated, one step and another step constituting one manufacturing method are limited to the order described in the specification. Not interpreted. Therefore, the order of construction steps of the manufacturing method can be changed within a range that can be easily understood by those skilled in the art, in which case the obvious changes to those skilled in the art will be included within the scope of the present invention.

Hereinafter, a mold for forming a fine pattern according to an embodiment of the present invention will be described with reference to FIG. 1. 1 is a cross-sectional view of a mold for forming a fine pattern according to an embodiment of the present invention.

As shown in FIG. 1, the mold 100 for forming a micro pattern according to an embodiment of the present invention includes a transparent substrate 110, a light blocking pattern 120, and an uneven pattern 130.

First, the transparent substrate 110 may be formed of any known light transmissive material including an inorganic material, an organic material, and an inorganic or organic material that is substantially transparent to light, for example, as a plate or film support. Examples of the transparent inorganic material include glass, quartz or silicon oxide (SiO ₂ ), and the like. Further examples of transparent organic materials include transparent plastics such as polydimethylsiloxane, acrylic resins, polyesters, polycarbonates, polyethylenes, polyethersulfones, olefin maleimide copolymers, norbornene-based resins, and crosslinkable polymer materials thereof. It is not limited.

A predetermined light blocking pattern 120 is positioned on the transparent substrate 110. The light blocking pattern 120 is located in a region to block light in the mold 10 for fine pattern formation, and the material of the light blocking pattern 120 is not particularly limited as long as it is an opaque material capable of blocking light. The light blocking pattern 120 may be formed of a metal and / or a metal oxide, for example, chromium (Cr) and / or chromium oxide (CrO), or may be formed of a black photoresist. In the present specification, a method of forming the light blocking pattern 120 will be described with reference to a case made of a black photoresist, but is not limited thereto.

In order to form the light blocking pattern 120, a black photoresist layer made of black photoresist is formed on the transparent first substrate 110 by, for example, applying a slit coating process or a spin coating process. do. The black photoresist layer may be a positive photoresist in which the exposed portion is removed by development or a negative photoresist in which the exposed portion remains. The black photoresist layer may be selectively exposed and developed to form a desired light blocking pattern 120.

The uneven pattern 130 is positioned on the light blocking pattern 120. The uneven pattern 130 may include various patterns according to the pattern to be transferred to the transfer film. The uneven pattern 130 may include, for example, predetermined convex portions 131 and / or concave portions 132 and 133. On the contrary, the concave portion 130 is provided with the convex portion 131 corresponding to the position to form the concave portion on the transfer film, and the concave portion corresponding to the position where the convex portion is to be formed on the transfer film. 132 and 133 may be provided.

In order to form the uneven pattern 130, an elastic material, for example, poly-dimethylsiloxane, silicon rubber, or poly, is formed on the entire surface of the substrate 110 including the light blocking pattern 120. It forms a urethane (polyurethane) or polyimide (polyimide) and the like. On the elastic material layer, a circular shape (master, not shown) having a shape opposite to the uneven pattern to be formed, that is, corresponding to the position where the convex portion is to be formed in the elastic material layer, is provided with a recess, and the recess is formed in the elastic material layer. After positioning the circle having the convex portion corresponding to the desired position, the elastic material layer is cured to form the uneven pattern 130 having the predetermined convex portion 131 and the concave portions 132 and 133 to form a fine pattern. Forming mold 100 can be completed.

Hereinafter, a method of manufacturing the thin film transistor array panel according to the exemplary embodiment of the present invention using the mold for forming the micropattern according to the exemplary embodiment of the present invention as described above will be described with reference to FIGS. 2 to 6. 2 to 6 are cross-sectional views of intermediate structures in a manufacturing process of a thin film transistor array panel according to an exemplary embodiment of the present invention.

First, as shown in FIG. 2, copper (Cu), aluminum (Al), aluminum alloy (AlNd: Aluminum Neodymium), molybdenum (Mo), and chromium having low resistivity to prevent signal delay on the insulating substrate 210. A gate line (not shown) including (Cr), titanium (Ti), tantalum (Ta), molybdenum-tungsten (MoW), and the like and a gate electrode 212 branched from the gate line are formed. In this case, the gate line and the gate electrode 212 may be formed using a conventional photolithography method, and the gate line and the gate electrode 212 may be formed using a mold for forming a fine pattern according to an embodiment of the present invention. It may be formed. This will be described in more detail in the data line forming method.

Next, an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx) is formed on the entire surface of the insulating substrate on which the gate line and the gate electrode 212 are formed, for example, plasma enhanced chemical vapor deposition. The gate insulating film 214 is formed by deposition by a PECVD method.

Next, an amorphous silicon (a-Si: H) and n + a-Si doped with an impurity in amorphous silicon are stacked on the gate insulating layer 214 to form the semiconductor layer 222 and the ohmic contact layer 224.

Next, copper (Cu), aluminum (Al), aluminum alloy, molybdenum (Mo), chromium (Cr), titanium (Ti), tantalum (Ta), and molybdenum-tungsten having low resistivity on the ohmic contact layer 224. A conductive layer 231 such as MoW) is formed.

Next, a photoresist layer 310 is formed on the conductive layer 231. The photoresist layer 310 may be formed on the conductive layer 231 by applying, for example, a positive photoresist or a negative photoresist, for example, a slit coating process or a spin coating process. In the present specification, a case in which the photoresist layer 310 is formed using a negative photoresist is described by way of example, but is not limited thereto.

Subsequently, the fine pattern forming mold 100 according to the exemplary embodiment of the present invention is positioned on the photoresist layer 310, and a predetermined pressure is applied to the entire upper surface of the fine pattern forming mold 100.

The mold 100 for forming the fine pattern is elastic having a light blocking pattern 120 and a predetermined convex portion 131 and recesses 132 and 133 to selectively block light with the transparent substrate 110. It includes a concave-convex pattern 130 of the material. The light blocking pattern 120 included in the fine pattern forming mold 100 is formed to correspond to a region to be removed from the photoresist layer 310, and an uneven pattern having a thickness of t _{1 is} formed below the light blocking pattern 120. 130) is formed. In addition, a convex portion 131 having a thickness of t ₂ and a concave portion 132 having a thickness of t ₃ are disposed under the transparent substrate 110 on which the light blocking pattern 120 is not formed, that is, the region that does not overlap with the light blocking pattern 120. , 133 having an uneven pattern 130 is formed. At this time, each t ₁ , t ₂ and t ₃ may have a value of t ₁ > t ₂ > t ₃ . Here, the convex portion 131 and the concave portions 132 and 133 are positioned in the region where the thin film transistor and the data wiring are to be formed. In particular, the convex portion 131 may define the channel region of the semiconductor layer in the region where the thin film transistor is to be formed. It is to expose.

By pressing the photoresist layer 310 with such a fine pattern forming mold 100, the convex portion 131 and the concave portion 132 and 133 provided in the uneven pattern 130 of the fine pattern forming mold 100 are pressed. ) Is transferred to the photoresist layer 310. Accordingly, the photoresist layer 310 corresponding to the convex portion 131 of the uneven pattern 130 becomes concavely concave, and the photoresist layer corresponding to the concave portions 132 and 133 of the uneven pattern 130. 310 becomes a convexly protruding shape. That is, according to the shape of the concave-convex pattern 130, a multi-layered pattern, for example, a low-layered and high-layered two-layered pattern may be formed in the photoresist layer 310. In addition, the photoresist layer 310 corresponding to the concave-convex pattern 130 formed under the light blocking pattern 120 may remain thin or the photoresist layer 310 may not remain.

Subsequently, as shown in FIG. 3, ultraviolet rays are irradiated in a state where the mold 100 for fine pattern formation is in contact with the photoresist layer 130. The photoresist layer 310 is selectively exposed by ultraviolet irradiation. That is, ultraviolet rays are blocked in some regions of the photoresist layer 310 by the light blocking pattern 120 of the mold 100 for fine pattern formation. Therefore, when the negative type photoresist is used, only the portion selectively exposed by ultraviolet rays is cured.

Subsequently, as shown in FIG. 4, the mold for forming a fine pattern (100 in FIG. 3) is separated from the photoresist layer (310 in FIG. 3). Next, the conductive layer (232 of FIG. 3), the ohmic contact layer (224 of FIG. 3), and the semiconductor layer 222 are collectively etched by a wet etch method. At the same time, the photoresist layer 310 (see FIG. 3) positioned in an area not exposed to ultraviolet light, that is, an area in which ultraviolet light is blocked by the light blocking pattern 120 of the fine pattern forming mold 100, is also exposed to the wet etching process. It is removed by the etchant used to complete the photoresist patterns 310a and 310b. In particular, the photoresist pattern 310a may have a multilayer structure, for example, a two-layer structure including a low layer 310aa and a high layer 310ab, and the conductive layer using the photoresist patterns 310a and 310b as an etching mask. Etching 232 of FIG. 3 forms a constant conductive pattern 231a branched from the data line 231a crossing the gate line and the data line 231b.

Subsequently, as shown in FIG. 5, the photoresist patterns 310a and 310b of FIG. 4 are ashed with oxygen (O ₂ ), for example, to lower the step. At this time, all portions corresponding to the low-layer photoresist pattern 310aa of FIG. 4 are removed, and portions corresponding to the photoresist patterns 310ab and 310b having the thick thickness become thinner. That is, a portion corresponding to the channel region of the semiconductor layer is opened.

Subsequently, as shown in FIG. 6, the conductive pattern (231a of FIG. 5) is etched using the photoresist patterns 310ab and 310b having the channel region exposed thereon as an etch mask, and the source / drain electrodes are disposed on the semiconductor layer 224. (231aa, 231ab). At this time, when the source / drain electrodes 231aa and 231ab are etched, the ohmic contact layer 224 is over-etched and simultaneously patterned.

Next, after the remaining photoresist patterns 310ab and 310b are completely removed, benzocyclobutene, acryl resin, and the like are formed on the entire surface including the data lines 231b and the source / drain electrodes 231aa and 231ab. Or an organic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx) is deposited to form the protective film 242.

Next, a contact hole 243 is formed in the passivation layer 242 to electrically connect the drain electrode 231ab and the pixel electrode 252 of the thin film transistor. In this case, the contact hole 243 may be formed by a conventional photolithography method, or may be formed using a mold for forming a fine pattern according to an embodiment of the present invention. The contact hole 243 is formed by any one of the above methods to expose a predetermined portion of the drain electrode 231ab.

Next, a transparent conductive film such as indium tin oxide (ITO) or indium zinc oxide (IZO) is deposited on the entire surface including the passivation layer 242 by a sputtering method, and then a general photo The pixel electrode 252 is electrically connected to the drain electrode 231ab through the contact hole 243 using a lithography method or a mold for forming a fine pattern according to an embodiment of the present invention.

As described above, in the method of manufacturing the thin film transistor array panel according to the exemplary embodiment of the present invention, the semiconductor layer and the source / drain may be formed by using a mold for forming a fine pattern including a light blocking pattern and an uneven pattern having convex and concave portions. The electrodes can be formed collectively.

Although not shown, the thin film array display panel 200 having such a structure is provided with a liquid crystal layer bonded to the opposite display panels and interposed between the two display panels, wherein the opposite display panel is formed between the black matrix and the black matrix to prevent light leakage. On the color filter layer and the color filter layer in which R), green (G), and blue (B) color resists are formed in a certain order, a thin film array display panel is formed on the overcoat layer and the overcoat layer to protect the color filter layer and planarize the surface of the color filter layer. A common electrode for generating an electric field is formed in addition to the pixel electrode.

Although the embodiments of the present invention have been described above with reference to the accompanying drawings, the present invention is not limited to the above embodiments but may be manufactured in various forms, and having ordinary skill in the art to which the present invention pertains. It will be understood by those skilled in the art that the present invention may be embodied in other specific forms without changing the technical spirit or essential features of the present invention. Therefore, it should be understood that the embodiments described above are exemplary in all respects and not restrictive.

As described above, by manufacturing the thin film transistor array panel using the fine pattern forming mold according to the present invention, the development process can be omitted when forming the photoresist pattern, thereby reducing manufacturing costs, and in particular, a photoresist having a two-layer structure. Since the diffraction exposure method that generates a large number of defects during pattern formation is not applied, defects can be suppressed to improve process efficiency.

Claims (9)

Transparent substrates; A light blocking pattern on the transparent substrate; And And a concave-convex pattern on the transparent substrate and the light-blocking pattern, the concave-convex pattern having convex or concave portions in a region that does not overlap with the light-blocking pattern. The method of claim 1, The light blocking pattern is a mold for forming a fine pattern including a metal and / or a metal oxide. The method of claim 1, The light blocking pattern is a mold for forming a fine pattern containing chromium and / or chromium oxide. The method of claim 1, The light blocking pattern is a fine pattern forming mold comprising a black photoresist. The method of claim 1, The uneven pattern is a mold for forming a fine pattern comprising an ultraviolet curable elastic resin. The method of claim 1, The uneven pattern is a fine pattern forming mold comprising at least one of polydimethylsiloxane, silicone rubber, polyurethane and polyimide. Sequentially forming an insulating layer, a semiconductor layer, a conductive layer, and a photoresist layer on the insulating substrate on which the gate lines are formed; A mold for forming a fine pattern including a transparent substrate, a light blocking pattern on the transparent substrate, and a concave-convex pattern having a convex portion or a concave portion in a region which is disposed on the transparent substrate and the light blocking pattern and does not overlap the light blocking pattern. Pressing the photoresist layer to form a photoresist pattern including a two-layer structure of a high layer and a low layer; Forming a data line by collectively etching the semiconductor layer and the conductive layer using the photoresist pattern as an etching mask; And Removing the bottom layer of the photoresist pattern and etching the conductive layer using the etching layer as an etch mask to expose a channel region of the semiconductor layer. The method of claim 7, wherein And the convex portion of the mold for forming the fine pattern is formed at a position corresponding to the channel region of the semiconductor layer. The method of claim 7, wherein The photoresist pattern forming step may include selectively exposing and curing the photoresist layer by the light blocking pattern of the micropattern forming mold while pressing the photoresist layer with the micropattern forming mold. Method of manufacturing a thin film transistor array panel.

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