KR20060069189A - Driving Method of Plasma Display Panel - Google Patents

Abstract

The present invention relates to a method of driving a plasma display panel for improving a sustain pulse applied in a sustain period. The present invention can not only improve energy efficiency but also secure a driving voltage margin.

The present invention relates to a method of driving a plasma display panel in which an image is realized by a combination of a plurality of subfields in which a predetermined pulse is applied to an address electrode, a scan electrode, and a sustain electrode in a reset period, an address period, and a sustain period. The sustain period of at least one of the subfields is divided by the first sustain period and the second sustain period after the aforementioned first sustain period, and the voltage rise time T2_r of the sustain pulse applied to the second sustain period is equal to the first sustain period. The voltage rise time T1_r of the sustain pulse applied in the sustain period is different from that of the sustain pulse.

Plasma display panel, driving method, sustain period, sustain pulse, voltage rise time, driving margin

Description

Driving method of plasma display panel {Driving Method of Plasma Display Panel}

1 is a view showing the structure of a typical plasma display panel.

2 is a diagram illustrating a method of implementing image gradation of a conventional plasma display panel.

3 is a view illustrating a driving waveform according to a driving method of a conventional plasma display panel.

FIG. 4 is a diagram for explaining the sustain waveform applied in the sustain period in the driving waveform of FIG. 3 in more detail.

5 is a view showing the configuration of a general energy recovery circuit.

6 is a view for explaining the relationship between energy efficiency and driving margin according to the rise time of a general sustain pulse voltage.

FIG. 7 is a diagram for explaining a first embodiment of a method of driving a plasma display panel of the present invention; FIG.

8 is a view for comparing the voltage rise time of the sustain pulse of the first sustain period and the sustain pulse of the second sustain period in the driving waveform of FIG.

9 is a view for explaining a second embodiment of a method of driving a plasma display panel of the present invention;

10 is a view for explaining a third embodiment according to the driving method of the plasma display panel of the present invention;

<Explanation of symbols for the main parts of the drawings>

100: front substrate 101: front glass

102 scan electrode 103 sustain electrode

104: upper dielectric layer 105: protective layer

110: rear substrate 111: rear glass

112: partition 113: address electrode

114 phosphor layer 115 lower dielectric layer

a: transparent electrode b: bus electrode

The present invention relates to a plasma display panel, and more particularly, to a method of driving a plasma display panel which improves driving efficiency by improving a sustain pulse applied in a sustain period.

In general, a plasma display panel is a partition wall formed between a front substrate and a rear substrate to form a unit cell, and each cell includes neon (Ne), helium (He), or a mixture of neon and helium (Ne + He) and An inert gas containing the same main discharge gas and a small amount of xenon is filled. When discharged by a high frequency voltage, the inert gas generates vacuum ultraviolet rays and emits phosphors formed between the partition walls to realize an image. Such a plasma display panel has a spotlight as a next generation display device because of its thin and light configuration.

1 illustrates a structure of a general plasma display panel.

As shown in FIG. 1, a plasma display panel includes a front substrate in which a plurality of sustain electrode pairs formed by pairing a scan electrode 102 and a sustain electrode 103 are formed on a front glass 101, which is a display surface on which an image is displayed. The rear substrate 110 having the plurality of address electrodes 113 arranged to intersect the plurality of sustain electrode pairs on the back glass 111 forming the back surface 100 and the rear surface is coupled in parallel with a predetermined distance therebetween. .

The front substrate 100 is made of a scan electrode 102 and a sustain electrode 103, that is, a transparent electrode (a) formed of a transparent ITO material and a metal material to mutually discharge and maintain light emission of the cells in one discharge cell. The scan electrode 102 and the sustain electrode 103 provided as the bus electrode b are included in pairs. The scan electrode 102 and the sustain electrode 103 are covered by one or more dielectric layers 104 that limit the discharge current and insulate the electrode pairs, and are oxidized on top of the upper dielectric layer 104 to facilitate the discharge conditions. A protective layer 105 on which magnesium (MgO) is deposited is formed.

The rear substrate 110 is arranged in such a manner that a plurality of discharge spaces, that is, barrier ribs 112 of a stripe type (or well type) for forming discharge cells are maintained in parallel. In addition, a plurality of address electrodes 113 which perform address discharge to generate vacuum ultraviolet rays are arranged in parallel with the partition wall 112. On the upper side of the rear substrate 110, R, G, and B phosphors 114 which emit visible light for image display during address discharge are coated. A lower dielectric layer 115 is formed between the address electrode 113 and the phosphor 114 to protect the address electrode 113.

A method of implementing image gradation in such a plasma display panel is shown in FIG. 2.

2 is a diagram illustrating a method of implementing image grayscale of a conventional plasma display panel.

As shown in FIG. 2, in the conventional method of expressing a gray level of a plasma display panel, a frame is divided into several subfields having different number of emission times, and each subfield is a reset period (RPD) for initializing all cells again. ) Is divided into an address period APD for selecting a cell to be discharged and a sustain period SPD for implementing gradation according to the number of discharges. For example, when displaying an image with 256 gray levels, a frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields SF1 to SF8 as shown in FIG. 2, and eight subfields. Each of the SFs SF1 to SF8 is divided into a reset period, an address period, and a sustain period.

The reset period and the address period of each subfield are the same for each subfield. The address discharge for selecting the cell to be discharged is caused by the voltage difference between the address electrode and the transparent electrode which is the scan electrode. The sustain period is increased at a rate of 2 ⁿ ( ^where n = 0, 1, 2, 3, 4, 5, 6, 7) in each subfield. In this way, since the sustain period is different in each subfield, the gray scale of the image is expressed by adjusting the sustain period of each subfield, that is, the number of sustain discharges. The driving waveforms according to the driving method of the plasma display panel are shown in FIG. 3.

3 is a view illustrating a driving waveform according to a driving method of a conventional plasma display panel.

As shown in Fig. 3, the plasma display panel erases the reset period for initializing all the cells, the address period for selecting the cells to be discharged, the sustain period for maintaining the discharge of the selected cells, and the wall charges in the discharged cells. It is divided into an erase period for driving.

In the reset period, the rising ramp waveform Ramp-up is applied to all the scan electrodes at the same time in the setup period. This rising ramp waveform causes weak dark discharge within the full discharge cells. By this setup discharge, positive wall charges are accumulated on the address electrode and the sustain electrode, and negative wall charges are accumulated on the scan electrode.

During the set-down period, after the rising ramp waveform is supplied, the falling ramp waveform (Ramp-down) starts to fall from the positive voltage lower than the peak voltage of the rising ramp waveform and falls to a specific voltage level below the ground (GND) level voltage. By generating a weak erase discharge in the inside, the wall charges excessively formed in the scan electrode are sufficiently erased. By this set-down discharge, wall charges such that address discharge can be stably generated remain uniformly in the cells.

In the address period, the negative scan pulses are sequentially applied to the scan electrodes, and the positive data pulses are applied to the address electrodes in synchronization with the scan pulses. As the voltage difference between the scan pulse and the data pulse and the wall voltage generated in the reset period are added, address discharge is generated in the discharge cell to which the data pulse is applied. In the cells selected by the address discharge, wall charges are formed such that a discharge can occur when the sustain voltage Vs is applied. The sustain electrode is supplied with a positive polarity voltage Vz during the set down period and the address period so as to reduce the voltage difference with the scan electrode so as to prevent mis-discharge with the scan electrode.

In the sustain period, a sustain pulse Su is applied to the scan electrode and the sustain electrodes alternately. In the cell selected by the address discharge, as the wall voltage and the sustain pulse in the cell are added, a sustain discharge, that is, a display discharge, occurs between the scan electrode and the sustain electrode every time the sustain pulse is applied.

After the sustain discharge is completed, in the erase period, a voltage of an erase ramp waveform Ramp-ers having a small pulse width and a low voltage level is supplied to the sustain electrode to erase the wall charge remaining in the cells of the full screen.

Looking at the sustain pulse applied in the sustain period in this driving waveform in more detail as shown in FIG.

4 is a view for explaining in more detail the sustain pulse applied in the sustain period in the driving waveform of FIG.

As shown in FIG. 4, the conventional sustain pulse is first applied with the sustain voltage Vs to the scan electrode Y in the state where the ground level GND is applied to the sustain electrode Z in the first section, for example. Then, discharge by the scan electrode Y is generated.

When the sustain voltage Vs is applied to the sustain electrode Z while the voltage of the ground level GND is applied to the scan electrode Y in the second section, discharge by the sustain electrode Z occurs. Here, the slope of the sustain pulse in the first section and the second section, that is, the rising period and the falling period of the sustain pulse are kept the same within the sustain period.

The sustain discharge generated by the sustain pulse is controlled by the energy recovery circuit. The configuration of the energy recovery circuit is as follows.

5 is a view showing the configuration of a general energy recovery circuit.

As shown in FIG. 5, a general energy recovery circuit operates in four states.

First, in a first state (state 1), the first switch Q1 is turned on and the second to fourth switches Q2, Q3, and Q4 are turned off. As a result, Vp increases as energy stored in the capacitor Css is supplied to the panel Cp. In the first state, as shown in FIG. 3, the current flowing through the inductor L becomes + IL since energy is supplied from the capacitor Css to the panel Cp.

In the second state (state 2), the first switch Q1 and the second switch Q2 are turned on, and the third switch Q3 and the fourth switch Q4 are turned off. Accordingly, Vp becomes the sustain voltage Vs. The sustain voltage Vs is applied to the panel Cp at the end of the first state 1, that is, at the time t1 becomes the maximum value Vs due to LC resonance. Here, the sustain voltage Vs means a voltage for maintaining the discharge of the discharge cell.

Thereafter, in the third state (state 3), the third switch Q3 is turned on, and the first switch, the second switch, and the fourth switches Q1, Q2, and Q4 are turned off. As a result, energy stored in the panel Cp is discharged to the capacitor Css, and energy is recovered, and Vp drops. In the third state, since current flows from the panel Cp to the capacitor Css, the current flowing through the inductor L becomes -IL.

Finally, in the fourth state 4, the third switch Q3 and the fourth switch Q4 are turned on, and the first switch and the second switches Q1 and Q2 are turned off. As a result, Vp becomes the ground level. At the end of the third state (state 3), that is, at t2, Vp is maintained at the ground level.

The energy recovery circuit of the general plasma display panel operated as described above improves energy efficiency by using resonance between the panel P and the inductor L. FIG.

6 illustrates a relationship between energy efficiency and driving margin according to a rise time of a general sustain pulse voltage.

As shown in FIG. 6, the rise time T_r (hereinafter, referred to as a voltage rise time) of the sustain pulse voltage is a time taken for the potential of the scan electrode or the sustain electrode to rise from 10% to 80% of the sustain voltage Vs. it means.

The energy efficiency and driving margin vary depending on the magnitude of the voltage rise time T_r. That is, when the voltage rise time T_r is increased, energy can be sufficiently recovered or supplied from the panel by the LC resonance of FIG.

On the other hand, when the voltage rise time T_r increases, the variation of the wall charge distribution in the cells after the sustain discharge increases, thereby reducing the margin of the driving voltage. That is, each of the cells constituting the plasma display panel has a different driving voltage due to an error (for example, a difference in thickness of the dielectric in each cell region) that occurs in the manufacturing process.

If the driving voltages of the cells in the predetermined region are 200V to 220V and the driving voltages of the cells in the other region are 200V to 210V, the driving voltage for the cells of the entire plasma display panel should be 200V to 210V, the intersection thereof, so that the driving margin is It is shrinking.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and to provide a method of driving a plasma display panel which can secure a driving margin without lowering energy efficiency.

In order to achieve the above object, the present invention provides a method of driving a plasma display panel that realizes an image by a combination of a plurality of subfields in which a predetermined pulse is applied to an address electrode, a scan electrode, and a sustain electrode in a reset period, an address period, and a sustain period. In the method, the sustain period of at least one of the plurality of subfields is divided by the first sustain period and the second sustain period after the above-described first sustain period, and the voltage rise time (T2_r) of the sustain pulse applied to the second sustain period. ) Is different from the voltage rise time T1_r of the sustain pulse applied in the first sustain period.

Here, the voltage rise time T2_r of the sustain pulse applied in the second sustain period is smaller than the voltage rise time T1_r of the sustain pulse applied in the first sustain period.

Further, the voltage rise time T2_r of the sustain pulse applied in the second sustain period is an average of the voltage rise times of the sustain pulses applied in the second sustain period, and the voltage rise time of the sustain pulse applied in the first sustain period ( T1_r) is an average of the voltage rise times of the sustain pulses applied in the first sustain period.

In addition, the voltage rise time T2_r of the sustain pulse applied in the second sustain period is 0.8 times or less than the voltage rise time T1_r of the sustain pulse applied in the first sustain period.

In the second sustain period, the last sustain pulse of the sustain pulses is applied to either the scan electrode or the sustain electrode.

The subfield in which the last sustain pulse of the sustain pulses is applied to either the scan electrode or the sustain electrode in the second sustain period is characterized in that the number of the sustain pulses is 10 or more.

In the second sustain period, the last sustain pulse of a pair of sustain pulses is applied to the scan electrode or the sustain electrode.

In addition, the subfield in which the last sustain pulse of a pair of the sustain pulses is applied to the scan electrode or the sustain electrode in the 2 sustain period is characterized in that the number of the sustain pulse pairs is 10 or more.

The number of sustain pulses applied in the second sustain period may be adjusted according to the total number of sustain pulses in the sustain period.

In addition, the number of sustain pulses applied in the second sustain period increases as the total number of sustain pulses in the sustain period increases.

Hereinafter, an embodiment according to a method of driving a plasma display panel of the present invention will be described in detail with reference to the accompanying drawings.

<First Embodiment>

7 is a view for explaining a first embodiment of a method of driving a plasma display panel of the present invention.

As shown in Fig. 7, the first embodiment of the method for driving the plasma display panel of the present invention is applied to the address electrode X, the scan electrode Y and the sustain electrode Z in the reset period, the address period and the sustain period. In a driving method of a plasma display panel which realizes an image by a combination of a plurality of subfields to which a predetermined pulse is applied, a sustain period of at least one subfield among a plurality of subfields is defined as a first sustain period and the first sustain period. Assuming that the second sustain period after the period is divided, the voltage rise time T2_r of the sustain pulse applied in the second sustain period is equal to the voltage rise time T1_r of the sustain pulse applied in the first sustain period. Are different. The driving waveform according to the first embodiment will be described with reference to FIG. 8 as follows.

Referring to FIG. 8, the voltage rise time T2_r of the sustain pulse applied in the above-described second sustain period in the driving waveform of the present invention is smaller than the voltage rise time T1_r of the sustain pulse applied in the first sustain period.

Here, as shown in FIG. 7, the last sustain pulse of the sustain pulses is applied to either the scan electrode Y or the sustain electrode Z in the second sustain period. In other words, the sustain pulse of the aforementioned second sustain period is the last sustain pulse applied to either the scan electrode Y or the sustain electrode Z. FIG. In other words, the sustain pulse having the above-mentioned voltage rise time of T2_r is the last sustain pulse applied to either the scan electrode Y or the sustain electrode Z.

Here, the voltage rise time T2_r of the sustain pulse applied in the above-mentioned second sustain period is an average of the voltage rise times of the sustain pulses applied in the second sustain period, and the voltage of the sustain pulse applied in the first sustain period. The rise time T1_r is an average of the voltage rise times of the sustain pulses applied in the first sustain period.

In this way, a subfield to which a sustain pulse having a voltage rise time of T2_r is allocated, i.e., a subfield which divides the sustain period into a first sustain period and a second sustain period after the first sustain period, among the aforementioned plurality of subfields. Preferably, the number of pulses is 10 or more subfields. In other words, the subfield in which the last sustain pulse of the sustain pulses is applied to either the scan electrode Y or the sustain electrode Z in the second sustain period is a subfield in which the number of the sustain pulses is 10 or more. As such, the reason why the subfield to which the sustain pulse having the voltage rise time of T2_r is allocated is limited to a subfield having at least 10 sustain pulses, is because a subfield having a low number of sustain pulses is relatively smaller than other subfields. This is because even a small change in one sustain pulse increases the rate of change, thereby reducing the stability of the discharge. For example, even if only one sustain pulse is different in a subfield having 100 sustain pulses, the rate of change of one sustain pulse compared to the entire subfield is 1/100. On the other hand, if only one sustain pulse is changed in the subfield having the number of five sustain pulses, the rate of change of one sustain pulse relative to the entire subfield is 1/5, which is relatively large.

In addition, the voltage rise time T2_r of the sustain pulse applied in the second sustain period is preferably 0.8 times or less than the voltage rise time T1_r of the sustain pulse applied in the first sustain period. As described above, the reason why the voltage rise time T2_r of the sustain pulse applied in the second sustain period is set to 0.8 times or less than the voltage rise time T1_r of the sustain pulse applied in the first sustain period is sustain sustain and sustain discharge. This is to ensure stable efficiency of both. This is because when T2_r becomes more than 0.8 times and 1 times less than T1_r, the efficiency due to the sustain pulse having the voltage rise time of T2_r decreases.

As described above, a sustain pulse having a relatively large voltage rise time T1_r is first applied in the first sustain period, and then a sustain pulse having a relatively small voltage rise time T1_r is applied in the second sustain period. As a result, energy efficiency is improved due to the sustain pulse having a relatively large voltage rise time T1_r.

In addition, since a sustain pulse having a relatively small voltage rise time (T2_r) is applied at the end of the sustain period, the strong discharge occurs, so that the variation in the wall charge distribution of each cell is small, thereby increasing the margin of the driving voltage.

In the first embodiment, the sustain pulse included in the second sustain period is illustrated and described as being the last sustain pulse applied to either the scan electrode Y or the sustain electrode Z. However, the sustain pulse having the voltage rise time of T2_r is not limited to the last sustain pulse applied to either the scan electrode Y or the sustain electrode Z, and the sustain pulse having the voltage rise time of T2_r is the last. It may be a sustain pulse pair. This driving waveform is as follows in the second embodiment.

Second Embodiment

9 is a view for explaining a second embodiment of a method of driving a plasma display panel of the present invention.

As shown in Fig. 9, in the second embodiment of the driving method of the present invention, predetermined pulses are applied to the address electrode X, the scan electrode Y and the sustain electrode Z during the reset period, the address period and the sustain period. In a driving method of a plasma display panel which realizes an image by a combination of a plurality of subfields applied, a sustain period of at least one subfield among a plurality of subfields is defined as a first sustain period and a first sustain period after the first sustain period. Assuming that the two sustain periods are divided, the voltage rise time T2_r of the sustain pulses applied in the aforementioned second sustain period is different from the voltage rise time T1_r of the sustain pulses applied in the first sustain period. Here, as shown in Fig. 9, the sustain pulse of the second sustain period in the second embodiment of the present invention is the last sustain pulse pair applied to the scan electrode or the sustain electrode. In other words, in the second sustain period, the last sustain pulse of the pair of sustain pulses is applied to the scan electrode Y or the sustain electrode Z.

The voltage rise time T2_r of the sustain pulse pair applied in the second sustain period is smaller than the voltage rise time T1_r of the sustain pulse pairs applied in the first sustain period.

Here, as in the first embodiment, the voltage rise time T2_r of the sustain pulse applied in the second sustain period described above is an average of the voltage rise times of the sustain pulses applied in the second sustain period, that is, the pairs of sustain pulses, In addition, the voltage rise time T1_r of the sustain pulse applied in the first sustain period is an average of the voltage rise times of the sustain pulses applied in the first sustain period, that is, the pairs of sustain pulses.

In this way, a subfield to which a sustain pulse having a voltage rise time of T2_r is allocated, i.e., a subfield which divides the sustain period into a first sustain period and a second sustain period after the first sustain period, among the aforementioned plurality of subfields. It is preferable that the number of pulse pairs is 10 or more subfields. In other words, the subfield in which the last sustain pulse of a pair of the sustain pulses is applied to the scan electrode Y or the sustain electrode Z in the second sustain period is a subfield in which the number of the sustain pulse pairs is 10 or more. As described above, the reason why the subfield to which the sustain pulse having the voltage rise time of T2_r is allocated is limited to the subfield having at least 10 sustain pulse pairs is the same as in the above-described first embodiment, and thus the overlapping description thereof will be omitted. .

Further, in the second embodiment, as in the first embodiment, the sustain pulse applied in the second sustain period, that is, the voltage rise time T2_r of the sustain pulse pairs, is the sustain pulse and the sustain pulse applied in the first sustain period. It is preferable that the voltage rise time T1_r is 0.8 times or less.

Accordingly, a sustain pulse pair having a relatively large voltage rise time T1_r is first applied in the first sustain period, and then a sustain pulse pair having a relatively small voltage rise time T1_r is applied in the second sustain period, whereby As a result, the energy efficiency is improved due to the sustain pulse pair having a large voltage rise time T1_r.

In addition, the margin of the driving voltage increases because a pair of sustain pulses having a relatively small voltage rise time T2_r is applied at the end of the sustain period so that the strong discharge occurs and the variation in the wall charge distribution of each cell becomes small.

In the above first and second embodiments, only the last one sustain pulse or the last sustain pulse pair has a relatively small voltage rise time of T2_r in the second sustain period, but the plurality of sustain pulses or the sustain pulses have been described. The pair may be set to have a relatively small voltage rise time of T2_r. This driving waveform is the same as the third embodiment.

Third Embodiment

10 is a view for explaining a third embodiment according to the method of driving a plasma display panel of the present invention.

As shown in Fig. 10, in the third embodiment of the present invention, a sustain period of at least one subfield among a plurality of subfields is divided by a first sustain period and a second sustain period after the first sustain period. Assuming that the voltage rise time T2_r of the sustain pulse applied in the above-mentioned second sustain period is different from the voltage rise time T1_r of the sustain pulse applied in the first sustain period. Here, the number of sustain pulses applied in the second sustain period is adjusted according to the total number of sustain pulses in the sustain period. That is, the number of sustain pulses having the voltage rise time of T2_r may be adjusted according to the number of sustain pulses. More preferably, the number of sustain pulses applied in the second sustain period increases as the total number of sustain pulses in the sustain period increases. for example. Unlike the first embodiment or the second embodiment, the sustain pulse of the second sustain period of the third embodiment of the present invention has a sustain pulse from the last sustain pulse to at least three or more sustain pulses. Can be applied. As a more detailed example, for example, in a subfield having the number of 200 sustain pulses, the voltage rise time T2_r of up to 10 sustain pulses from the last sustain pulse may be smaller than that of other sustain pulses. That is, at least three or more sustain pulses from the last sustain pulse in the second sustain period have a voltage rise time of T2_r.

The voltage rise time T2_r of the sustain pulse pair applied in the second sustain period is smaller than the voltage rise time T1_r of the sustain pulse pairs applied in the first sustain period.

As in the third embodiment of the present invention, the driving waveform for reducing the voltage rise time (T2_r) of at least three or more sustain pulses from the last sustain pulse as compared with other sustain pulses has a sustain period in which the number of sustain pulses is large enough. It is preferable to apply in the containing subfield.

Since the driving waveform according to the third embodiment of the present invention is substantially the same as the above-described first or second embodiment, redundant description thereof will be omitted.

According to the third embodiment of the present invention, a sustain pulse pair having a first voltage rise time T1_r is first applied in a sustain period, and then a sustain having a second voltage rise time T2_r smaller than the first voltage rise time T1_r. When the pulse pair is applied, energy efficiency is improved due to the sustain pulse pair having a relatively large first voltage rise time T1_r.

In addition, the margin of the driving voltage increases because a pair of sustain pulses having a relatively small second voltage rise time T2_r is applied at the end of the sustain period so that the strong discharge occurs and the variation in the wall charge distribution of each cell decreases. .

As such, those skilled in the art will appreciate that the present invention can be implemented in other specific forms without changing the technical spirit or essential features thereof. Therefore, the above-described embodiments are to be understood as illustrative in all respects and not as restrictive.

The scope of the present invention is shown by the following claims rather than the detailed description, and all changes or modifications derived from the meaning and scope of the claims and their equivalents should be construed as being included in the scope of the present invention. do.

As described above, the present invention can not only improve energy efficiency but also secure driving voltage margin by applying a sustain pulse having a relatively small voltage rise time in the sustain period.

Claims (10)

A driving method of a plasma display panel in which an image is realized by a combination of a plurality of subfields in which a predetermined pulse is applied to an address electrode, a scan electrode, and a sustain electrode in a reset period, an address period, and a sustain period. Dividing the sustain period of at least one of the plurality of subfields by a first sustain period and a second sustain period after the first sustain period, The voltage rising time (T2_r) of the sustain pulse applied in the second sustain period is different from the voltage rising time (T1_r) of the sustain pulse applied in the first sustain period. The method of claim 1, And the voltage rise time (T2_r) of the sustain pulse applied in the second sustain period is smaller than the voltage rise time (T1_r) of the sustain pulse applied in the first sustain period. The method of claim 2, The voltage rise time T2_r of the sustain pulses applied in the second sustain period is an average of the voltage rise times of the sustain pulses applied in the second sustain period, And a voltage rising time (T1_r) of the sustain pulses applied in the first sustain period is an average of voltage rising times of the sustain pulses applied in the first sustain period. The method of claim 3, wherein The voltage rising time (T2_r) of the sustain pulse applied in the second sustain period is 0.8 times or less than the voltage rising time (T1_r) of the sustain pulse applied in the first sustain period. The method according to any one of claims 1 to 4, And wherein the last sustain pulse of the sustain pulses is applied to either the scan electrode or the sustain electrode in the second sustain period. The method of claim 5, And the number of sustain pulses is 10 or more in the subfield to which the last sustain pulse of the sustain pulses is applied to either the scan electrode or the sustain electrode in the second sustain period. The method according to any one of claims 1 to 4, And in the second sustain period, the last sustain pulse of a pair of the sustain pulses is applied to the scan electrode or the sustain electrode. The method of claim 7, wherein The subfield in which the last sustain pulse of the pair of the sustain pulses is applied to the scan electrode or the sustain electrode in the second sustain period, wherein the number of sustain pulse pairs is 10 or more. . The method according to any one of claims 1 to 4, The number of sustain pulses applied in the second sustain period is adjusted according to the total number of sustain pulses in the sustain period. The method of claim 9, And the number of sustain pulses applied in the second sustain period increases as the total number of sustain pulses in the sustain period increases.

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