KR20020057250A - Method for forming image sensor having NPNP photodiode - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an image sensor capable of improving dark current characteristics, and the method for fabricating an image sensor including NPNP photodiodes as a light receiving means, wherein ion implantation of n-type impurities into a p-type semiconductor substrate in a photodiode region A first step of forming a first n-type impurity region; A second step of forming a second n-type impurity region on the first n-type impurity region; Forming a p-type impurity region on the second n-type impurity region; And performing a heat treatment to form an n-type impurity region on the p-type impurity region.

Description

Method for forming image sensor having NPP photodiode {Method for forming image sensor having NPNP photodiode}

TECHNICAL FIELD The present invention relates to the field of image sensor manufacturing, and more particularly, to an image sensor manufacturing method having an NPNP photodiode.

A CMOS image sensor converts an optical image into an electrical signal using a CMOS manufacturing technology. The CMOS image sensor converts signal electrons generated in response to light into voltage and reproduces image information through a signal processing process. CMOS image sensor can be used in all fields of image signal reproduction such as various cameras, medical equipment, surveillance cameras, various industrial equipments for positioning and detection, toys, etc. The trend is expanding.

The CMOS image sensor adopts a switching method in which MOS transistors are made by the number of pixels and the outputs are sequentially detected using the MOS transistors. The CMOS image sensor is simpler to drive than the CCD image sensor, which is widely used as a conventional image sensor, and can realize various scanning methods, and can integrate a signal processing circuit into a single chip, thereby miniaturizing the product. The use of compatible CMOS technology reduces manufacturing costs and significantly lowers power consumption.

1 is a circuit diagram showing a unit pixel of a CMOS image sensor composed of four transistors and two capacitance structures, and a unit pixel of a CMOS image sensor composed of a photodiode (PD) as an optical sensing means and four NMOS transistors. . Of the four NMOS transistors, the transfer transistor Tx serves to transport the photocharges generated by the photodiode PD to the floating diffusion region, and the reset transistor Rx is stored in the floating diffusion region for signal detection. It serves to discharge the charge, the drive transistor (Dx) serves as a source follower (Source Follower), the select transistor (Sx) is for switching (Switching) and addressing (Addressing). In the drawing, "Cf" represents capacitance of the floating diffusion region, and "Cp" represents capacitance of the photodiode, respectively.

Operation of the image sensor unit pixel configured as described above is performed as follows. Initially, the unit pixel is reset by turning on the reset transistor Rx, the transfer transistor Tx, and the select transistor Sx. At this time, the photodiode PD starts to deplete, and the capacitance Cp generates carrier charging, and the capacitance Cf of the floating diffusion region is charged and stored up to the supply voltage VDD. The transfer transistor Tx is turned off, the select transistor Sx is turned on, and the reset transistor Rx is turned off. In such an operating state, the output voltage V1 is read from the unit pixel output terminal Out and stored in the buffer, and then the carrier transistor Tx is turned on to move the carriers of the capacitance Cp changed according to the light intensity to the capacitance Cf. The output voltage (V2) is read from the output terminal (Out) again and the analog data for V1-V2 is converted into digital data, so one operation cycle for the unit pixel is completed.

The CMOS image sensor can be manufactured by various methods, but as described above, the conventional structure mainly uses a structure using four transistors and one photodiode receiving light in a unit pixel. Such a structure can adjust a desired dynamic range by adjusting the capacitance of the floating diffusion region and can also increase the capacitance compared to other structures.

In the PN diode shown in FIG. 2, the potentials Vp and Vn have a high n-type region, and an electric field is directed from the p-type region to the n-type region. That is, electrons which are minority carriers in the p-type region are drift to the n-type region.

3 is a cross-sectional view showing the structure of an image sensor having a conventional PNP diode, wherein the upper p-type impurity region 26 formed near the surface of the semiconductor substrate is formed at a high concentration and the n-type impurity region 24 is formed at a low concentration. And the p-type semiconductor substrate 20 has a very low doping concentration of 6.0E14 / cm ³ when using the epitaxial layer formed on the wafer.

Most of the n-type impurity region 24 is depleted by the upper p-type impurity region 26 in the reset state to completely extract the n-type charge, and the p-type semiconductor substrate 20 is the n-type impurity region 24 region. Depression is caused by At this time, since the electric field is formed from the p-type impurity region 26 toward the n-type impurity region 24, electrons are connected to the n-type impurity region in the electron-hole pair generated by light irradiation, and the hole is a p-type semiconductor. It is pulled out to the substrate 20 and grounded. The amount of electrons generated varies depending on the intensity of light, thereby realizing an image.

According to the above principle of image generation, no signal should come out in the dark but the dark current is actually measured. This is because electron-hole pairs are generated and occur mainly through the defects between energy band gaps. At room temperature, the generation of electron-hole pairs (EHPs) at normal junctions is extremely low, and it can be considered that EFP is generated only in a defective place. Defects are mainly at the silicon surface and field oxide edges, and dark currents are mainly generated here.

At higher temperatures, dark current increases more. In the conventional CMOS image sensor, it is known that dark current due to EHP generation due to surface defects occupies most of the dark current in the field oxide film edge and the surface of the silicon cone substrate.

On the other hand, photodiodes having a PNP structure are frequently used because they can reduce the dark current by isolating the silicon surface from the n-layer collecting electrons using a p-type impurity layer. However, even in the PNP diode structure, the electrons among the electron-hole pairs generated by dangling bonds on the silicon surface are focused on the n-region of the photodiode by the electric field of the upper PN diode, and thus the signal is not present. Occupies the main component of the dark current coming out.

The method for reducing the dark current is to reduce the electric field of the n region where light is connected to the upper p-type impurity region, that is, to increase the depletion width, or to form the upper p-type impurity at high concentration and high energy. have. When the depletion width is increased to lower the electric field, the concentration of the n-type impurity, which is low, is lower than that of the upper p-type impurity region. However, in this case, the saturation level, which is another characteristic of the CMOS image sensor, is reduced and thus difficult to apply. In addition, when the concentration and the energy are increased to form the upper p-type impurity region, a type of implant dose occurs during charge transfer. In this case, another important characteristic of the CMOS image sensor is dead zone. It is difficult to apply due to deterioration of characteristics.

As a result, the dark current characteristics associated with dark current, dead zone, and saturation levels are produced in a condition where the above three characteristics are appropriately harmonized without fundamental improvement. It is required, but does not satisfy this situation.

The present invention for solving the above problems is to provide an image sensor manufacturing method that can improve the dark current characteristics.

1 is a circuit diagram showing a unit pixel of a conventional CMOS image sensor;

2 is a schematic view showing a PN diode and its electrical characteristics,

3 is a cross-sectional view showing the structure of an image sensor having a conventional PNP diode;

4 is a cross-sectional view showing the structure of an image sensor having an NPNP diode according to an embodiment of the present invention;

5A to 5C are cross-sectional views of an image sensor manufacturing process according to an embodiment of the present invention.

* Explanation of symbols for the main parts of the drawings

55: first n-type impurity region 56: second n-type impurity region

58: p-type impurity region 61: n-type impurity region

The present invention for achieving the above object in the image sensor manufacturing method comprising a NPNP photodiode as a light receiving means, the first n-type impurity region by ion implantation of n-type impurities in the p-type semiconductor substrate of the photodiode region Forming a first step; A second step of forming a second n-type impurity region on the first n-type impurity region; Forming a p-type impurity region on the second n-type impurity region; And performing a heat treatment to form an n-type impurity region on the p-type impurity region.

The present invention is characterized by forming NPNP photodiodes in place of PNP photodiodes. To this end, a thin n-type impurity region is formed on the surface of the semiconductor substrate. As a result, the electric field is blocked toward the silicon substrate surface, and electrons of the electron-hole pairs generated by the dangling bonds on the surface are fundamentally blocked to remove the dark current caused by the surface.

The N-type impurity region on the upper portion of the PNP photodiode is not formed by an additional ion implantation process, and the p-type impurity such as boron (B) in the upper p-type impurity region and the phosphorus (P) in its lower n-type impurity region are not formed. It is formed using the difference in solubility of the p-type impurity in the oxide film. This can be formed by simultaneously performing low energy ion implantation and high energy ion implantation when ion implantation of n-type impurities during PNP diode formation. When the CMOS image sensor is manufactured using the NPNP photodiode, the dark current can be reduced while maintaining the characteristics of the conventional PNP photodiode.

As described above, the present invention is a method of removing the surface dark current component in principle by directing an electric field on the photodiode toward the surface of the semiconductor substrate so that electrons of EHP due to surface defects that occupy most of the dark current component are not introduced into the photodiode.

Note that in the case of forming the NPNP diode, when the top n-type impurity region close to the surface of the semiconductor substrate is formed by artificial ion implantation, the electric field E is formed as shown in FIG. 4. When the n-type impurity region is formed thick, the electric field is directed to the n-type impurity region, and the electrons generated by the blue wavelength light, which mainly generate EHP on the silicon surface due to the small wavelength, are concentrated on the surface and thus the signal for blue light The saturation level will also decrease significantly.

In the present invention, in order to prevent such a problem from forming NPNP photodiode, an n-type region having a depth of 100 kPa to 300 kPa is formed on the silicon surface by using a difference in the solubility of phosphorus (P) and boron (B) in the oxide film. Form. Accordingly, it is possible to prevent the blue light signal reduction and the saturation level reduction, which are problems that may occur when forming the NPNP diode.

Hereinafter, a method of manufacturing an image sensor according to an exemplary embodiment of the present invention will be described with reference to FIGS. 5A to 5C.

First, as shown in FIG. 5A, the p-type epitaxial layer 51 and the device isolation layer 52 are formed on the p-type semiconductor substrate 50, and the gate insulating layer 53 and the gate electrode 54 of the transfer transistor are formed. After the formation, the first photoresist pattern PR1 exposing the epitaxial layer 51 of the photodiode region is formed, and a first ion implantation process is performed to form the first n on the semiconductor substrate 51 of the photodiode region. The second impurity region 56 is formed on the first n-type impurity region 55 by forming a second impurity region 55 and then performing a secondary ion implantation process at a lower energy condition than the first ion implantation process. Form. In an embodiment of the present invention, the primary ion implantation is performed by applying an energy of 180 KeV to an impurity of 1.12E12 concentration, and the secondary ion implantation process is performed by adding an energy of 80 KeV to an impurity of 0.7E12 concentration. As such, P ions implanted at 100 KeV during secondary ion implantation accumulate on the silicon surface in a subsequent heat treatment process.

Subsequently, the first photoresist pattern PR1 is removed, and an insulating film spacer 57 is formed on the sidewall of the gate electrode 54, as shown in FIG. 5B, and a portion of the photodiode region and the transfer transistor gate electrode 54 are removed. After forming the second photoresist pattern PR2 to be exposed, a third ion implantation process of ion implanting p-type impurities using the second photoresist pattern PR2 as an ion implantation mask is performed to form the p-type on the second n-type impurity region 56. The impurity region 58 is formed. Immediately after the third ion implantation process, a PNP type diode is formed.

Next, the second photoresist pattern PR2 is removed, an insulating film 59 is formed on the entire structure as shown in FIG. 5C, and a BPSG (premetal dielectric layer) is formed on the insulating film 59. boro phosphosilicate glass is deposited and heat treated for BPSG flow. In this heat treatment process, the NPNP diode is formed by the junction profile of the photodiode and the solubility difference in the oxide film of phosphorus (P) and boron (B). At this time, the n-type impurity region 61 formed on the epitaxial layer 51 surface exists as a thin film layer. In an embodiment of the present invention, a tetraethyl orthosilicate (TEOS) is deposited using low pressure chemical vapor deposition (LPCVD) to form the insulating layer 59.

The ion implantation process for forming the p-type impurity region 58 and the ion implantation energy for forming the first n-type impurity region 55 and the second n-type impurity region 56 in the above-described image sensor manufacturing process Properly select the desired doping profile. Therefore, a high energy high concentration ion implantation process is performed when the first n-type impurity region 55 is formed, and a low energy low concentration ion implantation process is performed when the second n-type impurity region 56 is formed. ). The reason for proceeding in this order is that if there are damages and defects caused by the ion implantation process, the solubility is changed to change the doping profile.

The present invention described above is capable of various substitutions, modifications, and changes without departing from the spirit of the present invention for those skilled in the art to which the present invention pertains, and the above-described embodiments and accompanying It is not limited to the drawing.

As described above, the present invention can effectively remove the dark current caused by the dangling bond on the surface of the silicon substrate, which occupies almost the majority of the components that generate the dark current, and can significantly improve the dark current characteristics. In this case, the chip can ensure stable operation even at high temperatures.

Claims (3)

In the image sensor manufacturing method comprising a NPNP photodiode as a light receiving means, A first step of ion implanting n-type impurities into a p-type semiconductor substrate of the photodiode region to form a first n-type impurity region; A second step of forming a second n-type impurity region on the first n-type impurity region; Forming a p-type impurity region on the second n-type impurity region; And A fourth step of forming an n-type impurity region on the p-type impurity region by performing heat treatment Image sensor manufacturing method comprising a. The method of claim 1, In the second step, The second n-type impurity region is formed by implanting ions at a lower concentration and lower energy than the first step. The method of claim 2, A fifth step of forming a BPSG on the semiconductor substrate after the third step; And said fourth step is a heat treatment for flowing said BPSG.