KR19990070329A - Microprocessor Application Development System - Google Patents

Abstract

The In-Circuit Emulator (ICE) of the present invention makes it possible to know the execution time of each instruction during a test operation of the program. When the application runs, the execution time of each instruction is measured by a counter, and the measured values are stored in the trace memory. By calculating this counter value, you can see the execution time of each command. For more accurate measurements, this can be done by adjusting the prescaler's dispensing value.

Description

MICRO PROCESSOR APPLICATION PROGRAM DEVELOPMENT SYSTEM

The present invention relates to an application development apparatus for a microprocessor or a microcontroller.

A device required for developing an application program of a micro controller unit (MCU) or a micro processor unit (MCU) is called an in-circuit emulator (ICE). The ICE device is provided with a trace function. The trace function is provided for debugging an application program. The trace function stores a program execution record so that a developer can check a program's progress and detect a program error. In other words, the trace function saves and shows the order in which each command of the program is executed to check how the program is executed and to check whether the program performs wrongly in a certain part.

1 is a block diagram of a hardware configuration for a trace function in a conventional ICE.

In order to perform the trace function, the ICE includes a trace address counter 10 and a trace memory 11.

When the application program is executed, a trace memory address provided from the trace address counter 10 is input to the trace memory 11, and a ROM address bus 12 is input to a memory area of a corresponding address. The ROM address entered through is stored. The contents can be checked by the developer so that the running application can be seen in what order. Thus, a typical trace function is performed to check the program for errors.

The trace address counter 10 increases the trace memory address by one while each instruction is fetched, and designates an address where an application program to be executed is stored.

The trace memory 2 is configured to disable the output enable signal nOE when the write enable signal nWE and the chip enable signal nCE are enabled. ) Stores the ROM address. The stored ROM address is output when the write enable signal nWE is disabled, and the chip enable signal nCE and the output enable signal nOE are enabled.

As described above, the conventional trace function stores only the ROM address in order to record and show the execution order of the program. Therefore, the conventional trace function does not measure the execution time of each instruction and does not measure an oscilloscope or a logic analyzer. The time was measured using the equipment. As such, the conventional trace function shows only a process of executing a program, so that it is not easy to measure a time when each instruction is actually executed.

Accordingly, it is an object of the present invention to provide a microprocessor application development system capable of measuring in real time information on the execution time of each instruction of a running application program as proposed to solve the above-mentioned problems.

1 is a block diagram of a hardware configuration for a trace function in a conventional ICE;

2 is a block diagram of a hardware configuration for trace functionality in an ICE in accordance with a preferred embodiment of the present invention; And

3 is a diagram illustrating an example of an execution time of an executed command.

* Description of the symbols for the main parts of the drawings *

10, 20: trace address counter 11, 21, 25: trace memory

26: prescaler 27: counter

According to a feature of the present invention for achieving the object of the present invention as described above, a microprocessor application development system comprising: first memory means for storing a ROM address in accordance with an execution operation of an application program; Address generating means for generating an address signal for storing the ROM address in the first memory means; Clock division means for dividing and outputting a reference clock signal having a predetermined period; A counter for counting in synchronization with a clock signal provided from the clock divider; A second memory means for inputting an address signal provided from said address generating means and storing count data provided from said counter in a corresponding memory area, corresponding to the execution time of unit instructions when the application program is executed; Count data counted by the counter is stored in the second memory means.

(Example)

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 is a block diagram of a hardware configuration for a trace function in an ICE according to a preferred embodiment of the present invention.

As shown in FIG. 2, an ICE according to an embodiment of the present invention includes a trace address counter 20, first and second trace memories 21 and 25, a prescaler 26, and a counter. (27) is provided. The input / output operations of the first and second trace memories 21 and 25 are the same as those of the trace memory 11 shown in FIG. 1.

The first trace memory 20 stores the ROM address input from the ROM address bus 22 according to the address provided from the trace address counter 20 as in the conventional art. The second trace memory 25 inputs and stores the output of the counter 27, the designation of the memory address being stored is provided from the trace address counter 20. The counter 27 counts the execution time of each instruction being executed and provides the input data of the second trace memory 25.

The prescaler 26 divides the reference clock CLK1 and provides the divided clock CLK2 as a count clock of the counter 27. The division of the reference clock CLK1 is related to the precision. If the division value is high, the accuracy of measuring the time for executing the instruction is inferior. For example, when the reference clock CLK1 is 20 MHz, the clock CLK2 input to the counter 27 is 10 MHz when the division value is 2, and 2 MHz when the division value is 10. The operation of storing the value counted by the counter 27 is stored when the write enable nWE1 and the chip enable nCE1 are enabled and the output enable signal nOE1 is disabled. When the storage is completed in the second trace memory 25, the host (not shown) reads the stored contents and converts the stored contents into time to inform the user of the time when each command was executed. The host generally refers to a user interface (UI). There are two ways for the host to tell the user when the command is executed. One method is to accumulate and display the time each command is executed as shown in FIG. 3A. Another way is to show the individual absolute time each command was executed as shown in FIG. 3B. The unit time is user selectable. That is, by adjusting the dividing value of the prescaler 26, the accuracy of the measured time may be set by selecting precision.

According to the present invention as described above, it is possible to check the execution time of the corresponding program by storing the operating time of each instruction in real time at the time of development of the application program of the microprocessor or microcontroller, thereby making it easier to develop the program. It's losing.

Claims (1)

In a microprocessor application development system: First memory means for storing a ROM address according to an execution operation of an application program; Address generating means for generating an address signal for storing the ROM address in the first memory means; Clock division means for dividing and outputting a reference clock signal having a predetermined period; A counter for counting in synchronization with a clock signal provided from the clock divider; A second memory means for inputting an address signal provided from said address generating means and storing count data provided from said counter in a corresponding memory area, And the count data counted by the counter is stored in the second memory means corresponding to the execution time of the unit instructions when the application program is executed.