KR19990065833A - A three-electrode surface discharge plasma display panel in which discharge characteristics are stabilized - Google Patents

Abstract

The present invention relates to a three-electrode surface discharge plasma display panel (hereinafter, referred to as a three-electrode surface discharge PDP)

In order to compensate for the problem that the edge of the screen is dark or the picture quality is lowered when the size of the screen is large, the conventional three-electrode surface discharge PDP has a problem in that, The discharge cells are formed in the discharge cells of the discharge cells in the discharge cells of the discharge cells. So that it can be maintained.

Description

A three-electrode surface discharge plasma display panel in which discharge characteristics are stabilized

Field of the Invention [0002] The present invention relates to a three-electrode surface discharge PDP, and more particularly, to a three-electrode surface discharge PDP in which auxiliary cells are formed in an area other than the effective area of the PDP panel in order to stabilize discharge characteristics.

The CRT (Cathode Ray Tube), which has been the main type of display means until now, scans the entire fluorescent screen with one electron gun, so the distance between the fluorescent screen and the electron gun must be large.

Due to the characteristics described above, the CRT is bulky, heavy, has difficulty in realizing a flat screen, and has difficulty in implementing a large screen.

In order to overcome the problems of the CRT described above, various display technologies such as LCD, flat panel, and plasma display panel (PDP), which are thin and light in weight, and enable large screen realization are actively researched.

In the PDP, a discharge gas is injected between a thin front substrate and a rear substrate on which a plurality of transparent electrodes are formed, and ultraviolet rays generated when a voltage is applied between the transparent electrodes to cause a discharge, The phosphor is made to emit light, and each of the light emitting points made up of the electrode and the phosphor is formed as a cell separated into barrier ribs and driven independently of each other, and as a whole has a thin and wide plane matrix structure, It is easy to realize a large screen, and it has a merit of being a new display means which can overcome the limitation of a CRT because it has an advantage of being able to exclude color blurring and deterioration of focus.

The PDP is classified into a DC PDP driven by a DC voltage and an AC PDP driven by a sinusoidal AC voltage or a pulse voltage according to the driving voltage. In the following, only the AC PDP will be discussed.

FIG. 1 shows a structure of a color three-electrode surface discharge PDP having a resolution of 640 × 480 which is the most frequently used among AC PDPs.

480 scan electrodes Y _{1 to} Y ₄₈₀ and 480 sustain electrodes Z _{1 to} Z ₄₈₀ are alternately arranged one after the other and 1920 address electrodes A _{1 to} A ₁₉₂₀ are arranged in parallel the scan electrodes and the sustain electrodes _{(Y 1 ~Y 480, Z 1} ~Z 480) and are arranged so as to be perpendicular across the predetermined space, the 480 scan electrodes and sustain electrodes _{(Y 1 ~Y 480, Z 1} ~ Z ₄₈₀₎ and for each crossing of the 1920 address electrodes (a ₁ ~A ₁₉₂₀₎ cell is formed by a full-screen configuration 1920 × 480 gae R (Red), G (Green ), B (Blue) cells of a matrix And a color three-electrode surface discharge PDP having a resolution of 640 x 480.

The 480 sustain electrodes Z ₁ to Z ₄₈₀ are commonly connected to the common sustain electrode Z.

FIG. 2 shows a general driving circuit of the three-electrode surface discharge PDP shown in FIG.

Reference numeral 10 denotes a plasma display panel in which scan electrodes and sustain electrodes Y _{1 to} Y ₄₈₀ and Z _{1 to} Z ₄₈₀ and address electrodes A _{1 to} A ₁₉₂₀ described in FIG. 1 are arranged so as to be orthogonal to each other, Surface discharge PDP.

Reference numeral 20 is connected to the scanning electrodes (Y ₁ ~Y ₄₈₀₎ of the three-electrode surface discharge PDP (10) represents a Y driver for supplying a driving pulse to the scan electrodes (Y ₁ ~Y _480),

Reference numeral 30 denotes a Z driver connected to the common sustain electrode Z of the three-electrode surface discharge PDP 10 to supply drive pulses to the sustain electrodes Z ₁ to Z ₄₈₀ through the common sustain electrode Z ,

Reference numeral 40 is connected to the address electrodes A _{1 to} A ₁₉₂₀ of the three-electrode surface discharge PDP 10 and selectively connects the address electrodes A _{1 to} A ₁₉₂₀ according to a digital image signal corresponding to each cell And an address driver for supplying a driving pulse,

Reference numeral 50 denotes a digital camera which digitizes an externally input analog image signal IMAGE to output a digital image signal and outputs the digital image signal and various external inputs such as a clock CLK, a horizontal synchronizing signal HS, a vertical synchronizing signal VS ) To generate various control signals and drive pulses to supply the Y driving unit 20, the Z driving unit 30, and the address driving unit 40.

3, in which a cross-sectional view of a cell located at an i-th row and a j-th column of the three-electrode surface discharge PDP 10 is shown (however, the front substrate is rotated by 90 °) Then,

First, mutually parallel i-th scan electrode (Y _i) and the i-th sustain electrode (Z _i) and are formed on one surface of the front substrate 11 of the display surface of the image, the scan electrodes (Y _i) and the sustain electrode (Z _i) limiting the discharge current during the discharge on and there is a dielectric layer 12 is formed to facilitate the generation of wall charges, the scan electrodes (Y _i) from the sputtering (sputtering) takes place during the discharge above the dielectric layer 12 And a magnesium oxide (MgO) protective film 13 for protecting the sustain electrode Z _i and the dielectric layer 12 are formed.

A _j- th address electrode A _j is formed on a surface of the rear substrate 14 opposed to the front substrate 11 facing the front substrate 11 with a predetermined distance therebetween, electrode (a _j) to prevent inter-cell color mixture on both sides of the first and second partition walls, and secured to the discharge space (15a, 15b) is, and is formed in the parallel to the address electrode (a _j), respectively, and the address electrode (a _j of ) And a part of the first and second barrier ribs 15a and 15b is coated with a phosphor 16, and a discharge gas is injected into the discharge space.

The basic driving principle of each cell of the above-configured three-electrode surface discharge PDP is as follows.

First, a magnesium oxide above the scan electrodes (Y _i) and the address electrode (A _j) by applying a predetermined voltage between the scan electrodes (Y _i) and the address electrode (A _j) up the address discharge scanning electrodes (Y _i) between Wall charges of opposite polarities are respectively generated on the surface of the protective film 13 and the surface of the phosphor 16 on the address electrode A _j . At this time, wall charges having the same polarity as the wall charges generated on the surface of the phosphor 16 on the address electrode A _j are also generated on the surface of the magnesium oxide protective film 13 on the sustain electrode Z _i .

Then, the scan electrodes (Y _i) and the sustain electrode (Z _i) of when the scan electrode is a predetermined voltage of the wall charges with the same polarity (Y _i) and the sustain electrode (Z _i) generated by the address discharge before directly between A sustain discharge occurs.

When the sustain discharge occurs, an electric field is generated in the discharge space to accelerate the minute electrons in the discharge gas. When the accelerated electrons collide with the neutral particles of the discharge gas, the neutral particles are ionized into electrons and ions, The electrons are also accelerated by the electric field to participate in the collision with the neutral particles, whereby the neutral particles are ionized to electrons and ions at an accelerated rate (Electron Avalanche), and the discharge gas is brought into a plasma state, And when the vacuum ultraviolet ray excites the phosphors 16 to generate visible light, cells located in the i-th row and the j-th column are displayed.

Thereafter, when the process of applying the alternating voltage between the scan electrode Y _i and the sustain electrode Z _i is repeated, every time the voltage between the scan electrode Y _i and the sustain electrode Z _i is changed, Discharge is generated and the emission of the phosphor 16 is maintained by the ultraviolet rays generated at this time, so that the display of the cells located in the i-th row and the j-th column is maintained.

However, in the conventional three-electrode surface discharge PDP, the driving pulses applied to the cells far from the input terminal to which the driving pulses are applied due to the voltage drop due to the load action of the cells connected in series to the respective electrode lines, The voltage is lower than the driving pulse applied to the cell closer to the gate electrode.

For such a reason, when the screen size of the conventional three-electrode surface discharge PDP is large, the edges of the screen are dark or the picture quality is degraded.

SUMMARY OF THE INVENTION The present invention has been conceived to solve the problems of the prior art described above, and it is an object of the present invention to provide a plasma display apparatus, in which a file raster cell is formed along the periphery of a screen outside the display area of an actual PDP The present invention provides a three-electrode surface discharge PDP capable of uniformly and stably maintaining the discharge characteristics inside a panel by acting as an auxiliary priming for assisting the formation of wall charges of cells inside the panel .

1 is a view showing the structure of a conventional three-electrode surface discharge plasma display panel (hereinafter, referred to as a three-electrode surface discharge PDP)

2 is a view showing a driving circuit of a conventional three-electrode surface discharge PDP,

FIG. 3 is a cross-sectional view showing the structure of one cell shown in FIG. 2,

4 is a view showing a structure of a three-electrode surface discharge PDP of the present invention,

5 is a power supply circuit for generating a voltage to be applied to the pilot electrodes of the present invention,

DESCRIPTION OF THE REFERENCE NUMERALS

410: panel frame indicating the boundary of the screen

420: pilot scan electrode

430: pilot sustaining electrode

440: pilot address electrode

According to an aspect of the present invention,

A plasma display panel comprising: a transparent front substrate; a rear substrate disposed parallel to the front substrate with a predetermined space therebetween; X first electrodes formed on a lower surface of the front substrate; Y address electrodes crossing the first and second electrodes at a right angle with a predetermined space therebetween, and a plurality of Y address electrodes crossing at right angles to the first and second electrodes on an upper surface of the rear substrate, 1, and a cell formed on each of the intersections of the second electrode and the address electrode to form a screen having an X-Y matrix structure. In the three-electrode surface discharge PDP,

Cells in the (X- alpha) x (X- beta) region of the central portion of the XxY matrix structure are cells made of fluorescent materials and emit light, and cells outside the (X- And the peripheral region is formed of cells which are formed without the fluorescent material and do not emit light.

On the other hand, a double or triple voltage circuit for driving the cells in the peripheral region formed without the fluorescent material may be added.

Three-Electrode Surface Discharge Each cell of the PDP is discharged more easily when surrounding cells are turned on than when the surrounding cells are turned off because of the discharge characteristic.

That is, when a large number of cells are turned on, a favorable condition to turn on due to the wall charge effect or discharge delay characteristic due to the surrounding cells is formed. However, many surrounding cells are turned off If it is present, a voltage higher than the set reference voltage should be applied, but the discharge will be ON.

According to the present invention, a pilot scan electrode and a pilot sustain electrode are formed on a front substrate in parallel with a scan electrode and a sustain electrode in a display region, i.e., an invisible region outside a region displayed on a screen, And a pilot address electrode is formed on the rear substrate in parallel with the address electrode to form a file rutsel cell at a point where the pilot scan electrode and the pilot sustain electrode intersect with the pilot address electrode, (ON) state regardless of the ON state or the OFF state of the on-screen display region, thereby facilitating the generation of wall charges in the display cells of the on-screen display region.

At this time, the structure of the file rutsel cell is similar to that of the display cell shown in Fig. 3, but does not emit light due to the absence of the phosphor, and the file rutelles are masked by an external chassis or the like so as not to be seen from the outside.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

4 is a view showing a structure of a three-electrode surface discharge PDP of the present invention.

Reference numeral 410 in the drawing is at the intersection of the scan and sustain electrodes _{(Y 1, Y 2, ...} , Y 480 , and _{Z 1, Z 2, ...,} Z 480) and the address electrode _{(A 1, A 2 ,, A} 1920) And is a panel frame indicating a boundary of a screen formed by arranging the display cells to be formed in a matrix form.

Reference numeral 420 denotes a pilot scan electrode formed on the front surface of the front substrate in parallel with the scan electrodes on the upper and lower sides of the panel frame 410.

Reference numeral 430 denotes a pilot sustaining electrode formed on the surface of the front substrate in parallel with the scan electrodes on the upper and lower sides of the panel frame 410.

Reference numeral 440 denotes a pilot address electrode formed on the left and right sides of the panel frame 410 on the surface of the rear substrate in parallel with the address electrodes.

At this time, a pilot cell is formed at each intersection of the pilot scan electrode, the pilot sustain electrode, and the pilot address electrode, and is driven to be always on, thereby assisting the display cells in the screen to easily discharge.

On the other hand, the power supply circuit for supplying the voltage to be applied to the pilot electrodes as described above can be constituted by a back-pressure circuit as follows, so that the file cells can easily generate wall charges even at a low driving voltage.

5 is a circuit diagram showing the back pressure circuit.

Referring to the drawings, a power supply circuit for generating a voltage to be applied to pilot electrodes of the present invention includes:

A first transistor Q ₁ having a drain terminal connected to a power supply V _in and a second transistor Q ₁ having a drain terminal connected to a source terminal of the first transistor Q ₁ . and a transistor (Q ₂₎ and said second transistor is a drain (drain) terminal connected to the source terminal of the (Q ₂₎ and the source terminal is the third transistor is connected to ground (Q _3),

A first diode D ₁ having an anode terminal connected to the common terminal of the power source V _in and a drain terminal of the first transistor Q ₁ and a cathode terminal connected to the output terminal V _out , A third capacitor C ₃ connected between the cathode terminal of the first diode D ₁ and the ground and a third capacitor C ₃ connected between the source terminal of the first transistor Q ₁ and the drain terminal of the second transistor Q ₂ , A second diode D ₂ having an anode terminal connected to a contact,

A first capacitor C ₁ connected between a cathode terminal of the first diode D ₁ and a cathode terminal of the second diode D ₂ and a second capacitor C ₁ connected to the cathode terminal of the second diode D ₂ , this and connected and a second capacitor (C ₂₎ the other end connected to the common connection of the drain terminal of the source terminal and the third transistor (Q ₃₎ of the second transistor (Q _2), the second diode (D ₂₎ A fourth transistor Q ₄ having a drain terminal connected to the cathode terminal of the first transistor Q ₁ and a source terminal connected to the ground,

A first drive unit 510, and a gate terminal of the second transistor (Q ₂₎ which is connected to the gate (gate) terminal of the first transistor (Q ₁₎ controlling a switching operation of the first transistor (Q ₁₎ It is connected to the switching operation of the second driving unit (520) and, connected to the gate terminal of the third transistor (Q _3), the third transistor (Q ₃₎ to control a switching operation of the second transistor (Q ₂₎ It is connected to the gate terminal of the third actuating part 530 and the fourth transistor (Q ₄₎ for controlling the and the fourth driving section 540 for controlling a switching operation of the fourth transistor (Q _4), a timing program And a control unit 550 for controlling the timings of the first, second, third and fourth driving units 510, 520, 530, 540.

In operation of the power supply circuit constructed as described above,

The second from the step 1, the first and second and third transistors (Q _1, Q _2, Q ₃₎ is turned off (OFF) and the fourth transistor (Q ₄₎ only turned on (ON) the power (V _in) first diode (D _1), a first capacitor (C _1), the fourth current to ground through the transistor (Q ₄₎ sequentially flows through the first case is charged by the voltage V _in a capacitor (C _1).

In the second step, the second transistor Q ₂ and the fourth transistor Q ₄ are turned off, the first transistor Q ₁ and the third transistor Q ₃ are turned on, _a current flows through the first transistor Q ₁ , the second diode D ₂ , the second capacitor C ₂ and the third transistor Q ₃ sequentially to the ground through the second capacitor C ₂ ) is charged to V _in .

After the second step, the output voltage V _out becomes 2 x V _in, which is the sum of the voltages charged in the first and second capacitors.

Finally, in the third step, the third transistor Q ₃ and the fourth transistor Q ₄ are turned off, the first transistor Q ₁ and the second transistor Q ₂ are turned on, 3 to make the voltage at the drain terminal of the transistor (Q ₃₎ to the supply voltage (V _in).

Wherein said V _in voltage between after the step 3, the drain terminal of the ground of the third transistor (Q ₃₎ and said second capacitor (C ₂₎ the charging voltage to the V _in, and the first capacitor (C ₁₎ is the voltage V _in is connected in series, charging the output voltage (V _out) is a 3 × V _in.

By using the above-described back-pressure circuit, even a low driving voltage can obtain a high voltage required by the pile cell cells.

According to the present invention, by forming a file cell of the triple-electrode surface discharge PDP outside the screen area and stabilizing the discharge characteristics of the cells in the screen area, uniform picture quality can be obtained even if the screen is enlarged.

In addition, wall charges can be easily formed due to the auxiliary role of the file data cell, so that the driving voltage can be lowered.

Claims (3)

A plasma display panel comprising: a transparent front substrate; a rear substrate disposed parallel to the front substrate with a predetermined space therebetween; X first electrodes formed on a lower surface of the front substrate; Y address electrodes crossing the first and second electrodes at a right angle with a predetermined space therebetween, and a plurality of Y address electrodes crossing at right angles to the first and second electrodes on an upper surface of the rear substrate, (Hereinafter, referred to as a three-electrode surface discharge PDP) formed of cells each formed at an intersection of a first electrode and a second electrode and an address electrode and having an X.times.Y matrix structure, Cells in the (X- alpha) x (X- beta) region of the central portion of the XxY matrix structure are cells made of fluorescent materials and emit light, and cells outside the (X- Wherein the peripheral region comprises cells which are formed without a fluorescent substance and do not emit light. The method according to claim 1, And a back-pressure circuit for driving the cells in the peripheral region formed without the fluorescent material. Cells formed at each intersection point of X first and second electrodes and Y address electrodes vertically crossing the first and second electrodes with a predetermined space therebetween are connected to a three-electrode In a method of driving a surface discharge PDP, (X-α) × (X-β) region of the X × Y matrix structure and cells other than the (X-α) × (X-β) region are not displayed on the screen And driving the PDP so as to be always in an ON state in order to assist the formation of wall charges of the screen area cells in the center part.