KR19990015647A - Time delay correction device and method - Google Patents

Abstract

The present invention converts an unspecified digital signal output from the DSP into an analog signal by the clock of the clock generator, and transmits the analog signal fed back by the transmitted analog signal according to the clock adjusted by the clock adjuster. The time that outputs the adjusted clock by adjusting the clock of the clock generator based on the calculated delay time after calculating the delay time by converting the signal to digital signal value transmitted through DSP and digital signal value by feedback. A delay correction device and method were implemented.

Description

Time delay correction device and method

TECHNICAL FIELD The present invention relates to a system using an analog / digital converter and a digital / analog converter, and more particularly, to an apparatus and method for correcting a signal delay occurring between an analog / digital converter and a digital / analog converter.

In general, in a system using an analog / digital converter (A / D converter) and a digital / analog converter (D / A converter), clocks having the same period are supplied to the A / D converter and the D / A converter.

As shown in FIG. 1, the apparatus for comparing transmission and reception signals using the clock of the same period includes a digital processor (DSP) 10, a D / A converter 12, and an IF / RF unit 14, 16. ), An A / D converter 18 and a clock generator 20.

In the system having the above-described configuration, in particular, when there is a feed-back pass 22, the A / D converter 18 and the D / A converter 12 may use a clock having the same period generated by the clock generator 20. Authorized.

At this time, since the signal delay in the feed-back pass 22 is measured as an integer multiple of the clock, it is difficult to accurately consider signal delay in a system having the above-described configuration.

That is, in the case where the control signal is calculated by the DSP 10 by comparing the signal transmitted through the IF / RF unit 14 with the signal measured by the IF / RF unit 16 through the feed-back path 22. Correct control is difficult because the measured signal has a high probability that it is not a measured value for the transmitted signal.

Accordingly, an object of the present invention to solve the above problems is to provide a time delay correction apparatus and method for supplying a clock having the same period to the analog / digital converter and the digital / analog converter to prevent inaccurate measurement of signal delay have.

An object of the present invention is to adjust the clock supplied to the analog / digital converter by using a clock supplied to the digital / analog converter to provide a clock that can accurately measure the time delay to improve the performance of the system and In providing a method.

1 is a block diagram of a conventional apparatus for comparing transmission and reception signals using the same clock.

2 is a block diagram of a device for correcting a time delay of a transmission and reception signal according to an embodiment of the present invention.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. First, in adding reference numerals to the components of each drawing, it should be noted that the same reference numerals are used for the same components, even if displayed on different drawings.

As shown in FIG. 2, the apparatus for correcting time delay of transmission and reception signals according to an embodiment of the present invention has a configuration in which a clock adjusting unit 32 is added to the conventional configuration.

The DSP 30 calculates the degree to which the signal is delayed by comparing the digital signal output to the D / A converter 12 and the digital signal input from the A / D converter 18. The clock adjusting unit 32 adjusts the clock according to the delay degree calculated under the control of the DSP 30.

Hereinafter, an embodiment according to the present invention will be described in detail with reference to the configuration of FIG. 2.

The DSP 30 generates an unspecified digital signal and applies it to the D / A converter 12 to measure the signal delay. The applied digital signal is converted into an analog signal by the D / A converter 12 and applied to the IF / RF unit 14. The applied analog signal is transmitted through the IF / RF unit 14.

The transmitted analog signal is applied to the IF / RF unit 16 through a feed-back path 22, and the applied analog signal is transmitted to the A / D converter 18.

The A / D converter 18 is converted into a digital signal by a clock applied from the clock adjuster 32 and applied to the DSP 30.

The DSP 30 compares the value of the digital signal output to the D / A converter 12 with the value of the digital signal applied from the A / D converter 18. At this time, the clock supplied to the D / A converter 12 is changed little by little.

On the other hand, the DSP 30 controls the clock adjusting unit 32 to adjust the clock having the largest value among the prepared results, and then supplies the clock to the A / D converter 18.

That is, the degree of delay of the signal is calculated by comparing the digital signal value input to the D / A converter 12 and the digital signal value output from the A / D converter 18 through the DSP 30. Meanwhile, the D / A converter 12 and the A / D converter 18 are adjusted by adjusting the clock used for the A / D converter 18 to a value capable of accurately measuring the signal delay according to the calculated value. You can accurately compare the input and output signals.

As described above, the present invention finds the degree of delay of the signal by comparing the value of the input digital signal of the D / A converter and the value of the output digital signal of the A / D converter. By adjusting the clock used, it is easy to compare the signals input and output to the D / A converter and the A / D converter, thereby improving the performance of the system.

Claims (2)

In a system using an analog / digital converter and a digital / analog converter, A clock generator for generating a clock; A digital / analog converter for converting a digital signal into an analog signal by the clock; An analog / digital converter for converting an analog signal into a digital signal by an adjusted clock; A digital signal processor for outputting an unspecified digital signal to the digital / analog converter and calculating a delay time by comparing the digital signal value applied from the analog / digital converter and the output digital signal; And a clock adjusting unit which adjusts a clock output from the clock generator based on the delay time calculated by the digital signal processor and outputs the clock to the analog / digital converter. A method of correcting time delay in a system using an analog / digital converter and a digital / analog converter, A first process of converting an unspecified digital signal into an analog signal by a clock and transmitting the analog signal; A second process of converting the analog signal feed-backed by the transmitted analog signal into a digital signal by an adjusted clock; A third process of calculating a delay time by comparing the digital signal value of the first process and the digital signal value of the second process; And a fourth process of adjusting the clock of the first process based on the delay time calculated in the third process and outputting the adjusted clock of the second process.