KR19990005601A - The address distance calculation method in the frame memory - Google Patents

Abstract

An address distance calculating method in a frame memory used in a motion compensation apparatus is disclosed. In this address distance calculation method, when the reference point of the predicted macroblock is located in one of the blocks b0 and b2 in one of the macroblocks MB0 to MB2 and MB4 to MB6, CA [4: 3 Is incremented by 1 and CA [7: 5] is incremented by 1, CA [4: 3] is decremented by 1, and when the reference point is located in one of the blocks b1 and b3, CA [4: 3] is incremented by 1 when it is located in one of the blocks b0 and b2 and RA [9: 0] is incremented by 1 when it is located in one of the blocks b1 and b3, 5] is reduced by 3, CA [4: 3] is decremented by 1 to calculate the horizontal address distance, and the reference point of the predicted macroblock is divided into blocks b0 , b1), CA [4: 3] is incremented by 2 and CA [4: 3] is decremented by 2 when located in one of the blocks b2 and b3, Lt; RTI ID = 0.0 > (b0, b1) < / RTI & The CA [4: 3] is incremented by 2, and if it is located in one of the blocks b2 and b3, the RA [9: 0] is increased by 15 and CA [4: 3] is decreased by 2 to calculate the vertical address distance .

Description

The address distance calculation method in the frame memory

The present invention relates to a frame memory for a motion compensation apparatus and, more particularly, to a frame memory for a motion compensation apparatus, which is capable of generating an address for reading a macroblock predicted by motion compensation on a block basis, The present invention relates to an address distance calculating method for calculating an address of a block adjacent in a horizontal or vertical direction according to the position of a reference point.

The motion compensation technique used in MPEG (Moving Picture Experts Group) -2 standard is to reduce temporal redundancy by estimating and compensating for motion between two temporally adjacent pictures in units of macroblocks. That is, in the motion estimation and compensation process, a motion vector, which is information on motion of an object, is detected by comparing an adjacent image with a current image, and the current image is predicted using the motion vector.

In an MPEG-2 video encoder using such a motion compensation technique, a P picture performs forward motion compensation based on an I picture or a P picture of a previous image with respect to a current image, The best one of the motion compensation blocks obtained by performing the forward motion compensation, the backward motion compensation and the interpolation motion compensation based on the I picture or the P picture of the previous image and the I picture or the P picture of the next image is selected.

The frame memory is used to store an I picture or P picture of a previous picture, which is a reference picture for motion compensation, and an I picture or P picture of the next picture. In the MPEG-2 video decoder, the decoding order and the display order are different from each other, and the decoded picture is temporarily stored and then used to read out in accordance with the display order.

However, since the frame memory has a capacity to store video data of at least three frames in accordance with the distance (M) between the I picture and the P picture, or between the P picture and the P picture, Not only becomes a factor for raising the price of the decoder, but also increases the delay time until display after the decryption is completed.

SUMMARY OF THE INVENTION Accordingly, the present invention has been made to solve the above-mentioned problems occurring in the prior art, and it is an object of the present invention to provide an image decoding apparatus, In the case of generating an address for reading a macroblock predicted by motion compensation on a block unit basis, a frame memory for storing a horizontal Or an address distance calculating method for calculating an address of a block adjacent in the vertical direction.

According to an aspect of the present invention, there is provided an address distance calculating method, wherein one frame is composed of a plurality of RAS boxes having a separate field structure, and the RAS box includes eight macroblocks of an 8 macroblock * 1 macroblock format MB0 to MB7), when a row address RA [9: 0] and a column address CA [7: 0] are generated to read a macroblock predicted by motion compensation on a block-by-block basis, The reference point of the predicted macroblock may be one of the blocks b0 and b2 in one of the macroblocks MB0 to MB2 and MB4 to MB6 to calculate the horizontal address distance of the horizontally adjacent block. If CA_ [4: 3] is one, incrementing CA [4: 3] by 1 to calculate the horizontal address distance; When the reference point is located in one of the blocks b1 and b3 in one of the macroblocks MB0 to MB2 and MB4 to MB6, CA [7: 5] is incremented by 1 and CA [4: : 3] by 1 to calculate the horizontal address distance; If the reference point is located in one of the blocks b0 and b2 in one of the macroblocks MB3 and MB7, the step of calculating the horizontal address distance by increasing CA [4: 3] ; And when the reference point is located in one of the blocks b1 and b3 in one of the macroblocks MB3 and MB7, RA [9: 0] is incremented by 1 and CA [7: 5] And decreasing CA [4: 3] by one to calculate the horizontal address distance, and in order to calculate a vertical address distance for a block vertically adjacent to any block, the predicted macroblock Calculating the vertical address distance by incrementing CA [4: 3] by 2 when the reference point of the macroblocks is located in one of the blocks b0 and b1 in one of the macroblocks MB0 to MB6 ; Calculating the vertical address distance by decrementing CA [4: 3] by 2 if the reference point is located in one of the blocks b2 and b3 in one of the macroblocks MB0 to MB6; ; Calculating the vertical address distance by incrementing CA [4: 3] by 2 if the reference point is located in one of the blocks b0, b1 in the macroblock MB7; And when the reference point is located in one of the blocks b2 and b3 in the macroblock MB7, RA [9: 0] is increased by 15, CA [4: 3] And a step of computing

1 is a diagram showing a structure of a frame memory adopted in the present invention,

FIG. 2 is a diagram illustrating a scheduling procedure of the frame memory shown in FIG. 1;

3 is a diagram illustrating an example of a RAS box setting method for one frame used in the present invention in the frame memory shown in FIG.

FIG. 4 is an enlarged view of one RAS box and an adjacent RAS box in FIG. 3,

5 is a flowchart for explaining a horizontal address distance calculation method according to the present invention,

6 is a flowchart for explaining a vertical address distance calculation method according to the present invention,

DESCRIPTION OF THE REFERENCE NUMERALS

100: frame memory 200: memory control unit

100-1 to 100-4: first to fourth frame storing areas

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 illustrates a structure of a frame memory employed in the present invention. The frame memory 100 includes a memory controller (not shown) for reading data for a restored image data writing operation, a data reading operation for motion compensation, and a display And an SDRAM (Synchronous-DRAM) having a burst length of 8 is used as an example. The frame memory 100 has two memory banks of bank 1 and bank 2. Bank 1 has first and second frame storage areas 100-1 and 100-2 and bank 2 stores third and fourth frames There are regions 100-3 and 100-4. Here, the first to fourth frame storage areas 100-1, 100-2, 100-3, and 100-4 each have a capacity capable of storing one frame of pixel data, and the first to fourth frame storage areas 100-1, 100- 2,100-3, and 100-4 each have 1,024 row addresses, and have a column address of 256 words (where one word is 8 bits). In one address, eight Y pixels, two Cr pixels, and two Cb pixels, a total of 12 pixel data are stored. Here, 1,024 row addresses means the number of the RAS box. And, the column address of 256 words comes out of 8 macroblocks per one RAS box * 32 pixels (= 256 pixels) per macroblock.

On the other hand, the actual physical row address of the frame memory (100) (physical row address) is the first to fourth frame storage area (100-1 ~ 100-4), each with respect to 000 _H ~ _H 3FF, 7FF 400 _H ~ _H , 800 _H to BFF _H , and C00 _H to FFF _H. However, the first to fourth frame storing areas 100-1 to 100-4 are independent from each other, and the second and fourth frame storing areas 100-1 to 100-4 correspond to the macroblocks located at a predetermined row address in the first frame storing area 100-1. The macroblocks in the third frame storage areas 100-2 and 100-3 have the same row address. As described above, the row addresses in the first to third frame storage areas 100-1 to 100-3 are referred to as virtual row addresses. 2, an address used to convert a virtual row address in a corresponding storage area in which a reference image is located to a physical row address is stored in the frame memory 100, It is called an offset address (frame offset address), and it is RA [11:10]. That is, if RA [11: 10] is '00', the first frame storage area 100-1, the second frame storage area 100-2 if it is 01, -3), and if it is '11', it indicates the fourth frame storage area 100-4.

Here, the first and second frame storage areas 100-1 and 100-2 are used to store the reconstructed I-picture or the motion-compensated P-picture image data as a reference image for motion compensation, The third frame storage area 100-3 is used for storing the motion compensated B picture image data and the fourth frame storage area 100-4 is used for storing the encoded bit stream inputted to the image decoder in a predetermined bit unit . ≪ / RTI >

FIG. 2 shows a scheduling procedure of the frame memory 100 shown in FIG. 1, in which the decoding order is I, P, B, B, P, B, B, P, B, B, P, B, P, B, B, P, B, B, ..., and the display order is I, B, B, P, B, , And the display latency is two pictures. Here, the underlined portion indicates the currently decoded picture, the arrow indicates the picture referred to for motion compensation, and the storage area to which 'D' is added indicates that the image data is being read out for display.

FIG. 3 shows an example of a RAS box setting method for one frame used in the frame memory 100 shown in FIG. 1. For example, when one frame is composed of 1,920 pixels * 1,088 pixels, 15 frames RAS box * 68 RAS boxes, 1,020 RAS (Row Address Strobe) boxes in total. That is, the number of the RAS box becomes the row address (RA [9: 0]) of the frame memory 100. Here, one RAS box is composed of 8 macroblocks * 1 macroblock, total 8 macroblocks MB0-MB7. Each macroblock is divided into four blocks b0 to b3 in the case of a luminance (Y) block, and each of the blocks b0 to b3 is generally divided into eight boxes of a 2 * 4 or 1 * 8 structure Each box in the box of 2 * 4 structure is divided into 8 pixels of 4 * 2 structure, and each box in the box of 1 * 8 structure consists of 8 pixels of 8 * 1 structure. At this time, the column address CA [7: 0] of the frame memory 100 is a column address CA [7: 5] indicating the position of a macroblock existing in the RAS box located at the column address, And a column address CA [4: 3] indicating the position of a block existing in the block and a column address CA [2: 0] indicating the position of the box in the block.

FIG. 4 is an enlarged view of one RAS box and an adjacent RAS box in FIG. 3, wherein the hatched portion indicates an excellent field (or an upper field), and the non hatched portion indicates an odd field (or a lower field). That is, the RAS box used in the present invention has a separate field structure.

FIG. 5 is a flowchart for explaining a horizontal address distance calculation method according to the present invention. The horizontal address distance calculation method includes a reference point calculation step of a predicted macroblock MB (step 51), a horizontal address distance (Steps 52 through 58).

6 is a flowchart for explaining a vertical address distance calculation method according to the present invention. The vertical address distance calculation step includes a reference point calculation step of a predicted macroblock (MB) (step 61), a vertical address distance (Steps 62 to 68).

Next, an address distance calculating method according to the present invention will be described with reference to Figs. 5 and 6. Fig.

In the frame memory 100, addresses necessary for reading a macroblock predicted from a start address and a motion vector of the current macroblock include a field slice structure, a half-pixel compensation presence, a frame map structure, And the position of the reference point. Here, the reference point indicates the position of the leftmost pixel in the upper part of the predicted macroblock. On the other hand, when the predicted macroblock is read on a block-by-block basis, addresses required to read the blocks b0, b1, b2 and b3 depend on the position of the reference point. At this time, the horizontal distance of the address for calculating the address necessary for reading the block b1 from the block b0 or reading the block b3 from the block b2 is called the horizontal address distance HAD), the vertical distance between the addresses for calculating the address required to read the block b2 from the block b0 or the address required for reading the block b3 from the block b1 is referred to as a vertical address distance Vertical Address Distance (VAD). At this time, HAD and VAD are different depending on whether the RAS line is caught in the corresponding RAS box, the CAS line is caught, or both the RAS line and the CAS line are caught.

Let's take a look at HAD.

First, a reference point of a macroblock predicted by motion compensation is calculated based on a slice position, a macroblock position and a motion vector of a macroblock used for prediction in operation 51, The macroblock and the block in which the reference point of the reference point is located (steps 52, 53, and 56). Each case according to the position of the reference point will be described as follows.

First, a macroblock MB _{i in} which a reference point of a predicted macroblock is located in an arbitrary RAS box RAS _i is one of MB ₀ , MB ₁ , MB 2, MB 4, MB 5 and MB 6, When the block blk _i is one of the blocks b0 and b2, only the CAS line is taken without taking the RAS line. At this time, for the block (hblk _{i + 1} ) horizontally adjacent to the block blk _i , HAD

blk _{i + 1} = hblk _i + 1

. Therefore, in the case of reading the block (hblk _{i + 1} ), CA [4: 3] may be incremented by 1 for the column address CA [7: 0] of the block blk _i (Step 54).

Second, a macroblock MB _{i in} which a reference point of a predicted macroblock is located in an arbitrary RAS box RAS _i is one of MB ₀ , MB ₁ , MB 2, MB 4, MB 5, and MB 6, When the block blk _i is one of the blocks b1 and b3, only the CAS line is occupied without taking the RAS line. At this time, for the block (hblk _{i + 1} ) horizontally adjacent to the block blk _i , HAD

hblk _{i + 1} = blk _i - 1

MB _{i + 1} = MB _i + 1

. Thus block (hblk _{i + 1)} column address CA [7: 0] of the block (blk _i) if the character reading: increasing one of [5 7], CA CA with respect to: reducing the [43] 1 (Operation 55).

Third, a macroblock MB _{i in} which a reference point of a predicted macroblock is located in an arbitrary RAS box RAS _i is one of MB 3 and MB 7, and a block blk _i in which a reference point is located in the macroblock, In the case of one of these blocks b0 and b2, the RAS line is not caught but only takes the CAS line. At this time, for the block (hblk _{i + 1} ) horizontally adjacent to the block blk _i , HAD

hblk _{i + 1} = blk _i + 1

. Therefore, in the case of reading the block (hblk _{i + 1} ), CA [4: 3] may be incremented by 1 for the column address CA [7: 0] of the block blk _i (operation 57).

Fourth, a macroblock MB _{i in} which a reference point of a predicted macroblock is located in an arbitrary RAS box RAS _i is one of MB 3 and MB 7, and a block blk _i where a reference point is located in the macroblock, In the case of one of the blocks b1 and b3, the RAS line and the CAS line are both occupied. At this time, for the block (hblk _{i + 1} ) horizontally adjacent to the block blk _i , HAD

hblk _{i + 1} = blk _i - 1

MB _{i + 1} = MB _i - 3

RAS _{i + 1} = RAS _i + 1

. Therefore, when the block (hblk _{i + 1} ) is to be read, the row address RA [9: 0] of the block blk _i is incremented by 1 and CA [7: 5] , And decreasing CA [4: 3] by 1 (Step 58).

Next, let's take a look at VAD.

First, a reference point of a macroblock predicted by motion compensation is calculated based on a slice position, a macroblock position and a motion vector of a macroblock used for prediction in operation 61, The macroblock and the block in which the reference point of the reference point is located (Steps 62, 63 and 66). Each case according to the position of the reference point will be described as follows.

First, one of any RAS box (RAS _i) of the MB0 ~ MB6 macroblock reference point is located macroblock of (MB _i) predicted in, and the block (blk _i) to the reference point is the location in the macro block In the case of one of the blocks b0 and b1, the RAS line is not caught but only takes the CAS line. At this time, for a block (vblk _i + 1) vertically adjacent to the block (blk _i ), VAD

vblk _{i + 1} = blk _i + 2

. Therefore, in the case of reading the block vblk _{i + 1} , CA [4: 3] may be incremented by 2 for the column address CA [7: 0] of the block blk _i in operation 64.

Second, a random RAS box (RAS _i) one in the reference point is located macroblock of a predicted macro-block (MB _i) MB0 ~ MB6, the block (blk _i) to the reference point is located at the macroblock In the case of one of the blocks b2 and b3, the RAS line is not caught but only takes the CAS line. At this time, for the block (vblk _{i + 1} ) vertically adjacent to the block (blk _i ), VAD

vblk _{i + 1} = blk _i - 2

. Therefore, in the case of reading the block vblk _{i + 1} , CA [4: 3] may be decreased by 2 for the column address CA [7: 0] of the block blk _i in operation 65.

Third, any RAS box (RAS _i) the reference point is located macroblock of a predicted macro-block (MB _i) the MB7, and the macro-block block (blk _i) a block of the reference point is located at (MB7) in (B0, b1), only the CAS line is taken without taking the RAS line. At this time, for the block (vblk _{i + 1} ) vertically adjacent to the block (blk _i ), VAD

vblk _{i + 1} = blk _i + 2

. Therefore, in the case of reading the block vblk _{i + 1} , CA [4: 3] is incremented by 2 for the column address CA [7: 0] of the block blk _{i in} step 67.

Fourth, a block (MB _i ) in which a reference point of a predicted macroblock is located in an arbitrary RAS box (RAS _i ) is MB7 and a block (blk _i ) in which a reference point is located in a macroblock (MB7) (B2, b3), the RAS line and the CAS line both take a form. At this time, for a block (vblk _{i + 1} ) vertically adjacent to the block (blk _i ), HAD

vblk _{i + 1} = blk _i - 2

RAS _{i + 1} = RAS _i + 15

. [: 0 9 15 increases and, the column address CA [7: 0]: reduced 2 to [3 4] CA with respect to the block (vblk _{i + 1)} the row address RA of the block (blk _i) when to read the (Step 68).

Next, an address distance calculation method according to half-pixel compensation will be described.

First, in the case of a,

RAS _{i + 1} = RAS _i + 19 (for the upper field), RAS _{i + 1} = RAS _i -19 (for the lower field)

blk _{i + 1} = blk _i + 3 (for upper field), blk _{i + 1} = blk _i - 3 (for lower field)

MB _{i + 1} = MB _i + 4 (in the case of the upper field), MB _{i + 1} = MB _i - 4 (in the case of the lower field)

.

For example,

RAS _{i + 1} = RAS _i - 14

blk _{i + 1} = blk _i + 2

MB _{i + 1} = MB _i + 4

.

Third, in the case of c,

blk _{i + 1} = blk _i + 1

MB _{i + 1} = MB _i - 4

.

Fourth, in the case of d,

RAS _{i + 1} = RAS _i - 1

blk _{i + 1} = blk _i - 1 (for upper field), blk _{i + 1} = blk _i + 1 (for lower field)

MB _{i + 1} = MB _i - 3 (in the case of the upper field), MB _{i + 1} = MB _i + 3 (in the case of the lower field)

.

It should be understood, however, that the above description is intended to illustrate the specific embodiments set forth herein and not as an endorsement of the invention. It will be understood by those skilled in the art that various changes and modifications may be made within the scope of the present invention by reference to the above detailed description and the drawings, depending on the type of memory constituting the frame memory, the structure of the RAS box, .

As described above, according to the present invention, an area for storing reference image data in motion compensation, a region for storing decoded video data for display and a region for storing a coded bit stream input to the video decoder are stored in one memory In a frame memory implemented on a module, when an address for reading a macroblock predicted by a start address and a motion vector of a current macroblock is generated in units of blocks, It is possible to calculate the addresses of blocks adjacent in the vertical direction.

Claims (6)

One frame is composed of a plurality of RAS boxes having a separate field structure, and the RAS box is composed of 8 macroblocks (MB0 to MB7) of 8 macroblocks * 1 macroblock format, A method for calculating a horizontal address distance for a block horizontally adjacent to an arbitrary block when generating a row address RA [9: 0] and a column address CA [7: 0] to read a predicted macroblock in block units , When the reference point of the predicted macroblock is located in one of the blocks b0 and b2 in one of the macroblocks MB0 to MB2 and MB4 to MB6, CA [4: 3] is set to 1 To calculate the horizontal address distance; When the reference point is located in one of the blocks b1 and b3 in one of the macroblocks MB0 to MB2 and MB4 to MB6, CA [7: 5] is incremented by 1 and CA [4: : 3] by 1 to calculate the horizontal address distance; If the reference point is located in one of the blocks b0 and b2 in one of the macroblocks MB3 and MB7, the step of calculating the horizontal address distance by increasing CA [4: 3] ; And when the reference point is located in one of the blocks b1 and b3 in one of the macroblocks MB3 and MB7, RA [9: 0] is incremented by 1 and CA [7: 5] And decreasing CA [4: 3] by 1 to calculate the horizontal address distance. 2. The method according to claim 1, wherein the method further comprises the step of determining a macroblock and a block in which the reference point of the predicted macroblock is located in the frame memory. One frame is composed of a plurality of RAS boxes having a separate field structure, and the RAS box is composed of 8 macroblocks (MB0 to MB7) of 8 macroblocks * 1 macroblock format, A method for calculating a vertical address distance for a block vertically adjacent to an arbitrary block when generating a row address RA [9: 0] and a column address CA [7: 0] to read a predicted macroblock in block units , And when the reference point of the predicted macroblock is located in one of the blocks b0 and b1 in one of the macroblocks MB0 to MB6, CA [4: 3] is incremented by 2, Calculating an address distance; Calculating the vertical address distance by decrementing CA [4: 3] by 2 if the reference point is located in one of the blocks b2 and b3 in one of the macroblocks MB0 to MB6; ; Calculating the vertical address distance by incrementing CA [4: 3] by 2 if the reference point is located in one of the blocks b0, b1 in the macroblock MB7; And when the reference point is located in one of the blocks b2 and b3 in the macroblock MB7, RA [9: 0] is increased by 15, CA [4: 3] And calculating an address distance in the frame memory. 4. The method as claimed in claim 3, wherein the method further comprises: determining a macroblock and a block in which the reference point of the predicted macroblock is located in the frame memory. One frame is composed of a plurality of RAS boxes having a separate field structure, and the RAS box is composed of 8 macroblocks (MB0 to MB7) of 8 macroblocks * 1 macroblock format, In order to generate the row address RA [9: 0] and the column address CA [7: 0] to read the predicted macroblock in block units, in order to calculate the horizontal address distance for blocks horizontally adjacent to any block, When the reference point of the predicted macroblock is located in one of the blocks b0 and b2 in one of the macroblocks MB0 to MB2 and MB4 to MB6, CA [4: 3] is incremented by 1 Calculating the horizontal address distance; When the reference point is located in one of the blocks b1 and b3 in one of the macroblocks MB0 to MB2 and MB4 to MB6, CA [7: 5] is incremented by 1 and CA [4: : 3] by 1 to calculate the horizontal address distance; If the reference point is located in one of the blocks b0 and b2 in one of the macroblocks MB3 and MB7, the step of calculating the horizontal address distance by increasing CA [4: 3] ; And when the reference point is located in one of the blocks b1 and b3 in one of the macroblocks MB3 and MB7, RA [9: 0] is incremented by 1 and CA [7: 5] And decreasing CA [4: 3] by one to calculate the horizontal address distance, and in order to calculate a vertical address distance for a block vertically adjacent to any block, the predicted macroblock Calculating the vertical address distance by incrementing CA [4: 3] by 2 when the reference point of the macroblocks is located in one of the blocks b0 and b1 in one of the macroblocks MB0 to MB6 ; Calculating the vertical address distance by decrementing CA [4: 3] by 2 if the reference point is located in one of the blocks b2 and b3 in one of the macroblocks MB0 to MB6; ; Calculating the vertical address distance by incrementing CA [4: 3] by 2 if the reference point is located in one of the blocks b0, b1 in the macroblock MB7; And when the reference point is located in one of the blocks b2 and b3 in the macroblock MB7, RA [9: 0] is increased by 15, CA [4: 3] And calculating an address distance in the frame memory. 6. The method as claimed in claim 5, wherein the method further comprises: determining a macroblock and a block in which the reference point of the predicted macroblock is located in the frame memory.