KR102598043B1 - Semiconductor light emitting device including a floating conductive pattern - Google Patents

Abstract

A semiconductor light emitting device including a floating conductive pattern is provided. This semiconductor light emitting device includes a first semiconductor layer having a recessed region and a protruding region; an active layer and a second semiconductor layer sequentially stacked on the protruding area of the first semiconductor layer; a contact structure disposed on the second semiconductor layer; a lower insulating pattern covering the first semiconductor layer and the contact structure and having a first opening exposing a contact area of the first semiconductor layer and a second opening exposing a contact area of the contact structure; a first conductive pattern disposed on the lower insulating pattern, extending into the first opening of the lower insulating pattern, and electrically connected to the contact region of the first semiconductor layer; a second conductive pattern disposed on the lower insulating pattern, extending into the second opening of the lower insulating pattern, and electrically connected to the contact structure; and a floating conductive pattern disposed on the lower insulating pattern and spaced apart from the first conductive pattern. The first and second conductive patterns and the floating conductive pattern have the same thickness on the same plane.

Description

Semiconductor light emitting device including a floating conductive pattern}

The technical idea of the present invention relates to a light emitting device, and particularly to a semiconductor light emitting device including a floating conductive pattern.

Semiconductor light emitting devices are known as next-generation light sources with advantages such as long lifespan, low power consumption, fast response speed, and environmental friendliness compared to conventional light sources, and are attracting attention as an important light source in various products such as lighting devices and backlights of display devices. there is.

The problem to be solved by the technical idea of the present invention is to provide a semiconductor light emitting device that can improve reliability.

A semiconductor light emitting device according to an embodiment of the technical idea of the present invention includes a first semiconductor layer having a recessed area and a protruding area; an active layer and a second semiconductor layer sequentially stacked on the protruding area of the first semiconductor layer; a contact structure disposed on the second semiconductor layer; a lower insulating pattern covering the first semiconductor layer and the contact structure and having a first opening exposing a contact area of the first semiconductor layer and a second opening exposing a contact area of the contact structure; a first conductive pattern disposed on the lower insulating pattern, extending into the first opening of the lower insulating pattern, and electrically connected to the contact region of the first semiconductor layer; a second conductive pattern disposed on the lower insulating pattern, extending into the second opening of the lower insulating pattern, and electrically connected to the contact structure; and a floating conductive pattern disposed on the lower insulating pattern and spaced apart from the first conductive pattern. The first and second conductive patterns and the floating conductive pattern have the same thickness on the same plane.

A semiconductor light emitting device according to an embodiment of the technical idea of the present invention has a first area and a second area, and a first corner, a second corner, a third corner, and a fourth corner that are sequentially arranged in a counterclockwise direction when viewed in plan. a first semiconductor layer having corners; an active layer and a second semiconductor layer sequentially stacked on the second region of the first semiconductor layer; a contact structure disposed on the second semiconductor layer; a lower insulating pattern covering the first semiconductor layer and the contact structure and having a first opening exposing a contact area of the first semiconductor layer and a second opening exposing a contact area of the contact structure; and a first conductive pattern, a second conductive pattern, and a floating conductive pattern disposed on the lower insulating pattern and spaced apart from each other. The first and second conductive patterns and the floating conductive pattern have the same thickness in the same plane, and the first conductive pattern extends into the first opening of the lower insulating pattern and extends into the first opening of the first semiconductor layer. is electrically connected to a contact area, the second conductive pattern extends into the second opening of the lower insulating pattern and is electrically connected to the contact structure, and the floating conductive pattern is connected to the first and second corners and the It includes parts disposed between the first conductive patterns.

A semiconductor light emitting device according to an embodiment of the technical idea of the present invention includes a first semiconductor layer having a recessed area and a protruding area; an active layer and a second semiconductor layer sequentially stacked on the protruding area of the first semiconductor layer; a contact structure disposed on the upper surface of the second semiconductor layer; a lower insulating pattern covering the first semiconductor layer and the contact structure and having a first opening exposing a contact area of the first semiconductor layer and a second opening exposing a contact area of the contact structure; a first conductive pattern disposed on the lower insulating pattern, extending into the first opening of the lower insulating pattern, and electrically connected to the contact region of the first semiconductor layer; a second conductive pattern disposed on the lower insulating pattern, extending into the second opening of the lower insulating pattern, and electrically connected to the contact structure; and a floating conductive pattern disposed on the lower insulating pattern and spaced apart from the first conductive pattern. The first and second conductive patterns and the floating conductive pattern have the same thickness on the same plane.

According to embodiments of the technical idea of the present invention, a semiconductor light emitting device capable of improving reliability can be provided.

1 is a plan view schematically showing an example of a semiconductor light emitting device 10 according to an embodiment of the technical idea of the present invention.
FIG. 2A is a cross-sectional view schematically showing a region taken along line II' of FIG. 1.
FIG. 2B is a partial enlarged view of the portion indicated by “A” in FIG. 2A.
Figure 2c is a partial enlarged view for schematically explaining a modified example of a semiconductor light emitting device according to an embodiment of the technical idea of the present invention.
Figure 3 is a plan view schematically showing another modified example of a semiconductor light emitting device according to an embodiment of the technical idea of the present invention.
Figure 4 is a plan view schematically showing another modified example of the semiconductor light emitting device 10 according to an embodiment of the technical idea of the present invention.
Figure 5 is a plan view schematically showing another example of a semiconductor light emitting device according to an embodiment of the technical idea of the present invention.
FIG. 6A is a plan view schematically showing another modified example of the semiconductor light emitting device 10' according to an embodiment of the technical idea of the present invention.
FIG. 6B is a cross-sectional view schematically showing the area taken along line II-II' of FIG. 6A.
7 is a plan view schematically showing another modified example of a semiconductor light emitting device according to an embodiment of the technical idea of the present invention.
FIGS. 8A, 9A, 10A, 11A, and 12A are plan views showing a method of forming a semiconductor light emitting device according to an embodiment of the technical idea of the present invention.
FIGS. 8B, 9B, 10B, 11B, and 12B are cross-sectional views showing a method of forming a semiconductor light emitting device according to an embodiment of the technical idea of the present invention.
Figure 13 is a cross-sectional view schematically showing an example of applying a semiconductor light-emitting device to a package according to an embodiment of the technical idea of the present invention.

FIG. 1 is a plan view schematically showing an example of a semiconductor light emitting device 10 according to an embodiment of the technical idea of the present invention, and FIG. 2A is a cross-sectional view schematically showing a region taken along line II' of FIG. 1. , and FIG. 2B is a partial enlarged view of the portion indicated by “A” in FIG. 2A. FIG. 2C is a partial enlarged view for schematically explaining another example of the semiconductor light emitting device 10 according to an embodiment of the technical idea of the present invention.

First, an example of a semiconductor light emitting device 10 according to an embodiment of the technical idea of the present invention will be described with reference to FIGS. 1, 2A, and 2B.

Referring to FIGS. 1, 2A, and 2B, the semiconductor light emitting device 10 according to an embodiment of the technical idea of the present invention includes a substrate 105, a light emitting structure 110, a passivation layer 130, and a lower insulating pattern. (150), upper insulating pattern 160, contact structure 135, first conductive pattern (155n), second conductive pattern (155p), floating conductive pattern (155f), upper insulating pattern (160), first and It may include second electrodes 165n and 165p, and first and second connection structures 170n and 170p.

The substrate 105 may have a front surface 105s1 and a rear surface 105s2 opposite the front surface 105s1. The substrate 105 may be a substrate for semiconductor growth, and may be made of insulating, conductive, semiconductor materials such as sapphire, Si, SiC, MgAl ₂ O ₄ , MgO, LiAlO ₂ , LiGaO ₂ , GaN, etc. The sapphire may be a crystal that is electrically insulating and has Hexa-Rhombo R3c symmetry, and can be used as a substrate for growing nitride semiconductors.

Throughout the specification, terms such as “front” and “rear” are used to distinguish relative positions of components, and the technical idea of the present invention is not limited by these terms. Accordingly, these terms such as “front” and “rear” are replaced by other terms, such as terms such as “first side” and “second side”, or terms such as “upper side” and “lower side”, etc. It may be used to describe the components of the specification. Accordingly, the front surface 105s1 and the rear surface 105s2 of the substrate 105 are replaced with the top surface 105s1 and the bottom surface 105s2 of the substrate 105, or the first surface 105s2 of the substrate 105. It can be used instead of the surface 105s1 and the second surface 105s2.

The light emitting structure 110 may be disposed on the front surface 105s1 of the substrate 105.

In one example, the front surface 105s1 of the substrate 105 may be formed in a concavo-convex structure, and this concave-convex structure may improve the crystallinity and light emission efficiency of the semiconductor layers constituting the light emitting structure 110. . In this embodiment, the uneven structure of the front surface 105s1 of the substrate 105 is illustrated as having a dome-shaped convex shape, but is not limited thereto. For example, the uneven structure of the front surface 105s1 of the substrate 105 may be formed in various shapes such as squares and triangles. Additionally, the concavo-convex structure of the front surface 105s1 of the substrate 105 may be formed selectively or may be omitted.

In one example, the substrate 105 may be removed at a later time depending on the embodiment. For example, it may be provided as a growth substrate for growing the light emitting structure 110 and then removed through a separation process. The substrate 105 may be separated from the light emitting structure 110 through a method such as laser lift off (LLO) or chemical lift off (CLO).

The light emitting structure 110 may include a first semiconductor layer 115, an active layer 120, and a second semiconductor layer 125.

The first semiconductor layer 115 may be formed by growing from the front surface 105s1 of the substrate 105. The first semiconductor layer 115 may be made of a semiconductor doped with n-type impurities and may be an n-type nitride semiconductor layer.

When viewed in plan, the first semiconductor layer 115 may have a square shape. When viewed in plan, the first semiconductor layer 115 has a first corner (C1), a second corner (C2), a third corner (C3), and a fourth corner (C4) arranged in order in a counterclockwise direction. You can. When viewed in plan, the first semiconductor layer 115 has a first corner (S1) between the first corner (C1) and the second corner (C2), a first corner (S1) between the first corner (C1) and the second corner (C2), and a third corner (C2). (C3) between the second corner (S2), the third corner (S3) between the third corner (C3) and the fourth corner (C4), and the fourth corner (C4) and the first corner ( It may have a fourth edge (S4) between C1). Accordingly, the first and third edges S1 and S3 may face each other, and the second and fourth corners S2 and S4 may face each other.

In one example, when viewed in plan, the first semiconductor layer 115 may be self-aligned on the substrate 105, so that the first to fourth corners C1 of the first semiconductor layer 115 ~C4), and the first to fourth corners S1 to S4 may be equally applied to the substrate 105.

The first semiconductor layer 115 may have a recessed region (E) and a protruding region (M). The recessed area (E) may be referred to as an etch area, and the protruding area (M) may be referred to as a mesa area. In the drawings, reference numeral “B” may indicate a boundary (B) between the recessed area (E) and the protruding area (M). In the first semiconductor layer 115, the upper surface of the protruding area (M) may be higher than the upper surface of the recessed area (E).

In one example, the protruding area M may have a shape that gradually becomes narrower from the bottom to the top. Accordingly, the protruding area M may have an inclined side surface.

In one example, a portion of the upper surface of the recess area E may be defined as the first contact area CT1. In one example, at least a portion of the upper surface of the protruding area M may be defined as the second contact area CT2.

Throughout the specification, terms such as “first” and “second” may be used to describe various components, but the components are not limited by the terms. The above terms are used only for the purpose of distinguishing one component from another. For example, the “first component” may be referred to as the “second component” without departing from the scope of the present invention.

In the first semiconductor layer 115, the protruding area M may be spaced apart from the first to fourth corners S1 to S4, and the protruding area M and the first to fourth corners S1 to S4 may be spaced apart from each other. The recess area (E) may be disposed between S1 to S4.

When viewed in plan, the recess area E may extend from a portion of the first edge S1 in a direction toward the third edge S3.

The active layer 120 and the second semiconductor layer 125 may be sequentially stacked on the upper surface of the protruding area M of the first semiconductor layer 115. The second semiconductor layer 125 may be made of a semiconductor doped with p-type impurities and may be a p-type nitride semiconductor layer.

In one example, depending on the embodiment, the first and second semiconductor layers 115 and 125 may be stacked with their positions changed. These first and second semiconductor layers 115 and 125 have the Al _x In _y Ga _(1-xy) N composition formula (here, 0≤x<1, 0≤y<1, 0≤x+y<1) It has, for example, materials such as GaN, AlGaN, InGaN, and AlInGaN.

The active layer 120 may be interposed between the first and second semiconductor layers 115 and 125. The active layer 120 may emit light having a predetermined energy by recombination of electrons and holes when the semiconductor light emitting device 10 operates. The active layer 120 may include a material having an energy band gap smaller than that of the first and second semiconductor layers 115 and 125. For example, when the first and second semiconductor layers 115 and 125 are GaN-based compound semiconductors, the active layer 120 may include an InGaN-based compound semiconductor having an energy band gap smaller than that of GaN. You can. Additionally, the active layer 120 may have a Multiple Quantum Wells (MQW) structure in which quantum well layers and quantum barrier layers are alternately stacked, for example, an InGaN/GaN structure. However, since it is not limited thereto, the active layer 120 may have a single quantum well (SQW) structure.

The passivation layer 130 may be disposed on the light emitting structure 110. The passivation layer 130 may cover a portion of the first semiconductor layer 115 and a portion of the second semiconductor layer 125. The passivation layer 130 has a first opening 130a exposing the first contact area CT1 of the recess area E of the first semiconductor layer 115 and the second semiconductor layer 125. may include a second opening 130b exposing the second contact area CT2.

The contact structure 135 may be disposed on the upper surface of the second semiconductor layer 125. The contact structure 135 may be electrically connected to the second semiconductor layer 125 while contacting the second contact region CT2 of the second semiconductor layer 125 .

In one example, the contact structure 135 may include a metal layer 140 and a coating layer 145. The covering layer 145 may cover the top and side surfaces of the metal layer 140 and protect the metal layer 140 . The metal layer 140 may be a reflective metal layer. The covering layer 145 may be formed of a conductive material. However, the technical idea of the present invention is not limited to this, and the covering layer 145 may be formed of an insulating material or may be omitted.

The lower insulating pattern 150 may be disposed on the contact structure 135 and the passivation layer 130. The intermediate insulating pattern 150 has a first opening 150a exposing the first contact area CT1 of the first semiconductor layer 115 and a third contact area CT3 of the contact structure 135. It may have a second opening 150b that is exposed.

The first conductive pattern 155n, the second conductive pattern 155p, and the floating conductive pattern 155f are disposed on the lower insulating pattern 150, are made of the same material, and may be spaced apart from each other. For example, the first conductive pattern 155n, the second conductive pattern 155p, and the floating conductive pattern 155f may include Au, W, Pt, Si, Ir, Ag, Cu, Ni, Ti, Cr, etc. It may be formed of a material containing one or more of the materials and alloys thereof.

The first conductive pattern 155n is disposed on the lower insulating pattern 150 and extends onto the first contact region CT1 of the first semiconductor layer 115 to form a contact area between the first semiconductor layer 115 and the first contact region CT1. Can be electrically connected. The first conductive pattern 155n may contact the first contact region CT1 of the first semiconductor layer 115.

In one example, in order to improve contact resistance characteristics between the first conductive pattern 155n and the first contact area CT1 of the first semiconductor layer 115, the first conductive pattern 155n and the As shown in FIG. 2C, a conductive buffer pattern (153 in FIG. 2C) may be disposed between the first contact regions CT1 of the first semiconductor layer 115. Depending on the embodiment, the conductive buffer pattern (153 in FIG. 2C) may be omitted, and the first conductive pattern 155n may directly contact the contact region CT1 of the first semiconductor layer 115.

The second conductive pattern 155p is disposed on the lower insulating pattern 150 and extends onto the third contact area CT3 of the contact structure 135 to be electrically connected to the contact structure 135. there is. Accordingly, the second conductive pattern 155p may be electrically connected to the second semiconductor layer 125 through the contact structure 135.

When viewed in plan, the first conductive pattern 155n may be adjacent to the first edge S1, the second edge S2, and the fourth edge S4, and the second conductive pattern 155p may be adjacent to the first edge S1, the second edge S2, and the fourth edge S4. ) may be adjacent to the third edge (S3).

The floating conductive pattern 155f is disposed on the lower insulating pattern 150 and may be electrically isolated. The floating conductive pattern 155f is closer to the first conductive pattern 155n than the second conductive pattern 155p, and may be adjacent to the first conductive pattern 155p.

The floating conductive pattern 155f may include portions adjacent to at least two of the first to fourth corners C1 to C4. When viewed in plan, the floating conductive pattern 155f has a first portion 155f_1 disposed between the first corner C1 and the first conductive pattern 155n, the second corner C2, and the first conductive pattern 155f. 1 It may include a second part 155f_2 disposed between the conductive patterns 155n. The first part 155f_1 of the floating conductive pattern 155f may be adjacent to the first corner C1, and the second part 155f_2 may be adjacent to the second corner C2. The floating conductive pattern 155f is formed at the end portions of the first semiconductor layer 115, for example, the first to fourth corners C1 to C4 and the first to fourth corners S1 to S4. may not overlap with . The floating conductive pattern 155f is formed at the end portions of the first semiconductor layer 115, for example, the first to fourth corners C1 to C4 and the first to fourth corners S1 to S4. may not be aligned vertically.

The floating conductive pattern 155f has a lower portion 155a overlapping the recessed region R of the first semiconductor layer 115 and an upper portion of the protruding region M of the first semiconductor layer 115. It may include an upper part 155b overlapping the surface and a middle part 155c overlapping the inclined side of the protruding area M. This floating conductive pattern 155f is formed of a metal material and can serve as a reflective metal that can increase light efficiency. A portion of the upper portion 155b of the floating conductive pattern 155f may overlap a portion of the contact structure 135. The floating conductive pattern 155f and the first conductive pattern 155n may be adjacent to each other and may be spaced apart from each other on the contact structure 135. Accordingly, the floating conductive pattern 155f may be arranged to cover the ends of the contact structure 135 close to the first and second corners C1 and C2. Accordingly, the floating conductive pattern 155f may serve to prevent defects caused by cracks occurring from the ends of the contact structure 135.

In the same plane, the first conductive pattern 155n, the second conductive pattern 155p, and the floating conductive pattern 155f may have the same thickness. For example, the first conductive pattern 155n, the second conductive pattern 155p, and the floating conductive pattern 155f may have the same thickness (T) on the flat upper surface of the lower insulating pattern 150. You can.

The upper insulating pattern 160 is disposed on the first conductive pattern 155n, the second conductive pattern 155p, and the floating conductive pattern 155f and forms a fourth contact of the first conductive pattern 155n. It may have a first opening 160a exposing the area CT4 and a second opening 160b exposing the fifth contact area CT5 of the second conductive pattern 155p.

The floating conductive pattern 155f may be entirely surrounded and electrically insulated by the lower and upper insulating patterns 150 and 160.

A first electrode 165n may be disposed on the fourth contact area CT4 of the first conductive pattern 155n, and on the fifth contact area CT5 of the second conductive pattern 155p. A second electrode 165p may be disposed. A first connection structure 170n may be disposed on the first electrode 165n, and a second connection structure 170p may be disposed on the second electrode 165p. The first and second connection structures 170n and 170p may be solder ball structures that may be formed of a conductive material such as solder.

In one example, a buffer portion 161 may be formed by separating the floating conductive pattern 155f and the first conductive pattern 155n. This buffering portion 161 forms the first connection structure 170n or allows stress generated due to the first connection structure 170n to pass through the first conductive pattern 155n to the contact structure ( 135), transmission to the end can be alleviated. This buffer portion 161 can prevent defects from occurring due to cracks occurring at the ends of the contact structure 135.

The floating conductive pattern 155f may include the first part 155f_1 adjacent to the first corner C1 and the second part 155f_2 adjacent to the second corner C2. The technical idea of the invention is not limited to this, and the floating conductive pattern 155f may be modified into various shapes. Various examples of the floating conductive pattern 155f that can be modified into various shapes will be described with reference to FIGS. 3 to 7.

Figure 3 is a plan view schematically showing another modified example of a semiconductor light-emitting device according to an embodiment of the technical idea of the present invention, and Figure 4 is another modified example of a semiconductor light-emitting device according to an embodiment of the technical idea of the present invention. is a plan view schematically showing, and Figure 5 is a plan view schematically showing another modified example of a semiconductor light emitting device according to an embodiment of the technical idea of the present invention. In addition, FIG. 6A is a plan view schematically showing another modified example of a semiconductor light emitting device according to an embodiment of the technical idea of the present invention, and FIG. 6B is a schematic view of a region taken along line II-II' of FIG. 6A. This is a cross-sectional view. In FIG. 6A, line II-II' may correspond to line II' in FIG. 1. 7 is a plan view schematically showing another modified example of a semiconductor light emitting device according to an embodiment of the technical idea of the present invention.

In each of FIGS. 3 to 5, the cross-sectional shape of the portion indicated by line II′ may be the same as that of FIG. 2A. Accordingly, the cross-sectional shape of the portion indicated by line II' in each of FIGS. 3 to 5 can be understood with reference to FIG. 2A. Additionally, in FIG. 7, the cross-sectional shape of the portion indicated by line II-II' may be the same as that of FIG. 6B. Accordingly, the cross-sectional shape of the portion indicated by line II-II' in FIG. 7 can be understood with reference to FIG. 6B. In each of FIGS. 3 to 5, the cross-sectional shape of the portion indicated by line II' may be the same as that of FIG. 2A, so each of FIGS. 3 to 5 will be described together with FIG. 2A, and in FIG. 7, Since the cross-sectional shape of the portion indicated by line II-II' may be the same as that of FIG. 6b, FIG. 7 will be described together with FIG. 6b.

First, referring to FIGS. 2A and 3, the floating conductive pattern 155f includes a first portion 155f_1 disposed between the first corner C1 and the first conductive pattern 155n, and a second corner ( A second part 155f_2 disposed between C2) and the first conductive pattern 155n, and connecting the first and second parts 155f_1 and 155f_2, and connecting the first corner S1 and the first conductive pattern 155n. It may include a connection portion 155i disposed between the conductive patterns 155n. The first part 155f_1 of the floating conductive pattern 155f may be adjacent to the first corner C1, and the second part 155f_2 may be adjacent to the second corner C2, The connection portion 155i may be adjacent to the first edge S1.

Next, referring to FIGS. 2A and 4 , the floating conductive pattern 155f may include first to fourth parts 155f_1, 155f_2, 155f_3, and 155f_4 that are spaced apart from each other. The first part 155f_1 of the floating conductive pattern 155f may be adjacent to the first corner C1, and the second part 155f_2 may be adjacent to the second corner C2, The third part 155f_3 may be adjacent to the third corner C3, and the fourth part 155f_4 may be adjacent to the fourth corner C4. .

Next, referring to FIGS. 2A and 5 , the floating conductive pattern 155f includes a first portion 155f_1 disposed between the first corner C1 and the first conductive pattern 155n, and the second corner. A second part 155f_2 disposed between (C2) and the first conductive pattern 155n, connects the first and second parts 155f_1 and 155f_2, and connects the first corner S1 and the first conductive pattern 155n. A connection part 155i disposed between the conductive patterns 155n, a first extension part 155e_1 extending from the first part 155f_1 between the fourth corner S4 and the first conductive pattern 155n, and a second extension part 155e_2 extending from the second part 155f_2 between the second edge S2 and the first conductive pattern 155n. The first part 155f_1 of the floating conductive pattern 155f may be adjacent to the first corner C1, and the second part 155f_2 may be adjacent to the second corner C2, The first extension part 155e_1 may extend from the first part 155f_1 in a direction toward the fourth corner C4, and the second extension part 155e_2 may extend from the second part 155f_2. It may extend in a direction toward the third corner C3.

Next, referring to FIGS. 6A and 6B, the floating conductive pattern 155f is between the first conductive pattern 155n and the first edge S1, and between the second conductive pattern 155p and the third conductive pattern 155f. It may include parts disposed between edges S3. For example, the floating conductive pattern 155f includes a first portion 155f_1 disposed between the first corner C1 and the first conductive pattern 155n, the second corner C2, and the first conductive pattern 155n. A second part 155f_2 disposed between the conductive patterns 155n, connecting the first and second parts 155f_1 and 155f_2 and between the first edge S1 and the first conductive pattern 155n. A connecting portion 155i disposed, a third portion 155f_3 adjacent to the third corner C1, a fourth portion 155f_4 adjacent to the fourth corner C4, and the third and third portions. It connects (155f_3, 155f_4) and may include a connection portion (155i) disposed between the third edge (S1) and the second conductive pattern (155p).

Next, referring to FIGS. 6B and 7 , the floating conductive pattern 155f may have a square ring shape disposed along the first to fourth edges S1 to S4. The floating conductive pattern 155f may surround the first and second conductive patterns 155n and 155p.

As described above, the floating conductive pattern 155f has first and second portions 155f_1 and 155f_2 adjacent to at least two corners C1 and C2 among the first to fourth corners C1 to C4. ) may include.

Next, FIGS. 8A, 8B, 9A, 9B, 10A, 10B, 11A, and 12B for an example of a method of forming a semiconductor light emitting device 10 according to an embodiment of the technical idea of the present invention It will be described with reference to Figures 11b, 12a, and 12b. 8A to 12B, FIGS. 8A, 9A, 10A, 11A, and 12A are schematic plan views for explaining a method of forming the semiconductor light emitting device 10 according to an embodiment of the technical idea of the present invention. , FIGS. 8B, 9B, 10B, 11B, and 12B are cross-sectional views schematically showing the area taken along line II′ of FIGS. 8A, 9A, 10A, 11A, and 12A.

Referring to FIGS. 8A and 8B , the light emitting structure 110 may be formed on the substrate 105. The substrate 105 may be formed of a material such as sapphire, Si, SiC, MgAl ₂ O ₄ , MgO, LiAlO ₂ , LiGaO ₂ , or GaN. The substrate 105 may have a front surface 105s1 and a rear surface 105s2 opposite the front surface 105s1.

In one example, a concavo-convex structure may be formed on the front surface 105s1 of the substrate 105. Depending on the embodiment, forming the concavo-convex structure of the front surface 105s1 of the substrate 105 may be omitted.

A light emitting structure 110 may be formed on the front surface 105s1 of the substrate 105. The light-emitting structure 110 is formed using processes such as Metal Organic Chemical Vapor Deposition (MOCVD), Hydrogen Vapor Phase Epitaxy (HVPE), and Molecular Beam Epitaxy (MBE). It may be formed of a plurality of layers formed. For example, the light emitting structure 110 may include a first semiconductor layer 115, an active layer 120, and a second semiconductor layer 125 sequentially formed on the front surface 105s1 of the substrate 105. there is. The first semiconductor layer 115 and the second semiconductor layer 125 may have different conductivity types. For example, the first semiconductor layer 115 may have an n-type conductivity type, and the second semiconductor layer 125 may have a p-type conductivity type.

Referring to FIGS. 9A and 9B , portions of the second semiconductor layer 125, the active layer 120, and the first semiconductor layer 115 may be etched using photo and etching processes. Accordingly, the first semiconductor layer 115 may have a recessed region E that is etched and recessed. The unetched area of the first semiconductor layer 115 may be defined as a protruding area M. Accordingly, the protruding area M may have a relatively protruding shape compared to the recessed area E. The protruding area M may have a mesa shape and may also be referred to as a mesa area. The recess area (E) may also be referred to as an etch area. The active layer 120 and the second semiconductor layer 125 may remain on the upper surface of the protruding region M.

When viewed in plan, the first semiconductor layer 115 may be formed in a square shape. When viewed in plan, the first semiconductor layer 115 has a first corner (C1), a second corner (C2), a third corner (C3), and a fourth corner (C4) arranged in order in a counterclockwise direction. You can. When viewed in plan, the first semiconductor layer 115 has a first corner (S1) between the first corner (C1) and the second corner (C2), a first corner (S1) between the first corner (C1) and the second corner (C2), and a third corner (C2). (C3) between the second corner (S2), the third corner (S3) between the third corner (C3) and the fourth corner (C4), and the fourth corner (C4) and the first corner ( It may have a fourth edge (S4) between C1). Accordingly, the first and third edges S1 and S3 may face each other, and the second and fourth corners S2 and S4 may face each other.

Referring to FIGS. 10A and 10B, a passivation layer 130 having a first opening 130a and a second opening 130b may be formed on the light emitting structure 110. The passivation layer 130 may be formed of an insulating material such as silicon oxide or silicon nitride. The first opening 130a of the passivation layer 130 may expose a portion of the recess area E of the first semiconductor layer 115, and the second opening 130a of the passivation layer 130 may expose a portion of the recess area E of the first semiconductor layer 115. (130b) may expose a portion of the second semiconductor layer 125.

The surface of the recessed region E of the first semiconductor layer 115 exposed by the first opening 130a of the passivation layer 130 may be referred to as a first contact region CT1, The surface of the second semiconductor layer 125 exposed by the second opening 130b of the passivation layer 130 may be referred to as a second contact region CT2.

A contact structure 135 may be formed on the second contact region CT2 of the second semiconductor layer 125 . The contact structure 135 may include a metal layer 140 and a coating layer 145. The covering layer 145 may protect the metal layer 140 while covering the top and side surfaces of the metal layer 140 .

11A and 11B, a lower insulating pattern 150 having a first opening 150a and a second opening 150b is formed on the substrate 105 having the passivation layer 130 and the contact structure 135. ) can be formed.

The first opening 150a of the lower insulating pattern 150 may expose the first contact area CT1 of the recess area E of the first semiconductor layer 115. The second opening 150b of the lower insulating pattern 150 may expose a partial area of the contact structure 135. A partial area of the contact structure 135 exposed by the second opening 150b of the lower insulating pattern 150 may be referred to as a third contact area CT3.

Referring to FIGS. 12A and 12B, a first conductive pattern 155n, a second conductive pattern 155p, and a floating conductive pattern 155f can be formed on the substrate 105 having the lower insulating pattern 150. there is. Forming the first conductive pattern 155n, the second conductive pattern 155p, and the floating conductive pattern 155f includes forming a conductive material layer on the substrate 105 having the lower insulating pattern 150; , may include patterning the conductive material layer using photo and etching processes. Accordingly, since the first conductive pattern 155n, the second conductive pattern 155p, and the floating conductive pattern 155f are formed through the same process, they may be formed of the same material. Additionally, the first conductive pattern 155n, the second conductive pattern 155p, and the floating conductive pattern 155f may be formed on the same plane and have the same thickness.

In embodiments, in the process of patterning the conductive material layer to form the first conductive pattern 155n, the second conductive pattern 155p, and the floating conductive pattern 155f, the conductive material layer is patterned. Depending on the shape, the planar shape of the floating conductive pattern 155f is any of the planar shapes of the floating conductive pattern 155f as described in FIGS. 1, 3, 4, 5A, 6, and 7. It can be formed into one shape.

The first conductive pattern 155n may be electrically connected to the first contact region CT1 of the first semiconductor layer 115. The second conductive pattern 155p may be electrically connected to the third contact area CT3 of the contact structure 135. The floating conductive pattern 155f is spaced apart from the light emitting structure 110 and may be electrically insulated.

Referring again to FIGS. 1, 2A, and 2B, a first opening 160a is formed on a substrate having the first conductive pattern 155n, the second conductive pattern 155p, and the floating conductive pattern 155f. and an upper insulating pattern 160 having a second opening 160b.

The first opening 160a of the upper insulating pattern 160 may expose a partial area of the first conductive pattern 155n, and the second opening 160b of the upper insulating pattern 160 may expose the first conductive pattern 155n. A partial area of the second conductive pattern 155p may be exposed.

A partial area of the first conductive pattern 155n exposed by the first opening 160a of the upper insulating pattern 160 may be referred to as a fourth contact region CT4, and the upper insulating pattern 160 ) of the second conductive pattern 155p exposed by the second opening 160b may be referred to as a fifth contact area CT5.

First and second electrodes 165n and 165p may be formed on the substrate 105 having the upper insulating pattern 160. The first electrode 165n may be formed on the fourth contact area CT4 of the first conductive pattern 155n, and the second electrode 165p may be formed on the second conductive pattern 155p. It may be formed on the fifth contact area CT5. The first and second electrodes 165n and 165p may be pads or under bump metallurgy (UBM). In one example, the number and arrangement structure of the first and second electrodes 165n and 165p may be changed in various ways.

First and second connection structures 170n and 170p may be formed on the substrate 105 having the first and second electrodes 165n and 165p. The first connection structure 170n may be formed on the first electrode 165n, and the second connection structure 170p may be formed on the second electrode 165p.

The semiconductor light emitting device 10 as described above may be commercialized in package form. Hereinafter, an example of applying the semiconductor light emitting device 10 as described above to a package will be described with reference to FIG. 13. Figure 13 is a cross-sectional view schematically showing an example of applying a semiconductor light-emitting device to a package according to an embodiment of the technical idea of the present invention.

Referring to FIG. 13 , any one of the semiconductor light emitting devices 10 as described in FIGS. 1 to 7 may be mounted on a substrate 310 having pads 320 . The first and second connection structures 170n and 170p of the light emitting device 10 may be electrically connected while contacting the pads 320 . The semiconductor light emitting device 10 may be attached to the fluorescent layer 210 using an adhesive layer 220. A side pattern 230 may be disposed on the side of the semiconductor light emitting device 10. The side pattern 230 may be a reflective layer that may be formed of a reflective material. In this way, the semiconductor light emitting device 10 attached to the fluorescent layer 210 can be mounted on the substrate 310. The board 310 may be a printed circuit board or a module board.

According to embodiments, defects that may occur due to cracks can be prevented by disposing electrically insulated floating conductive patterns 155f at corners vulnerable to cracks in the semiconductor light emitting device. Since this floating conductive pattern 155f is electrically insulated, cracks in the lower insulating pattern 150 cause metal materials constituting the contact structure 135, such as Ag, to diffuse or migrate to the lower insulating pattern 150. Even if the contact structure 135 and the floating conductive pattern 155f are electrically short-circuited, a defect may not occur because the floating conductive pattern 155f is electrically insulated. This floating conductive pattern 155f can improve the reliability of the semiconductor light emitting device.

Above, embodiments of the present invention have been described with reference to the attached drawings, but those skilled in the art will understand that the present invention can be implemented in other specific forms without changing the technical idea or essential features. You will understand that it exists. Therefore, the embodiments described above should be understood in all respects as illustrative and not restrictive.

105: substrate 110: light emitting structure
115: first semiconductor layer 120: active layer
125: second semiconductor layer S1 to S4: first to fourth edges
C1 to C4: first to fourth corners 130: passivation layer
135: Contact structure 150: Lower insulating pattern
150n: first opening 150p: second opening
155n: first conductive pattern 155p: second conductive pattern
155f: floating conductive pattern 160: upper insulating pattern
165n: first electrode 165p: second electrode
170n: first connection structure 170p: second connection structure

Claims (20)

a first semiconductor layer having a recessed region and a protruding region;
an active layer and a second semiconductor layer sequentially stacked on the protruding area of the first semiconductor layer;
a contact structure disposed on the second semiconductor layer;
a lower insulating pattern covering the first semiconductor layer and the contact structure and having a first opening exposing a contact area of the first semiconductor layer and a second opening exposing a contact area of the contact structure;
a first conductive pattern disposed on the lower insulating pattern, extending into the first opening of the lower insulating pattern, and electrically connected to the contact region of the first semiconductor layer;
a second conductive pattern disposed on the lower insulating pattern, extending into the second opening of the lower insulating pattern, and electrically connected to the contact structure; and
A floating conductive pattern disposed on the lower insulating pattern and spaced apart from the first conductive pattern,
A semiconductor light emitting device wherein the first and second conductive patterns and the floating conductive pattern have the same thickness on the same plane.
According to claim 1,
When viewed in plan, the first semiconductor layer has a rectangular shape and has a first corner, a second corner, a third corner, and a fourth corner sequentially arranged in a counterclockwise direction, between the first corner and the second corner. a first edge, a second edge between the second corner and the third corner, a third edge between the third corner and the fourth corner, and a fourth edge between the fourth corner and the first corner. A semiconductor light emitting device having a.
According to claim 2,
When viewed in plan, the floating conductive pattern is a semiconductor light emitting device including a first portion disposed between the first corner and the first conductive pattern and a second portion disposed between the second corner and the first conductive pattern. device.
According to claim 2,
When viewed in plan, the floating conductive pattern is
A first part disposed between the first corner and the first conductive pattern,
a second portion disposed between the second corner and the first conductive pattern, and
A semiconductor light emitting device including a connection part connecting the first part and the second part.
According to claim 2,
When viewed in plan, the floating conductive pattern is
A first part disposed between the first corner and the first conductive pattern,
a second portion disposed between the second corner and the first conductive pattern,
A connecting part connecting the first part and the second part,
a first extension portion extending from the first portion between the fourth edge and the first conductive pattern, and
A semiconductor light emitting device comprising a second extension portion extending from the second portion between the second edge and the first conductive pattern.
According to claim 2,
When viewed in plan, the floating conductive pattern includes a portion disposed between the first conductive pattern and the first edge and a portion disposed between the second conductive pattern and the third edge.
According to claim 1,
When viewed in plan, the floating conductive pattern surrounds the first and second conductive patterns.
According to claim 1,
The floating conductive pattern includes a lower part overlapping the recess area, an upper part overlapping the upper surface of the protruding area, and an inclined part overlapping a side surface of the protruding area while connecting the lower part and the upper part. Semiconductor light emitting device.
According to claim 8,
A semiconductor light emitting device wherein the upper portion of the floating conductive pattern overlaps a portion of the upper surface of the contact structure.
According to claim 1,
An upper insulating pattern that covers the first and second conductive patterns and the floating conductive pattern and has a third opening exposing a portion of the first conductive pattern and a fourth opening exposing a portion of the second conductive pattern. ;
a first electrode disposed on the first conductive pattern exposed by the third opening; and
A semiconductor light emitting device further comprising a second electrode disposed on the second conductive pattern exposed by the fourth opening.
According to claim 1,
It further includes a substrate having a front side and a back side facing the front side,
the first semiconductor layer is disposed on the front surface of the substrate,
A semiconductor light emitting device wherein the front surface of the substrate has a concavo-convex structure.
a first semiconductor layer having a first region and a second region, and having a first corner, a second corner, a third corner, and a fourth corner sequentially arranged in a counterclockwise direction when viewed in plan;
an active layer and a second semiconductor layer sequentially stacked on the second region of the first semiconductor layer;
a contact structure disposed on the second semiconductor layer;
a lower insulating pattern covering the first semiconductor layer and the contact structure and having a first opening exposing a contact area of the first semiconductor layer and a second opening exposing a contact area of the contact structure; and
It includes a first conductive pattern, a second conductive pattern, and a floating conductive pattern disposed on the lower insulating pattern and spaced apart from each other,
The first and second conductive patterns and the floating conductive pattern have the same thickness in the same plane,
The first conductive pattern extends into the first opening of the lower insulating pattern and is electrically connected to the contact region of the first semiconductor layer,
The second conductive pattern extends into the second opening of the lower insulating pattern and is electrically connected to the contact structure,
The floating conductive pattern includes portions disposed between the first and second corners and the first conductive pattern.
According to claim 12,
The second area is a protruding area that protrudes upward from the first area,
The floating conductive pattern includes a lower portion overlapping the first region, an upper portion overlapping an upper surface of the second region, and an inclined portion connecting the lower portion and the upper portion.
According to claim 12,
A semiconductor light emitting device wherein the floating conductive pattern and the first conductive pattern are adjacent to each other and spaced apart from each other on the contact structure.
According to claim 12,
The first conductive pattern is electrically connected to the first semiconductor layer while contacting the contact area of the first semiconductor layer,
The second conductive pattern is electrically connected to the second semiconductor layer through the contact structure.
a first semiconductor layer having a recessed region and a protruding region;
an active layer and a second semiconductor layer sequentially stacked on the protruding area of the first semiconductor layer;
a contact structure disposed on the upper surface of the second semiconductor layer;
a lower insulating pattern covering the first semiconductor layer and the contact structure and having a first opening exposing a contact area of the first semiconductor layer and a second opening exposing a contact area of the contact structure;
a first conductive pattern disposed on the lower insulating pattern, extending into the first opening of the lower insulating pattern, and electrically connected to the contact region of the first semiconductor layer;
a second conductive pattern disposed on the lower insulating pattern, extending into the second opening of the lower insulating pattern, and electrically connected to the contact structure; and
a floating conductive pattern disposed on the lower insulating pattern and spaced apart from the first conductive pattern;
An upper portion covering the first and second conductive patterns and the floating conductive pattern and having a first opening exposing a contact area of the first conductive pattern and a second opening exposing a contact area of the second conductive pattern. insulating pattern;
a first electrode disposed on the contact area of the first conductive pattern; and
A semiconductor light emitting device comprising a second electrode disposed on the contact area of the second conductive pattern.
According to claim 16,
When viewed in plan, the first semiconductor layer has a first corner, a second corner, a third corner, and a fourth corner sequentially arranged in a counterclockwise direction, and a first corner between the first corner and the second corner. , a semiconductor light emitting device having a second corner between the second corner and the third corner, a third corner between the third corner and the fourth corner, and a fourth corner between the fourth corner and the first corner. device.
According to claim 17,
The floating conductive pattern includes a first portion adjacent to the first corner and a second portion adjacent to the second corner.
According to claim 18,
The floating conductive pattern includes a first portion adjacent to the first corner, a second portion adjacent to the second corner, and a connecting portion connecting the first and second portions and adjacent to the first corner. Semiconductor light emitting device.
According to claim 19,
The floating conductive pattern is a semiconductor light emitting device including a first extension portion extending from the first portion in a direction toward the fourth corner and a second extension portion extending from the second portion in a direction toward the third corner. .

Images