KR102316768B1 - Brightness enhancing layer and organic Light Emitting Diode Display Device including the same - Google Patents

Abstract

The present invention provides a luminance enhancing layer including an organic binder and open carbon nanotubes. The luminance enhancing layer is used as an insulating layer, and may increase luminance of an organic light emitting diode display, for example.

Description

Brightness enhancing layer and organic light emitting diode display device including the same

The present invention relates to an organic light emitting diode display, and more particularly, to a luminance enhancing layer capable of increasing the amount of light transmitted from the organic light emitting layer, and to an organic light emitting diode display having improved luminance including the same.

An organic light emitting diode (OLED) display, which is one of flat panel displays (FPD), has high luminance and low operating voltage characteristics.

And, since it is a self-luminous type that emits light by itself, the contrast ratio is large, it is possible to implement an ultra-thin display, and it is easy to implement a moving image with a response time of several microseconds (㎲), there is no limitation of the viewing angle, and it is stable even at low temperature. and it is driven with a low voltage of 5 to 15 V of DC, so it is easy to manufacture and design a driving circuit.

In addition, the manufacturing process of the organic light emitting diode display is very simple because deposition and encapsulation are everything.

The organic light emitting diode display device includes a plurality of pixel regions, in which a switching thin film transistor and a driving thin film transistor are formed.

In general, a thin film transistor is mainly manufactured using a semiconductor material such as amorphous silicon (amorphous silicon).

Recently, as large-area and high-resolution display devices are required, the need for a thin film transistor with stable operation and durability with a faster signal processing speed is emerging. ^{Since it is less than 2} /Vsec, the insufficient aspect to be used in large area and high resolution display devices was highlighted.

Accordingly, research on an oxide thin film transistor for forming an active layer of an oxide semiconductor material having excellent electrical characteristics such as mobility and off current is being actively conducted.

1 is a cross-sectional view schematically illustrating a conventional organic light emitting diode display.

As shown in FIG. 1 , the conventional organic light emitting diode display 10 includes a first substrate 10 , a second substrate (not shown) facing the first substrate 10 , and a first substrate ( 10) including a driving thin film transistor (Td) and a light emitting diode (D) sequentially formed thereon.

The first substrate 10 and the second substrate (not shown) facing each other and spaced apart include a plurality of pixel regions (not shown), and the first substrate 10 is referred to as a lower plate, a TFT substrate, or a backplane. Also, the second substrate (not shown) is also called an encapsulation substrate.

The driving thin film transistor Td includes a semiconductor layer 12 , a gate electrode 30 , a source electrode 52 , and a drain electrode 54 .

Specifically, the semiconductor layer 12 is positioned on the first substrate 10 . For example, the semiconductor layer 12 may be formed of an oxide semiconductor material.

A gate insulating layer 22 is formed on the entire surface of the first substrate 10 to cover the semiconductor layer 12 . The gate insulating film 22 is made of an inorganic insulating material such as silicon oxide or silicon nitride.

The gate electrode 30 is positioned on the gate insulating layer 22 and overlaps the semiconductor layer 12 .

An interlayer insulating film 40 having first and second semiconductor layer contact holes 42 and 44 exposing both sides of the semiconductor layer 12 is formed to cover the gate electrode 30 . The interlayer insulating film 40 is made of an organic insulating material such as photoacrylic.

The source electrode 52 and the drain electrode 54 are formed on the interlayer insulating layer 40 , and contact both sides of the semiconductor layer 12 through the first and second semiconductor layer contact holes 42 and 44 , respectively.

A planarization film 60 providing a flat surface and having a drain contact hole 62 exposing the drain electrode 54 is formed to cover the driving thin film transistor Td. The planarization layer 60 is formed of an organic insulating material.

The light emitting diode D is positioned on the planarization layer 60 and is electrically connected to the driving thin film transistor Td through the drain contact hole 62 . The light emitting diode D includes a first electrode 70 that is sequentially stacked, an organic light emitting layer 74 and a second electrode 76 .

The first electrode 70 is formed on the planarization layer 60 and is connected to the drain electrode 54 of the driving thin film transistor Td through the drain contact hole 62 . The first electrode 70 is formed for each pixel area. On the first electrode 70, a bank 72 covering the edge thereof is formed. The bank 72 is formed along the boundary of the pixel region and has an opening corresponding to the central portion of the first electrode 70 .

The organic light emitting layer 74 is in contact with the first electrode 70 and is formed in the opening of the bank 72 , and the second electrode 76 is in contact with the upper surface of the organic light emitting layer 74 and is formed of the first substrate 10 . formed in the front.

The first electrode 70 is an anode and is made of a conductive material having a relatively large work function value, and the second electrode 76 is a cathode and is made of a conductive material having a relatively small work function value. For example, the first electrode 70 is made of a transparent conductive material such as indium-tin-oxide (ITO) or indium-zinc-oxide (IZO), The second electrode 76 is made of aluminum (Al), magnesium (Mg), and an aluminum-magnesium alloy (AlMg).

In the light emitting diode (D), holes injected from the first electrode 70 and electrons injected from the second electrode 76 are combined in the organic light emitting layer 74 to form an exciton, and the exciton is in an excited state. While transitioning to the ground state, light is emitted from the organic light emitting layer 74 .

For example, when the organic light emitting diode display is a bottom light emitting device, light from the organic light emitting layer 74 includes the first electrode 70 , the planarization layer 60 , the interlayer insulating layer 40 , and the gate insulating layer 22 . ) and the first substrate 10 to display the image.

However, in the conventional organic light emitting diode display, only a part of the light emitted from the organic light emitting layer 74 passes through the first substrate 10 , and accordingly, the organic light emitting diode display has low luminance. In order to increase the luminance of the organic light emitting diode, there is a problem in that the driving voltage is increased.

The present invention seeks to minimize the loss of light emitted from the organic light emitting layer.

That is, an object of the present invention is to solve the problems of a decrease in luminance and an increase in driving voltage of an organic light emitting diode display.

In order to solve the above problems, the present invention provides a luminance enhancing layer including an organic binder and an open carbon nanotube.

In the luminance enhancing layer of the present invention, the open carbon nanotubes are arranged in the same direction.

In another aspect, the present invention provides a substrate, a thin film transistor positioned on the substrate, a light emitting diode positioned on the thin film transistor and connected to the thin film transistor, and a first positioned between the thin film transistor and the light emitting diode Provided is an organic light emitting diode display including a first luminance enhancing layer including open carbon nanotubes.

In the organic light emitting diode display of the present invention, the first open carbon nanotubes are arranged perpendicular to the substrate.

In the organic light emitting diode display device of the present invention, the first luminance enhancing layer includes a contact hole exposing an electrode of the thin film transistor, and the light emitting diode is connected to the thin film transistor through the contact hole.

In the organic light emitting diode display of the present invention, the light emitting diode includes a first electrode connected to the thin film transistor, an organic light emitting layer on the first electrode, and a second electrode on the organic light emitting layer, The light from the organic light emitting layer passes through the first luminance enhancing layer and the substrate to display an image.

In the organic light emitting diode display device of the present invention, the thin film transistor includes a semiconductor layer, a gate insulating film on the semiconductor layer, a gate electrode on the gate insulating film, a second luminance enhancing layer covering the gate electrode, A source electrode and a drain electrode are spaced apart from each other on the two luminance enhancing layers and respectively in contact with the semiconductor layer, and the second luminance enhancing layer includes a second open carbon nanotube.

In the organic light emitting diode display of the present invention, the second open carbon nanotubes are arranged perpendicular to the substrate.

In another aspect, the present invention provides a substrate, a thin film transistor positioned on the substrate, a light emitting diode positioned on the thin film transistor and connected to the thin film transistor, and an open carbon nanotube covering the light emitting diode. It provides an organic light emitting diode display including a luminance enhancing layer comprising:

In the organic light emitting diode display of the present invention, the open carbon nanotubes are vertically arranged with respect to the substrate.

In the organic light emitting diode display of the present invention, the light emitting diode includes a first electrode connected to the thin film transistor, an organic light emitting layer on the first electrode, and a second electrode on the organic light emitting layer, The light from the organic light emitting layer passes through the second electrode and the luminance enhancing layer to display an image.

In the organic light emitting diode display of the present invention, the first electrode includes a transparent conductive electrode layer and a reflective layer.

The present invention provides a luminance enhancing layer that includes an open carbon nano-carbon tube in an insulating film to increase light transmittance.

Accordingly, when the luminance enhancement layer including the open carbon nano-carbon tube is formed on the upper or lower portion of the light emitting diode, the amount of light emitted from the organic light emitting layer of the light emitting diode transmitted to the image display surface can be increased. That is, the luminance of the organic light emitting diode display increases and the driving voltage decreases.

In addition, since the luminance enhancing layer including the open carbon nano-carbon tube has insulating properties, it can be used as an insulating layer of an array substrate. Accordingly, it is possible to increase the luminance of the organic light emitting diode display without adding a configuration or adding a process.

1 is a cross-sectional view schematically illustrating a conventional organic light emitting diode display.
2 is a schematic circuit diagram of an organic light emitting diode display device according to an embodiment of the present invention.
3 is a schematic cross-sectional view of an organic light emitting diode display device according to a first embodiment of the present invention.
4 is a cross-sectional view illustrating a structure of a driving thin film transistor and a luminance enhancing layer of the organic light emitting diode display according to the first exemplary embodiment of the present invention.
5 is a schematic diagram showing vertically oriented carbon nanotubes (CNTs) on a Si substrate.
6 is a schematic perspective view illustrating a light path in a luminance enhancing layer.
7 is a schematic cross-sectional view of an organic light emitting diode display device according to a second embodiment of the present invention.
8 is a schematic cross-sectional view of an organic light emitting diode display according to a third embodiment of the present invention.

Hereinafter, an organic light emitting diode display device and a manufacturing method thereof according to the present invention will be described with reference to the accompanying drawings.

As described above, in the conventional organic light emitting diode display device, the planarization film 60 made of an organic insulating material, for example, a material such as phto-acryl, is a light emitting diode (D) and a driving thin film transistor (Td). is located between

In the organic light emitting diode display having such a structure, light emitted from the organic light emitting layer 74 passes through the planarization film 60 and is displayed through the back surface of the substrate 10 , and the light from the organic light emitting layer 74 is planarized. Total reflection or diffuse reflection occurs while passing through or on the surface of the membrane 60 . Accordingly, the amount of light passing through the substrate 10 among the light from the organic light emitting layer 74 decreases, and accordingly, the luminance of the organic light emitting diode display decreases.

In the present invention, an organic light emitting diode display capable of solving the problem of a decrease in luminance due to a layer stacked on the organic light emitting diode display such as the planarization film 60 will be described.

2 is a schematic circuit diagram of an organic light emitting diode display device according to an embodiment of the present invention.

As shown in FIG. 2 , the organic light emitting diode display device according to the first embodiment of the present invention includes a gate line GL and a data line DL that cross each other and define a pixel region P, respectively. A switching thin film transistor Ts, a driving thin film transistor Td, a storage capacitor Cst, and a light emitting diode D are formed in the pixel region P of .

In more detail, the gate electrode of the switching thin film transistor Ts is connected to the gate line GL and the source electrode is connected to the data line DL. The gate electrode of the driving thin film transistor Td is connected to the drain electrode of the switching thin film transistor Ts, and the source electrode is connected to the high potential voltage VDD. The anode of the light emitting diode D is connected to the drain electrode of the driving thin film transistor Td, and the cathode of the light emitting diode D is connected to the low potential voltage VSS. The storage capacitor Cst is connected to the gate electrode and the drain electrode of the driving thin film transistor Td.

Looking at the image display operation of such an organic light emitting diode display device, the switching thin film transistor Ts is turned on according to a gate signal applied through the gate line GL, and at this time, the data line DL is turned on. The applied data signal is applied to the gate electrode of the driving thin film transistor Td and one electrode of the storage capacitor Cst through the switching thin film transistor Ts.

The driving thin film transistor Td is turned on according to the data signal to control the current flowing through the light emitting diode D to display an image. The light emitting diode D emits light by the current of the high potential voltage VDD transmitted through the driving thin film transistor Td.

That is, since the amount of current flowing through the light emitting diode D is proportional to the size of the data signal, and the intensity of light emitted from the light emitting diode D is proportional to the amount of current flowing through the light emitting diode D, the pixel area P ) indicates different gray levels according to the size of the data signal, and as a result, the organic light emitting diode display displays an image.

The storage capacitor Cst maintains a charge corresponding to the data signal for one frame to keep the amount of current flowing through the light emitting diode D constant and to maintain the gradation displayed by the light emitting diode D constant. do

-First embodiment-

3 is a schematic cross-sectional view of an organic light emitting diode display device according to a first embodiment of the present invention. The brightness enhancing layer of the present invention will be described together with the organic light emitting diode display.

As shown in FIG. 3 , the organic light emitting diode display 100 according to the first embodiment of the present invention includes a driving thin film transistor Td, a luminance enhancing layer 160 covering the driving thin film transistor Td, and , a light emitting diode D positioned on the luminance enhancing layer 160 and connected to the driving thin film transistor Td.

Referring to FIG. 4 , which is a cross-sectional view showing the structure of the driving thin film transistor and the luminance enhancing layer of the organic light emitting diode display according to the first embodiment of the present invention, the driving thin film transistor Td includes a semiconductor layer 112 and a gate electrode. 130 , a source electrode 152 , and a drain electrode 154 .

Specifically, the semiconductor layer 112 is formed on the substrate 110 made of glass or plastic. For example, the semiconductor layer 112 may be formed of an oxide semiconductor material. In this case, a light blocking pattern (not shown) and a buffer layer (not shown) may be formed under the semiconductor layer 112 , and the light blocking pattern prevents light from being incident on the semiconductor layer 112 . It prevents deterioration by this light. Alternatively, the semiconductor layer 112 may be made of polycrystalline silicon, and in this case, both edges of the semiconductor layer 112 may be doped with impurities.

A gate insulating layer 122 made of an insulating material is formed on the entire surface of the substrate 110 on the semiconductor layer 112 . The gate insulating layer 122 may be made of an inorganic insulating material such as silicon oxide or silicon nitride.

A gate electrode 130 made of a conductive material such as metal is formed on the gate insulating layer 122 to correspond to the center of the semiconductor layer 112 . Also, a gate line (not shown) and a first capacitor electrode (not shown) may be formed on the gate insulating layer 122 . The gate wiring may extend along the first direction, and the first capacitor electrode may be connected to the gate electrode 130 .

Meanwhile, in the first embodiment of the present invention, the gate insulating layer 122 is formed on the entire surface of the substrate 110 , but the gate insulating layer 122 may be patterned in the same shape as the gate electrode 130 .

An interlayer insulating film 140 made of an insulating material is formed on the entire surface of the substrate 110 on the gate electrode 130 . The interlayer insulating layer 140 may be formed of an inorganic insulating material such as silicon oxide or silicon nitride, or an organic insulating material such as benzocyclobutene or photo-acryl.

The interlayer insulating layer 140 has first and second contact holes 142 and 144 exposing upper surfaces of both sides of the semiconductor layer 112 . The first and second contact holes 142 and 144 are positioned at both sides of the gate electrode 130 to be spaced apart from the gate electrode 130 . Here, the first and second contact holes 142 and 144 are also formed in the gate insulating layer 122 . In contrast, when the gate insulating layer 122 is patterned to have the same shape as the gate electrode 130 , the first and second contact holes 142 and 144 are formed only in the interlayer insulating layer 140 .

A source electrode 152 and a drain electrode 154 are formed on the interlayer insulating layer 140 using a conductive material such as a metal. In addition, a data line (not shown), a power line (not shown), and a second capacitor electrode (not shown) extending in the second direction may be formed on the interlayer insulating layer 140 .

The source electrode 152 and the drain electrode 154 are spaced apart from the center of the gate electrode 130 and contact both sides of the semiconductor layer 112 through the first and second contact holes 142 and 144, respectively. . Although not shown, the data line extends along the second direction and intersects the gate line to define the pixel region P, and the power line supplying the high potential voltage is spaced apart from the data line. The second capacitor electrode is connected to the drain electrode 154 and overlaps the first capacitor electrode to form a storage capacitor using the interlayer insulating film 140 between the first and second capacitor electrodes as a dielectric layer.

Meanwhile, the semiconductor layer 112 , the gate electrode 130 , the source electrode 152 , and the drain electrode 154 form a driving thin film transistor Td, and the driving thin film transistor Td is the semiconductor layer 112 . It has a coplanar structure in which the gate electrode 130 , the source electrode 152 , and the drain electrode 154 are positioned thereon.

Alternatively, the driving thin film transistor Td may have an inverted staggered structure in which a gate electrode is disposed under a semiconductor layer and a source electrode and a drain electrode are disposed above the semiconductor layer. In this case, the semiconductor layer may be made of amorphous silicon.

In addition, a switching thin film transistor (Ts in FIG. 2 ) having substantially the same structure as the driving thin film transistor Td is further formed on the substrate 110 . The gate electrode 130 of the driving thin film transistor Td is connected to a drain electrode (not shown) of the switching thin film transistor Ts, and the source electrode 152 of the driving thin film transistor Td is a power wiring (not shown). is connected to In addition, a gate electrode (not shown) and a source electrode (not shown) of the switching thin film transistor Ts are respectively connected to a gate line and a data line.

A luminance enhancing layer 160 including an open carbon nano-tube 162 is formed on the source electrode 152 and the drain electrode 154 over the entire surface of the substrate 110 . The brightness enhancing layer 160 has a flat top surface and has a drain contact hole 164 exposing the drain electrode 154 of the driving thin film transistor Td. Here, the drain contact hole 164 is illustrated as being formed directly above the second contact hole 144 , but may be formed to be spaced apart from the second contact hole 144 .

The luminance enhancing layer 160 includes an organic binder (not shown) and an open carbon nanotube 162 , and serves as an insulating layer along with a guide role of light emitted from the light emitting diode (D). Opened carbon nanotubes 162 are shown in FIG. 5 , which is a schematic diagram showing vertically oriented carbon nanotubes on a Si substrate. 5 is a schematic diagram showing vertically oriented carbon nanotubes on a Si substrate.

The organic binder is epoxy acrylate resin, urethane acrylate resin, polyester acrylate resin, silicone acrylate resin, amino acrylate resin, epoxy methacrylate resin, urethane methacrylate resin, polyester methacrylate resin, silicone methacrylate. It may be selected from an acrylate resin, an amino methacrylate resin, a polyester resin, a polyoletin resin, a polysiloxane resin, and a silicone-modified polyimide resin.

In addition, the brightness enhancing layer 160 may further include a monomer, an additive that is a silane coupling agent, a solvent, and a photoinitiator.

The light emitting diode D is positioned on the luminance enhancing layer 160 and is sequentially stacked on the first electrode 170 and the first electrode 170 connected to the drain electrode 154 of the driving thin film transistor Td. It includes an organic light emitting layer 174 and a second electrode 176 .

The first electrode 170 is made of a conductive material having a relatively large work function value, and is formed separately for each pixel area (P in FIG. 2 ). For example, the first electrode 170 may be made of a transparent conductive material such as indium-tin-oxide (ITO) or indium-zinc-oxide (IZO).

The organic light emitting layer 174 has a single layer structure of an emitting material layer, or a hole injection layer, a hole transporting layer, a light emitting material layer, and an electron transporting layer. , may have a multilayer structure of an electron injection layer.

The second electrode 176 is made of a material having a relatively large work function value, and may be integrally formed with respect to the entire surface of the display area including the plurality of pixel areas P. For example, the second electrode 176 may be formed of any one of aluminum (Al), magnesium (Mg), and an aluminum-magnesium alloy (AlMg).

Also, a bank 172 having an opening covering an edge of the first electrode 170 and exposing a central portion of the first electrode 170 may be further formed on the luminance enhancing layer 160 .

Holes from the first electrode 170 and electrons from the second electrode 176 are combined in the organic light emitting layer 174 to generate excitons, and as the excitons fall from the excited state to the ground state, the light emitting diode D ), that is, the organic light emitting layer 174 emits light.

In the organic light emitting diode display 100 according to the first embodiment of the present invention, light from the organic light emitting layer 174 passes through the luminance enhancing layer 160 and the substrate 110 to display an image. That is, it is a bottom emission type organic light emitting diode display device. At this time, the light from the organic light emitting layer 174 is guided by the open carbon nanotubes 162 of the luminance enhancing layer 160 , so that the luminance of the organic light emitting diode display 100 is increased.

That is, referring to FIG. 6 , which is a schematic perspective view showing a light path in the luminance enhancing layer, light from the light emitting diode D is emitted from one end of the open carbon nanotube 162 of the luminance enhancing layer (160 in FIG. 3 ). Since it is introduced into the inner space through and is guided toward the substrate ( 110 in FIG. 3 ) through the other end of the open carbon nanotube 162 , straightness toward the substrate 110 is increased. Accordingly, the amount of total reflection or diffuse reflection of light from the light emitting diode D decreases and the amount of light directed toward the substrate 110 increases, so that the luminance of the organic light emitting diode display 100 increases.

3 and 4 , it is shown that all of the open carbon nanotubes 162 are vertically arranged with respect to the substrate 110 . That is, the open carbon nanotubes 162 are arranged parallel to the traveling direction of light. In other words, the open carbon nanotubes 162 are arranged in the same direction. Alternatively, the open carbon nanotubes 162 may be randomly arranged. Even if the open carbon nanotubes 162 are disorderly arranged, some of them are arranged perpendicularly or obliquely to the substrate 110 and thus serve as a light path.

The open carbon nanotube 162 has an empty inside and both ends are open. That is, light enters the open end of the open carbon nanotube 162 , proceeds through the inner space, and exits through the other open end of the open carbon nanotube 162 , thereby increasing the straightness of light. At this time, the open carbon nanotube 162 has a single-layer or double-layer shell to form an internal space. For example, as shown in FIG. 3 , the open carbon nanotubes 162 are arranged perpendicular to the substrate 110 , and the length of the open carbon nanotubes 162 in a direction perpendicular to the substrate 110 . is smaller than the thickness of the luminance enhancing layer 160 , and both ends of the open carbon nanotubes 162 are covered by the luminance enhancing layer 160 .

The open carbon nanotubes 162 may be obtained by growing the hollow carbon nanotubes on a silicon substrate and etching the end of the carbon nanotubes on the opposite side of the substrate.

That is, the carbon nanotube is grown in an open state at the end contacting the substrate surface, but in a closed state at the opposite end. Therefore, only when the closed end of the carbon nanotube is removed, as in the present invention, the open carbon nanotube 162 capable of providing a path of light can be obtained. For example, the closed end of the carbon nanotube may be etched open by plasma treatment.

Since the luminance enhancing layer 160 is formed instead of the conventional planarization layer ( 60 in FIG. 1 ), a separate process is not required. Accordingly, the luminance of the organic light emitting diode display 100 may be increased without adding a process or an additional layer.

Table 1 shows optical characteristics in the case of using the conventional planarization film (Comparative Example) and the case of using the luminance enhancing layer according to the present invention (Experimental Example) in the organic light emitting diode display of the first embodiment described above.

As shown in Table 1, it can be seen that the light efficiency of the organic light emitting diode display including the luminance enhancing layer including the open carbon nanotubes as in the present invention is greatly improved.

Meanwhile, since the drain contact hole 164 exposing the drain electrode 154 must be formed in the luminance enhancing layer 160 , a photo-lithography process must be performed. In this case, the drain contact hole 164 should be formed to have a size corresponding to the pattern formed on the exposure mask.

comparative example

Silicone acrylate resin (binder, 15 wt%), pentaerythritol hexaacrylate (monomer, 10 wt%), 3-glycidoxytrimethoxysilane (additive, 3 wt%), propylene glycol monomethyl ether acetate ( A composition containing a solvent, 70 wt%) and 1-hydroxycyclohexylphenyl ketone (photoinitiator, 2 wt%) was coated and cured to form an insulating film, and an exposure mask having a transmittance of 6㎛*9㎛ A photolithography process was performed using

Experimental example

Silicone acrylate resin (binder, 15 wt%), open carbon nanotubes (5 wt%), pentaerythritol hexaacrylate (monomer, 15 wt%), 3-glycidoxytrimethoxysilane (additive, 3 wt%), propylene glycol monomethyl ether acetate (solvent, 60 wt%) and 1-hydroxycyclohexylphenylketone (photoinitiator, 2 wt%) were coated and cured to form an insulating film, A photolithography process was performed using an exposure mask having a transmissive portion of μm*9 μm.

As shown in Table 2, in order to form a contact hole of a desired size, an exposure dose of about 160 mJ/cm 2 is required in the Comparative Example, whereas an exposure dose of about 40 mJ/cm 2 is required in the Experimental Example. Accordingly, in the case of the luminance enhancing layer of the present invention, it can be seen that the power consumption for the photolithography process is reduced.

As described above, the luminance enhancing layer of the present invention has the advantage of reducing power consumption for the photolithography process while increasing the amount of light transmission.

-Second embodiment-

7 is a schematic cross-sectional view of an organic light emitting diode display device according to a second embodiment of the present invention.

As shown in FIG. 7 , in the organic light emitting diode display 200 according to the second embodiment of the present invention, a driving thin film transistor Td and a first luminance enhancing layer which is an inner layer of the driving thin film transistor Td. 240, a second luminance enhancing layer 260 covering the driving thin film transistor Td, and a light emitting diode D positioned on the second luminance enhancing layer 260 and connected to the driving thin film transistor Td include

The driving thin film transistor Td includes a semiconductor layer 212 , a gate electrode 230 , a source electrode 252 , and a drain electrode 254 .

A semiconductor layer 212 is formed on the substrate 210 made of glass or plastic. For example, the semiconductor layer 212 may be formed of an oxide semiconductor material. In this case, a light blocking pattern (not shown) and a buffer layer (not shown) may be formed under the semiconductor layer 212 , and the light blocking pattern prevents light from being incident on the semiconductor layer 212 to prevent the semiconductor layer 212 from being incident on the semiconductor layer 212 . It prevents deterioration by this light. Alternatively, the semiconductor layer 212 may be made of polycrystalline silicon, and in this case, both edges of the semiconductor layer 212 may be doped with impurities.

A gate insulating layer 222 made of an insulating material is formed on the entire surface of the substrate 210 on the semiconductor layer 212 . The gate insulating layer 222 may be made of an inorganic insulating material such as silicon oxide or silicon nitride.

A gate electrode 230 made of a conductive material such as metal is formed on the gate insulating layer 222 to correspond to the center of the semiconductor layer 212 . Also, a gate line (not shown) and a first capacitor electrode (not shown) may be formed on the gate insulating layer 222 . The gate wiring may extend in the first direction, and the first capacitor electrode may be connected to the gate electrode 230 .

Meanwhile, although the gate insulating layer 222 is formed on the entire surface of the substrate 210 , the gate insulating layer 222 may be patterned in the same shape as the gate electrode 230 .

A first luminance enhancing layer 240 including the first open carbon nanotubes 241 is formed on the entire surface of the substrate 110 on the gate electrode 230 . The first luminance enhancing layer 240 includes an organic binder (not shown) and the first open carbon nanotubes 241 , and serves as an insulating layer along with a guide role of light emitted from the light emitting diode (D). .

The first luminance enhancing layer 240 has first and second contact holes 242 and 244 exposing upper surfaces of both sides of the semiconductor layer 212 . The first and second contact holes 242 and 244 are positioned at both sides of the gate electrode 230 to be spaced apart from the gate electrode 230 . Here, the first and second contact holes 242 and 244 are also formed in the gate insulating layer 222 . Alternatively, when the gate insulating layer 222 is patterned to have the same shape as the gate electrode 230 , the first and second contact holes 242 and 244 are formed only in the first luminance enhancing layer 240 .

A source electrode 252 and a drain electrode 254 made of a conductive material such as metal are formed on the first luminance enhancing layer 240 . Also, a data line (not shown), a power line (not shown), and a second capacitor electrode (not shown) extending in the second direction may be formed on the first luminance enhancing layer 240 .

The source electrode 252 and the drain electrode 254 are spaced apart from the center of the gate electrode 230 and contact both sides of the semiconductor layer 212 through the first and second contact holes 242 and 244 , respectively. . Although not shown, the data line extends along the second direction and intersects the gate line to define a pixel area, and the power line for supplying a high potential voltage is spaced apart from the data line. The second capacitor electrode is connected to the drain electrode 254 of the driving thin film transistor Td and overlaps the first capacitor electrode, so that the first luminance enhancing layer 240 between the first and second capacitor electrodes is used as a dielectric layer for storage. make up a capacitor

The semiconductor layer 212 , the gate electrode 230 , the source electrode 252 , and the drain electrode 254 form a driving thin film transistor Td, which is disposed on the semiconductor layer 212 . It has a coplanar structure in which the gate electrode 230 , the source electrode 252 , and the drain electrode 254 are positioned.

Alternatively, the driving thin film transistor Td may have an inverted staggered structure in which a gate electrode is disposed under a semiconductor layer and a source electrode and a drain electrode are disposed above the semiconductor layer. In this case, the semiconductor layer may be made of amorphous silicon.

In addition, a switching thin film transistor (Ts in FIG. 2 ) having substantially the same structure as the driving thin film transistor Td is further formed on the substrate 210 . The gate electrode 230 of the driving thin film transistor Td is connected to a drain electrode (not shown) of the switching thin film transistor Ts, and the source electrode 252 of the driving thin film transistor Td is a power wiring (not shown). is connected to In addition, a gate electrode (not shown) and a source electrode (not shown) of the switching thin film transistor Ts are respectively connected to a gate line and a data line.

A second luminance enhancing layer 260 including a second open carbon nano-tube 262 is formed on the entire surface of the substrate 210 on the source electrode 252 and the drain electrode 254 . The second luminance enhancing layer 260 has a flat top surface and has a drain contact hole 264 exposing the drain electrode 254 of the driving thin film transistor Td. Here, the drain contact hole 264 is illustrated as being formed directly above the second contact hole 244 , but may be formed to be spaced apart from the second contact hole 244 .

The second luminance enhancing layer 260 includes an organic binder (not shown) and the second open carbon nanotubes 262 , and serves as an insulating layer along with a guide role of light emitted from the light emitting diode (D). .

The light emitting diode D is disposed on the second luminance enhancing layer 260 and is sequentially disposed on the first electrode 270 connected to the drain electrode 254 of the driving thin film transistor Td and on the first electrode 270 . The organic light emitting layer 274 and the second electrode 276 are stacked.

The first electrode 270 is made of a conductive material having a relatively large work function value, and is formed separately for each pixel area (P in FIG. 2 ). For example, the first electrode 270 may be made of a transparent conductive material such as indium-tin-oxide (ITO) or indium-zinc-oxide (IZO).

The organic light emitting layer 274 has a single layer structure of an emitting material layer, or a hole injection layer, a hole transporting layer, a light emitting material layer, and an electron transporting layer. , may have a multilayer structure of an electron injection layer.

The second electrode 276 is made of a material having a relatively large work function value, and may be integrally formed with respect to the entire surface of the display area including the plurality of pixel areas (P in FIG. 2 ). For example, the second electrode 276 may be formed of any one of aluminum (Al), magnesium (Mg), and an aluminum-magnesium alloy (AlMg).

Also, a bank 272 having an opening covering an edge of the first electrode 270 and exposing a central portion of the first electrode 270 may be further formed on the second luminance enhancing layer 260 .

Holes from the first electrode 270 and electrons from the second electrode 276 are combined in the organic light emitting layer 274 to generate excitons, and as the excitons fall from the excited state to the ground state, the light emitting diode D ), that is, the organic light emitting layer 274 emits light.

In the organic light emitting diode display 200 according to the second embodiment of the present invention, light from the organic light emitting layer 274 passes through the first and second luminance enhancing layers 240 and 260 and the substrate 210 to form an image. will display That is, it is a bottom emission type organic light emitting diode display device. At this time, the light from the organic light emitting layer 274 is guided by the first and second open carbon nanotubes 241 and 262 of the first and second luminance enhancing layers 240 and 260, so that the organic light emitting diode display device ( 200) is increased.

That is, the light from the light emitting diode D passes through the inner spaces of the first and second open carbon nanotubes 241 and 262 of the first and second luminance enhancing layers 240 and 260 to increase the straightness. . Accordingly, the amount of total reflection or diffuse reflection of light from the light emitting diode D decreases and the amount of light directed toward the substrate 210 increases, so that the luminance of the organic light emitting diode display 200 increases.

Referring back to FIG. 6 , light from the light emitting diode D is emitted from the first open carbon nanotubes ( 241 in FIG. 7 ) and the second brightness enhancing layer ( FIG. 7 ) of the first luminance enhancing layer ( 240 in FIG. 7 ). 260 of the second open carbon nanotubes (262 in FIG. 7) are introduced into the inner space through one end of each, and are guided toward the substrate (210 in FIG. 7) through the other end of each, the substrate 210 straightness in the direction increases. Accordingly, the amount of total reflection or diffuse reflection of light from the light emitting diode D decreases and the amount of light directed toward the substrate 210 increases, so that the luminance of the organic light emitting diode display 200 increases.

In FIG. 7 , it is shown that both the first and second open carbon nanotubes 241 and 262 are vertically arranged with respect to the substrate 210 . Alternatively, the first and second open carbon nanotubes 241 and 262 may be randomly arranged. Although the first and second open carbon nanotubes 241 and 262 are disorderly arranged, some of them are arranged perpendicularly or obliquely to the substrate 210 , and thus serve as a light path.

The first and second open carbon nanotubes 241 and 262 have an empty interior and open ends. That is, light is introduced into the open ends of the first and second open carbon nanotubes 241 and 262 to proceed to the inner space, and the other open ends of the first and second open carbon nanotubes 241 and 262 are introduced. As it escapes, the straightness of light increases. In this case, the first and second open carbon nanotubes 241 and 262 have single-layer or double-layered shells to form an internal space.

The first luminance enhancing layer 240 corresponds to a position of the interlayer insulating film (240 in FIG. 1) of a general organic light emitting diode display device, and the second luminance enhancing layer 260 is a planarization layer (FIG. 1) of a general organic light emitting diode display device. 260) corresponds to the location. In this case, although it is shown in FIG. 7 that both the first luminance enhancing layer 240 and the second luminance enhancing layer 260 include open carbon nanotubes 241 and 262 , the present invention is not limited thereto. That is, only the first luminance enhancing layer 240 includes the open carbon nanotubes 241 , and a general planarization layer may be formed instead of the second luminance enhancing layer 260 .

In other words, the organic light emitting diode display according to the first and second embodiments of the present invention includes carbon nanotubes in which at least one of an interlayer insulating film or a planarization layer is open, thereby serving as a luminance enhancing layer and driving accordingly. There is an effect of increasing the luminance of the organic light emitting diode display without increasing the voltage.

-Third embodiment-

8 is a schematic cross-sectional view of an organic light emitting diode display according to a third embodiment of the present invention.

As shown in FIG. 8 , the organic light emitting diode display 300 according to the third embodiment of the present invention includes a driving thin film transistor Td, a light emitting diode D connected to the driving thin film transistor Td, and , and a luminance enhancing layer 380 covering the driving thin film transistor Td.

The driving thin film transistor Td includes a semiconductor layer 312 , a gate electrode 330 , a source electrode 352 , and a drain electrode 354 .

A semiconductor layer 312 is formed on the substrate 310 made of glass or plastic. For example, the semiconductor layer 312 may be formed of an oxide semiconductor material. Alternatively, the semiconductor layer 312 may be made of polycrystalline silicon, and in this case, both edges of the semiconductor layer 312 may be doped with impurities.

A gate insulating layer 322 made of an insulating material is formed on the entire surface of the substrate 310 on the semiconductor layer 312 . The gate insulating layer 322 may be made of an inorganic insulating material such as silicon oxide or silicon nitride.

A gate electrode 330 made of a conductive material such as metal is formed on the gate insulating layer 322 to correspond to the center of the semiconductor layer 312 . Also, a gate line (not shown) and a first capacitor electrode (not shown) may be formed on the gate insulating layer 322 . The gate wiring may extend in the first direction, and the first capacitor electrode may be connected to the gate electrode 330 .

Meanwhile, although the gate insulating layer 322 is formed on the entire surface of the substrate 310 , the gate insulating layer 322 may be patterned in the same shape as the gate electrode 330 .

An interlayer insulating layer 340 made of an insulating material is formed on the entire surface of the substrate 310 on the gate electrode 330 . The interlayer insulating layer 340 may be formed of an inorganic insulating material such as silicon oxide or silicon nitride, or an organic insulating material such as benzocyclobutene or photo-acryl.

The interlayer insulating layer 340 has first and second contact holes 342 and 344 exposing top surfaces of both sides of the semiconductor layer 112 . The first and second contact holes 342 and 344 are positioned at both sides of the gate electrode 330 to be spaced apart from the gate electrode 330 . Here, the first and second contact holes 342 and 344 are also formed in the gate insulating layer 322 . In contrast, when the gate insulating layer 322 is patterned to have the same shape as the gate electrode 330 , the first and second contact holes 342 and 344 are formed only in the interlayer insulating layer 340 .

A source electrode 352 and a drain electrode 354 are formed on the interlayer insulating layer 340 using a conductive material such as a metal. Also, a data line (not shown), a power line (not shown), and a second capacitor electrode (not shown) extending in the second direction may be formed on the interlayer insulating layer 340 .

The source electrode 352 and the drain electrode 354 are spaced apart from the center of the gate electrode 330 and contact both sides of the semiconductor layer 312 through first and second contact holes 342 and 344 , respectively. . Although not shown, the data line extends along the second direction and intersects the gate line to define a pixel area, and the power line for supplying a high potential voltage is spaced apart from the data line. The second capacitor electrode is connected to the drain electrode 354 of the driving thin film transistor Td and overlaps the first capacitor electrode, thereby forming a storage capacitor using the interlayer insulating film 340 between the first and second capacitor electrodes as a dielectric layer. .

The semiconductor layer 312 , the gate electrode 330 , the source electrode 152 , and the drain electrode 354 form a driving thin film transistor Td, which is disposed on the semiconductor layer 312 . It has a coplanar structure in which the gate electrode 330 , the source electrode 352 , and the drain electrode 354 are positioned.

Alternatively, the driving thin film transistor Td may have an inverted staggered structure in which a gate electrode is disposed under a semiconductor layer and a source electrode and a drain electrode are disposed above the semiconductor layer. In this case, the semiconductor layer may be made of amorphous silicon.

In addition, a switching thin film transistor (Ts in FIG. 2 ) having substantially the same structure as the driving thin film transistor Td is further formed on the substrate 310 . The gate electrode 330 of the driving thin film transistor Td is connected to the drain electrode (not shown) of the switching thin film transistor Ts, and the source electrode 352 of the driving thin film transistor Td is a power supply line (not shown). is connected to In addition, a gate electrode (not shown) and a source electrode (not shown) of the switching thin film transistor Ts are respectively connected to a gate line and a data line.

A planarization layer 360 is formed over the entire surface of the substrate 310 on the source electrode 352 and the drain electrode 354 . The planarization layer 360 has a flat top surface and has a drain contact hole 364 exposing the drain electrode 354 of the driving thin film transistor Td. Here, the drain contact hole 364 is illustrated as being formed directly above the second contact hole 344 , but may be formed to be spaced apart from the second contact hole 344 .

The light emitting diode D is disposed on the planarization layer 360 and includes a first electrode 370 connected to the drain electrode 354 of the driving thin film transistor Td, and an organic layer sequentially stacked on the first electrode 370 . It includes a light emitting layer 374 and a second electrode 376 .

The first electrode 370 is made of a conductive material having a relatively large work function value and is formed separately for each pixel area (P in FIG. 2 ). For example, the first electrode 370 may be made of a transparent conductive material such as indium-tin-oxide (ITO) or indium-zinc-oxide (IZO).

The organic light emitting layer 374 has a single layer structure of an emitting material layer, or a hole injection layer, a hole transporting layer, a light emitting material layer, and an electron transporting layer. , may have a multilayer structure of an electron injection layer.

The second electrode 376 may be made of a material having a relatively large work function value, and may be integrally formed with respect to the entire surface of the display area including the plurality of pixel areas P. For example, the second electrode 376 may be formed of any one of aluminum (Al), magnesium (Mg), and an aluminum-magnesium alloy (AlMg).

In this case, the second electrode 376 has a relatively thin thickness so that light is transmitted, and the light transmittance of the second electrode 392 may be about 45-50%. That is, the organic light emitting diode display 300 according to the third embodiment of the present invention is a top emission type in which light from the organic light emitting layer 374 passes through the second electrode 392 to display an image. am.

To improve light efficiency, the first electrode 370 may further include a reflective layer (not shown) made of an opaque conductive material, and may have a multi-layered structure including a transparent conductive electrode layer and a reflective layer made of an opaque conductive material. For example, the reflective layer may be formed of an aluminum-palladium-copper (APC) alloy, and the first electrode 370 may have a triple layer structure of ITO/APC/ITO.

Also, a bank 372 having an opening covering an edge of the first electrode 370 and exposing a central portion of the first electrode 370 may be further formed on the planarization layer 360 .

The luminance enhancing layer 380 covers the light emitting diode D and includes an open carbon nano-tube 382 . That is, the luminance enhancing layer 380 is positioned on the second electrode 376 and corresponds to the entire surface of the substrate 310 .

The luminance enhancing layer 380 includes an organic binder (not shown) and an open carbon nanotube 382 , and serves as a guide for light emitted from the light emitting diode (D).

Holes from the first electrode 370 and electrons from the second electrode 376 are combined in the organic light emitting layer 374 to generate excitons, and as the excitons fall from the excited state to the ground state, the light emitting diode D ), that is, the organic light emitting layer 374 emits light.

As described above, in the organic light emitting diode display 300 according to the third embodiment of the present invention, light from the organic light emitting layer 374 passes through the second electrode 376 and the luminance enhancing layer 380 to form an image. This is the top emission method displayed. In this case, the light from the organic light emitting layer 374 is guided by the open carbon nanotubes 382 of the luminance enhancing layer 380 , so that the luminance of the organic light emitting diode display 300 is increased.

Referring back to FIG. 6 , the light from the light emitting diode D flows into the inner space through one end of the open carbon nanotube ( 382 in FIG. 8 ) of the luminance enhancing layer ( 380 in FIG. 8 ), and through the other end. Since it is guided toward the outer surface of the luminance enhancing layer 380, the straightness of light is increased. Accordingly, the amount of total or diffuse reflection of light from the light emitting diode D is decreased and the amount of light directed toward the outer surface of the luminance enhancing layer 380 is increased, so that the luminance of the organic light emitting diode display 300 is increased. do.

In FIG. 8 , it is shown that all of the open carbon nanotubes 382 are vertically arranged with respect to the substrate 310 . Alternatively, the open carbon nanotubes 382 may be randomly arranged. Even if the open carbon nanotubes 382 are randomly arranged, some of them are arranged perpendicularly or obliquely to the substrate 310 and thus serve as a light path.

The open carbon nanotube 382 has an empty inside and both ends are open. That is, light is introduced into the open end of the open carbon nanotube 382 , proceeds through the inner space, and exits through the other open end of the open carbon nanotube 382 , thereby increasing the straightness of light. At this time, the open carbon nanotube 382 has a single-layer or double-layered shell to form an internal space.

In the top emission type organic light emitting diode display 300 according to the third embodiment of the present invention, the luminance enhancement layer is positioned on the second electrode 376 and includes an open carbon nanotube 382 providing a light path. Since 380 is included, the luminance of the organic light emitting diode display 300 is increased without increasing the driving voltage.

Although the above has been described with reference to the preferred embodiment of the present invention, those skilled in the art can variously modify and change the present invention within the scope without departing from the spirit and scope of the present invention described in the claims below. You will understand that it can be done.

100, 200, 300: organic light emitting diode display device
110, 210, 310: substrate 112, 212, 312: semiconductor layer
122, 222, 322: gate insulating layer 130, 230, 330: gate electrode
140, 340: interlayer insulating film 152, 252, 352: source electrode
154, 254, 354: drain electrodes 170, 270, 370: first electrode
172, 272, 372: banks 174, 274, 374: organic light emitting layer
176, 276, 376: second electrode 160, 240, 260, 280: brightness enhancing layer
162, 241, 262, 282: open carbon nanotubes
360: planarization layer Td: driving thin film transistor
Ts: switching thin film transistor D: light emitting diode

Claims (13)

an organic binder;
open carbon nanotubes
A luminance enhancing layer having insulating properties comprising:
The method of claim 1,
The open carbon nanotubes are luminance enhancing layers arranged in the same direction.
a substrate;
a thin film transistor positioned on the substrate;
a light emitting diode positioned above the thin film transistor and connected to the thin film transistor;
A first luminance enhancing layer positioned between the thin film transistor and the light emitting diode and including a first open carbon nanotube
An organic light emitting diode display comprising a.
4. The method of claim 3,
The first open carbon nanotubes are vertically arranged with respect to the substrate.
4. The method of claim 3,
The first luminance enhancing layer includes a contact hole exposing an electrode of the thin film transistor, and the light emitting diode is connected to the thin film transistor through the contact hole.
4. The method of claim 3,
The light emitting diode includes a first electrode connected to the thin film transistor, an organic light emitting layer on the first electrode, and a second electrode on the organic light emitting layer,
An organic light emitting diode display device in which light from the organic light emitting layer passes through the first luminance enhancing layer and the substrate to display an image.
4. The method of claim 3,
The thin film transistor may include a semiconductor layer, a gate insulating film on the semiconductor layer, a gate electrode on the gate insulating film, a second luminance enhancing layer covering the gate electrode, and spaced apart from each other on the second luminance enhancing layer and the semiconductor layer and a source electrode and a drain electrode in contact with each,
and the second luminance enhancing layer includes a second open carbon nanotube.
8. The method of claim 7,
The second open carbon nanotubes are vertically arranged with respect to the substrate.
a substrate;
a thin film transistor positioned on the substrate;
a light emitting diode positioned above the thin film transistor and connected to the thin film transistor;
and a luminance enhancing layer covering the light emitting diode and including an open carbon nanotube,
The open carbon nanotubes are arranged perpendicular to the substrate,
In a direction perpendicular to the substrate, a length of the open carbon nanotube is smaller than a thickness of the brightness enhancing layer, so that both ends of the open carbon nanotube are covered by the brightness enhancing layer.

delete 10. The method of claim 9,
The light emitting diode includes a first electrode connected to the thin film transistor, an organic light emitting layer on the first electrode, and a second electrode on the organic light emitting layer,
The organic light emitting diode display device in which light from the organic light emitting layer passes through the second electrode and the luminance enhancing layer to display an image.
12. The method of claim 11,
The first electrode includes an organic light emitting diode display including a transparent conductive electrode layer and a reflective layer.
10. The method of claim 9,
The luminance enhancing layer is an organic light emitting diode display having an insulating property.

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