KR100829011B1 - Video display - Google Patents

Abstract

The present invention relates to a video display device.

According to an exemplary embodiment of the present invention, an image display apparatus includes an image display panel including an electrode, a controller configured to generate a first signal to display an image signal supplied from the outside, and a first signal electrically connected to the controller. A voltage dropping portion and a voltage dropping portion including a first stage to be transmitted and a second stage to receive a reference voltage from a voltage source, and forming a difference between the first signal supplied to the first stage and the reference voltage supplied to the second stage; And a driver configured to receive a difference between the first signal and the reference voltage formed by the second signal, convert the digital signal into a digital logic signal, and form a second signal for supplying the electrode to the electrode.

Description

Video display device {Picture Display Apparatus}

1 is a view for explaining an example of a video display device according to the present invention.

2 is a diagram for explaining an example of a plasma display panel as an example of an image display panel;

3 is a view for explaining an example of a method of driving a plasma display panel as shown in FIG.

4 is an example for explaining the relationship between the control unit and the drive unit.

FIG. 5A is a diagram for explaining the voltage drop unit shown in FIG. 4. FIG.

5B is a diagram illustrating a conventional differential signal transmission circuit.

***** Explanation of symbols for the main parts of the drawing *****

110: plasma display panel 110: scan driver

120: sustain driver 130: data driver

140: control unit 400: transmission line

410: voltage drop

The present invention relates to a video display device.

In general, an image display apparatus is formed by arranging an image display panel displaying an image and a driving unit for driving the image display panel on the rear surface of the image display panel.

The driving unit is disposed on a frame disposed on the rear surface of the image display panel and drives the image display panel.

Such an image display device requires a halo because it does not have self-luminous property unlike a cathode ray tube and a CRT, which is a display device that makes a visible image using electrons emitted from a cathode in a vacuum. Low power consumption, low power consumption, portable use, LCD (liquid crystal display), a kind of flat panel display widely used in wristwatches and computers, and electroluminescent phenomenon that emits light when electric current flows to fluorescent organic compound There are OLEDs (Organic Light Emitting Diodes) for displaying an image using a 'self-emitting organic material' that emits light, and a Plasma Display Apparatus for displaying an image using light emitted from a plasma.

Such a video display device is in the spotlight as a video display device.

An image display device according to an example of the present invention is to provide an image display device having a more improved signal transmission characteristics by reducing the signal transmission circuit and a reduction in manufacturing cost.

According to an exemplary embodiment of the present invention, an image display apparatus includes an image display panel including an electrode, a controller configured to generate a first signal to display an image signal supplied from the outside, and a first signal electrically connected to the controller. A voltage dropping portion and a voltage dropping portion including a first stage to be transmitted and a second stage to receive a reference voltage from a voltage source, and forming a difference between the first signal supplied to the first stage and the reference voltage supplied to the second stage; And a driver configured to receive a difference between the first signal and the reference voltage formed by the second signal, convert the digital signal into a digital logic signal, and form a second signal for supplying the electrode to the electrode.

In addition, the first signal may swing in a voltage range of 100 [mV] or more and 400 [mV] or less.

In addition, the first signal may be any one of a data signal, a control signal, and a clock signal.

In addition, the voltage drop unit may include a resistor element electrically connected between the first and second stages.

In addition, the electrode may be any one of an address electrode, a scan electrode, and a sustain electrode.

The driver may be any one of a data driver, a scan driver, and a sustain driver.

In addition, when the driver is a data driver and the electrode is an address electrode, the first signal includes a data signal, a control signal and a clock signal, and the second signal is a data signal including a data voltage supplied to the address electrode in the address period. Can be.

In addition, when the driver is a scan driver and the electrode is a scan electrode, the first signal includes a control signal and a clock signal for controlling a switching element included in the scan driver, and the second signal includes a reset period, an address period, and a sustain. It may be a scan electrode driving signal supplied to the scan electrode in the period.

In addition, the signal transmission apparatus according to an embodiment of the present invention includes a transmitter for transmitting a first signal supplied from the outside, a first stage electrically connected to the transmitter to receive the first signal, and a second stage to receive the reference voltage from the voltage source. And a voltage drop unit forming a difference between the first signal supplied to the first stage and the reference voltage supplied to the second stage and a difference between the first signal formed from the voltage drop unit and the reference voltage. It includes a receiver for converting to.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a view for explaining an example of a video display device according to the present invention.

According to the present invention, a video display device includes a cathode-ray tube, a liquid crystal display (LCD), organic light emitting diodes (OLEDs), a plasma display device, an electroluminescent device (EL) Light Emitting Diode (LED), Vacuum Fluorescent Display (VFD), Field Emission Display (FED), Liquid Crystal Display (LCD), etc. In FIG. 1, a plasma display device is described as an example.

As shown, the plasma display apparatus includes a plasma display panel 100, a scan driver 110, a sustain driver 120, a data driver 130, and a controller 140.

The plasma display panel 100 includes scan electrodes Y1 to Yn, sustain electrodes Z, and address electrodes X1 to Xm formed in a direction crossing the scan electrodes Y1 to Yn and the sustain electrode Z. FIG. It includes.

The scan driver 110 supplies the scan electrode driving signals to the scan electrodes Y1 to Yn during the reset period, the address period, and the sustain period. For example, the scan driver 110 may supply at least one of the setup signal or the set down signal to the scan electrodes Y1 to Yn in the reset period, and scan the scan reference voltage and each discharge cell in the address period. The scan signal may be supplied to the scan electrodes Y1 to Yn, and the sustain signal for sustain discharge may be supplied to the scan electrodes Y1 to Yn in the sustain period.

Here, the scan bias voltage, which is the sum of the scan reference voltage and the lowest voltage of the scan signal, may be supplied to the scan electrodes Y1 to Yn in the address period.

The sustain driver 120 supplies a drive signal during the sustain period. For example, the sustain driver 120 may supply a sustain signal to the sustain electrode Z so as to be alternated with the sustain signal supplied from the scan driver 110 to the scan electrodes Y1 to Yn during the sustain period.

The data driver 130 supplies a data signal during the address period. For example, the data driver 130 receives data from the controller and supplies a data signal, which is an address electrode driving signal, to the address electrodes X1 to Xm during the address period.

The data driver 130 may include a temporary memory, a shift register, a latch, and a data signal generator.

The controller 140 supplies a control signal for controlling each driver to each of the scan driver 110, the sustain driver 120, and the data driver 130 described above during each subfield of the frame.

For example, the scan driver 110 supplies a switching element control signal and a clock signal so that the scan driver 110 scans the scan electrode driving signal during the reset, address, and sustain periods of the subfields. The data driver 120 supplies a data signal in which an image signal input from an external image is processed and a control signal and a clock signal for controlling the above-described temporary storage unit, shift register, latch, and data signal generating circuit. The data driver 130 supplies the address electrode driving signal to the address electrodes X1 to Xm during the address period.

The sustain driver 120 also supplies a switching element control signal and a clock signal to supply the sustain electrode driving signal to the sustain electrodes Z1 to Zn during the sustain period.

As such, the signals supplied to the respective driving units from the control unit are transmitted through one transmission line.

For example, data signals may be serially transmitted through one transmission line, and data signals, control signals, and clock signals may be serially transmitted through one transmission line.

As such, in order to supply one signal through one transmission line, the present invention includes a voltage drop unit (not shown) in the transmission line between the controller and the driver.

The voltage drop unit includes a first stage electrically connected to the controller and receiving a signal from the controller, and a second stage receiving a reference voltage from the voltage source, and supplying the first signal and the second stage to the first stage. The difference between the reference voltages is formed and supplied to the driving unit described above.

In this way, the number of signal transmission lines is reduced, and the signal transmission characteristic is improved.

In more detail, the control unit typically enables high-speed transmission of signals, reduces distortion of the signal due to noise interference, and reduces the amount of electromagnetic waves emitted. In this case, signals may be transmitted by a low voltage differential signaling (LVDS) method that transmits signals that are opposite to each other. In this case, two transmission lines are required to transmit one signal.

In such a case, the two transmission lines are very close to each other, causing a coupling phenomenon between the two transmission lines, which may distort the signal, thereby degrading the signal characteristics of the signal and supplying one signal. In order to require two transmission lines, not only the area occupied by the two transmission lines increases but also the manufacturing cost increases.

However, according to the present invention, by providing a voltage drop between the controller and the driver, high-speed transmission of the signal is possible, reducing distortion of the signal due to interference of noise, and reducing the amount of electromagnetic waves emitted as well as the number of transmission lines. Since the number is reduced to one, the number of transmission lines per unit area is reduced, so that the coupling phenomenon between the transmission lines is significantly reduced and signal transmission characteristics are further improved.

Here, the voltage drop unit will be described in detail with reference to FIGS. 4 to 5B.

In FIG. 1, only the sustain driver 110 is described as being separated from the scan driver 110. Alternatively, the sustain driver 120 may be integrated with the scan driver 110.

2 is a diagram for explaining an example of a plasma display panel as an example of an image display panel.

Referring to FIG. 2, a plasma display panel according to an exemplary embodiment of the present invention includes a front substrate 201 on which scan electrodes 202 and Y and sustain electrodes 203 and Z are parallel to each other, and the scan electrodes 202 and Y described above. ) And the rear substrate 211 on which the address electrodes 213 and X intersect with the sustain electrodes 203 and Z are formed.

Here, the electrodes formed on the front substrate 201, for example, the scan electrodes 202 and Y and the sustain electrodes 203 and Z, generate a discharge in a discharge space, that is, an effective discharge cell, and at the same time, Discharge can be maintained.

On the front substrate 201 where the scan electrodes 202 and Y and the sustain electrodes 203 and Z are formed, a dielectric layer, for example, an upper dielectric layer, covers the scan electrodes 202 and Y and the sustain electrodes 203 and Z. Layer 204 may be formed.

This upper dielectric layer 204 limits the discharge current of the scan electrodes 202 and Y and the sustain electrodes 203 and Z and can insulate between the scan electrodes 202 and Y and the sustain electrodes 203 and Z. have.

A protective layer 205 may be formed on the upper dielectric layer 204 to facilitate a discharge condition. The protective layer 205 may be formed through a method of depositing a material such as magnesium oxide (MgO) on the upper dielectric layer 204.

Meanwhile, electrodes, for example, address electrodes 213 and X are formed on the rear substrate 211, and the address electrodes 213 and X are covered on the rear substrate 211 on which the address electrodes 213 and X are formed. Dielectric layer, such as lower dielectric layer 215 may be formed.

The lower dielectric layer 215 may insulate the address electrodes 213 and X.

On the upper portion of the lower dielectric layer 215, a partition space 212, such as a stripe type, a well type, a delta type, a honeycomb type, for partitioning an effective discharge cell, that is, an effective discharge cell, is formed. This can be formed. Accordingly, an effective discharge cell such as red (R), green (G), and blue (B) may be formed between the front substrate 201 and the rear substrate 211. In this manner, the partition wall that partitions the discharge cells may be referred to as an effective partition wall.

Further, in addition to the red (R), green (G), and blue (B) effective discharge cells, it is also possible to further form white (W) or yellow (Yellow: Y) effective discharge cells.

Meanwhile, although the pitches of the red (R), green (G), and blue (B) effective discharge cells in the plasma display panel according to an embodiment of the present invention may be substantially the same, red (R), The pitches of the red (R), green (G) and blue (B) effective discharge cells may be varied to match the color temperature in the green (G) and blue (B) effective discharge cells.

In this case, although the pitch may be different for each of the red (R), green (G), and blue (B) effective discharge cells, at least one effective discharge cell among the red (R), green (G), and blue (B) effective discharge cells may be used. The pitch of the cells may be different from that of other effective discharge cells. For example, the pitch of the red (R) effective discharge cells is the smallest, and the pitches of the green (G) and blue (B) effective discharge cells may be larger than the pitch of the red (R) effective discharge cells.

Here, the pitch of the green (G) effective discharge cells may be substantially the same as or different from the pitch of the blue (B) effective discharge cells.

In addition, the plasma display panel according to the exemplary embodiment of the present invention may have not only the structure of the partition wall 212 illustrated in FIG. 2 but also the structure of the partition wall having various shapes. For example, the partition 212 includes a first partition 212b and a second partition 212a, where the height of the first partition 212b and the height of the second partition 212a are different from each other. At least one of the first barrier rib 212b and the second barrier rib 212a, and a channel type barrier rib structure having a channel usable as an exhaust passage, at least one of the first barrier rib 212b and the second barrier rib 212a. Grooved partition wall structure having a groove formed in the groove will be possible.

Here, in the case of the differential partition structure, the height of the first partition 212b of the first partition 212b or the second partition 212a may be lower than the height of the second partition 212a. In addition, in the case of the channel barrier rib structure or the groove barrier rib structure, a channel or a groove may be formed in the first barrier rib 212b.

On the other hand, in the plasma display panel according to an embodiment of the present invention, although red (R), green (G), and blue (B) effective discharge cells are shown and described as being arranged on the same line, they are arranged in different shapes. It would also be possible. For example, a Delta type arrangement in which red (R), green (G) and blue (B) effective discharge cells are arranged in a triangular shape may be possible. In addition, the shape of the effective discharge cell may be not only rectangular but also various polygonal shapes such as pentagon and hexagon.

In addition, in FIG. 2, only the case where the barrier rib 212 is formed on the rear substrate 211 is illustrated, but the barrier rib 212 may be formed on at least one of the front substrate 201 and the rear substrate 211.

Here, a predetermined discharge gas may be filled in the effective discharge cell partitioned by the partition wall 212.

In addition, a phosphor layer 214 that emits visible light for image display may be formed in the effective discharge cell partitioned by the partition wall 212. For example, red (R), green (G), and blue (B) phosphor layers may be formed.

In addition to the red (R), green (G), and blue (B) phosphors, it is also possible to further form a white (W) and / or yellow (Y) phosphor layer.

In addition, the phosphor layers 214 of the red (R), green (G), and blue (B) effective discharge cells may have substantially the same thickness or may differ from one or more. For example, when the thickness of the phosphor layer 214 in at least one of the red (R), green (G), and blue (B) effective discharge cells is different from other effective discharge cells, green (G) Or the thickness of the phosphor layer 214 in the blue (B) effective discharge cell may be thicker than the thickness of the phosphor layer 214 in the red (R) effective discharge cell. Here, the thickness of the phosphor layer 214 in the green (G) effective discharge cell may be substantially the same as or different from the thickness of the phosphor layer 214 in the blue (B) effective discharge cell.

In the above description, only one example of the plasma display panel according to an exemplary embodiment of the present invention is illustrated and described. However, the present invention is not limited to the plasma display panel having the above-described structure. For example, the description hereinabove illustrates only the case where the top dielectric layer at number 204 and the bottom dielectric layer at number 215 are each one layer, but one or more of these top dielectric layers and bottom dielectric layers are a plurality of layers. It can also be layered.

In addition, a black layer (not shown) may be further formed on the partition 212 to prevent reflection of the external light due to the partition 212.

In addition, a black layer (not shown) may be further formed at a specific position on the front substrate 201 corresponding to the partition 212.

In addition, although the width and thickness of the address electrode 213 formed on the rear substrate 211 may be substantially constant, the width or thickness inside the effective discharge cell may be different from the width or thickness outside the effective discharge cell. There will be. For example, the width or thickness inside the effective discharge cell may be wider or thicker than that outside the effective discharge cell.

For example, although only the thickness of the upper dielectric layer 204 is shown in the drawings, the thickness and dielectric constant of the upper dielectric layer 204 may vary from region to region, and only the interval of the partition wall 212 is illustrated. The spacing of the partition walls 212 of the B discharge cells may be wider.

In addition, the side surface of the barrier rib 212 may be formed in an uneven shape, and the phosphor layer diagram 214 applied to be formed according to the uneven shape may further increase the luminance of an image implemented in the plasma display panel.

In addition, a tunnel may be formed on a side surface of the partition wall 212 to improve exhaust characteristics during the plasma display manufacturing process.

Next, FIG. 3 is a diagram for describing an example of a method of driving the plasma display panel as shown in FIG. 2.

As shown, each of the driving units 110, 120, and 130 in any subfield in one frame has the scan electrode Y, the sustain electrode Z and the address electrode X during the reset period, the address period and the sustain period. ) Can supply a driving signal.

The scan driver 110 may supply a setup signal Set-up to the scan electrode Y in the setup period of the reset period as shown in FIG. 3.

Due to the set-up signal, a weak dark discharge occurs in the discharge cells of the entire screen. By this setup discharge, positive wall charges are accumulated on the sustain electrode Z and the address electrode X, and negative wall charges are accumulated on the scan electrode Y.

In addition, the scan driver 110 supplies the set-up signal Set-up to the scan electrode Y in the set-down period, and then drops from the positive voltage lower than the maximum voltage of the set-up signal Set-up. A set-down signal may be supplied that starts to fall and falls to a specific voltage level below the ground (GND) level voltage.

As a result, a weak erase discharge is generated in the discharge cell, thereby sufficiently erasing wall charges excessively formed in the discharge cell. By this set down discharge, the wall charges such that the address discharge can be stably generated remain uniformly in the discharge cells.

In FIG. 3, as shown in FIG. 3, only the case where both the set-up signal and the set-down signal are supplied in the reset period is illustrated. However, the set-up signal is differently set. At least one of the set-down signal and the set-down signal may be supplied as a bias signal that maintains a ground level voltage, and in the case of the set-up signal, the scan electrode Y or the sustain electrode The sustain voltage of the sustain signal supplied to Z) may be supplied as a bias signal maintained during the set up period.

In addition, the scan driver 110 supplies the scan reference voltage Vsc to the scan electrode Y in the address period, and the negative polarity falling from the scan reference voltage Vsc with the data signal supplied from the address electrode X. The scan signal Scan may be supplied to the scan electrode Y.

 In addition, the data driver 130 supplies a positive data signal to the address electrode X in response to the above-described scan signal Scan. As the voltage difference between the scan signal and the data signal and the wall voltage generated in the reset period are added, an address discharge is generated in the discharge cell to which the data signal is applied.

In the discharge cell selected by the address discharge as described above, wall charges are formed to the extent that discharge can occur when the sustain voltage Vs is applied. Accordingly, the scan electrode Y is scanned.

In FIG. 3, the scan driver 110 supplies the scan reference voltage to the scan electrode during the address period as an example. Alternatively, the scan bias voltage (Sc), which is the sum of the scan reference voltage Vsc and the -Vy voltage to the scan electrode, is described. Vsc-Vy) may be supplied.

In the sustain period after the address period, the scan driver 110 and the sustain driver 120 may alternately supply a sustain signal to the scan electrode Y and the sustain electrode Z.

In FIG. 3, the sustain signals supplied to the scan electrode Y and the sustain electrode Z are alternately supplied to each other. However, the scan signals are supplied to the scan electrode Y and the sustain electrode Z. Some or all of the sustain signals may be supplied to overlap.

As described above, according to the sustain signal supplied during the sustain period, the discharge cells selected by the address discharge are each added with the wall voltage and the sustain signal SUS in the discharge cell, and the scan electrode Y is applied every time the sustain signal SUS is applied. A sustain discharge, that is, a display discharge, occurs between and the sustain electrode Z.

After such a sustain period, an erase period may be further added.

4 is an example for explaining the relationship between the control unit and the drive unit.

In FIG. 4, an example for explaining the relationship between the controller 140 and the drivers 110, 120, and 130 will be described with the data driver 130.

As shown in the drawing, when the controller 140 receives an image signal from the outside, the image signal is processed by the image signal processor to convert the data signal into a data signal of which subfield mapping is completed, and the data signal is processed by the driver to display the image signal. When the clock signal and the control signal are generated, the transmitter Tx included in the control unit 140 passes through the transmission line 400 to each voltage drop unit 410 through the data signal, the clock signal, and the control signal. Supply.

Each voltage drop unit 410 forms a voltage difference by comparing a signal supplied through each transmission line 400 with a reference voltage supplied from a reference voltage source.

Here, the description of the voltage drop unit 410 will be described in detail with reference to FIGS. 5A and 5B.

The receiver Rx included in the data driver 130 converts the polarity and magnitude formed by the voltage difference into a 5V digital logic signal.

The data driver 130 receives a 5 V digital logic signal to the receiver Rx and supplies a data signal including a data voltage Va to the address electrode during the address period.

In more detail, the data driver 130 includes a receiver Rx, a temporary storage unit 131, a shift register and a latch 132, and a data signal generation circuit 133.

The control signal and the clock signal supplied as the 5 V digital logic signal control the driving of the temporary storage unit 131, the shift register, and the latch 132.

The switching element Qt is temporarily stored in the temporary storage unit 131 and converted into a 15V high voltage driving signal through a shift register and a latch 132 at a desired time, and disposed in the data signal generation circuit 133. Is supplied to the gate terminal of Qb to control the switching elements Qt and Qb.

Each of the switching elements Qt and Qb of the data signal generating circuit 133 supplies a data signal including the data voltage Va to the address electrode during the address period under the control of the 15V high voltage driving signal supplied to the gate terminal. .

The temporary storage unit 131, the shift register and the latch 132, and the data signal generation circuit 133 included in the data driver may be formed of one data drive integrated circuit. It may be separated from each other and formed as an integrated circuit.

In addition, the voltage drop unit 410 may be formed as a single drive integrated circuit together with the data driver 130, or may be separately formed.

FIG. 5A is a diagram for describing the voltage drop unit illustrated in FIG. 4, and FIG. 5B is a diagram illustrating a conventional differential signal transmission circuit.

Hereinafter, FIG. 5A will be described together with FIG. 5B.

As shown in (a) of FIG. 5A, the first stage A of the voltage drop unit 410 is electrically connected to the controller 140, and the second stage B is electrically connected to the reference voltage source Vr. Is connected.

As such, the voltage drop unit 410 includes a resistor electrically connected between the first terminal A and the second terminal B. FIG.

Here, the transmitter Tx of the controller 140, one transmission line 400, the voltage drop unit 410, and the receiver Rx of the data driver 130 are included in one signal transmitter.

As such, by designing a circuit to serially transmit one type of signal through one signal transmission line, the number of transmission lines per unit area may be reduced, thereby reducing manufacturing costs and improving signal transmission characteristics.

In more detail, as shown in the circuit shown in FIG. 5B, FIG. 5A illustrates the existing first and second signal transmission lines supplied from the controller 140 to the data driver by a differential voltage transmission method (LVDS; Low Voltage Differential Signaling). As shown in (a), the manufacturing cost is reduced by reducing to one transmission line, and in FIG. 5b, two transmission lines for supplying a signal are very close to each other, so Although there is a high possibility of coupling phenomenon, the design of the signal transmission device as shown in FIG. 5A (a) can reduce the number of transmission lines per unit area, and thus can relatively widen the transmission line interval. Coupling between lines can be remarkably improved, thereby improving the signal transmission characteristics.

The voltage drop unit 410 receives the first signal from the controller 140 through the first stage A. Here, the first signal is any one of a data signal, a control signal, and a clock signal, and a width in which the first signal swings may be a voltage range of 100 [mV] or more and 400 [mV] or less.

Here, the voltage width Vd of the first signal means a value when the resistance R1 of the voltage drop part 410 is 100 [kW].

In this case, the swing width Vd of the first signal is 100 [mV] or more, whereby the transmission stability and accuracy of the signal can be appropriately secured when the signal is transmitted.

In addition, the swing width Vd of the first signal is 400 [mV] or less, thereby significantly reducing the amount of electromagnetic waves emitted by signal transmission, thereby improving EMI characteristics, and improving the EMI characteristics by several hundred MHz or more. There is an effect of enabling signal transmission at a frequency.

Through the second stage B, the voltage drop unit 410 receives the reference voltage Vr from the controller 140.

Here, the reference voltage Vr may be a positive voltage, a ground level voltage GND, and a negative voltage. In the case of the positive voltage, the reference voltage Vr may be 5 [V] or less.

As shown in (b) of FIG. 5A, a first signal swinging around the reference voltage Vr is supplied to the first stage A, and the reference voltage Vr is supplied to the second stage B. Is supplied, a voltage difference by the first signal and the reference voltage Vr is formed in the voltage drop unit 410.

If the voltage of the first signal is higher by Vd / 2 than the reference voltage Vr, the voltage difference formed in the voltage drop part 410 is formed by + Vd / 2, and the receiver receives the voltage difference of + Vd / 2. (Rx) converts the voltage difference of + Vd / 2 into a digital logic signal called "1" which is a turn on signal.

When the voltage of the first signal is lower by -Vd / 2 than the reference voltage Vr, the voltage difference formed in the voltage drop part 410 is formed by -Vd / 2, and the voltage difference of -Vd / 2 is supplied. The received receiver Rx converts the voltage difference of -Vd / 2 into a digital logic signal called "0" which is a turn-off signal.

The digital logic signal converted as described above drives the data driver 140 to supply the data signal including the data voltage Va to the address electrode X in the address period.

4 to 5A illustrate only an example in which a voltage drop unit 410 including a first terminal A connected to the controller 140 and a second terminal B connected to a voltage source is connected to the data driver 130. However, in addition to this, the voltage drop unit 410 is connected to the scan driver 110 or the sustain driver 120 to supply the switching control signal of the scan driver 110 or the sustain driver 120 as described in FIG. 5A. Can be.

For example, the control unit 140 supplies the control signal and the clock signal for controlling the switching to the scan driver 110 through the voltage drop unit 410 described above, so that the scan driver 110 resets, an address period, The scan electrode driving signal can be supplied to the scan electrode Y during the sustain period.

In addition, although the signal transmission apparatus including the voltage drop unit 410 as described above has been described as an example, the signal transmission apparatus as described above has various types of images as mentioned in FIG. 1. It can also be applied to a display device.

In addition, the signal transmission device may be applied to fields such as an electronic computing device and a wireless communication terminal requiring high speed signal transmission.

As such, the structure of the plasma display panel which may be included in the plasma display apparatus according to the exemplary embodiment may be variously changed.

As such, those skilled in the art will appreciate that the present invention can be implemented in other specific forms without changing the technical spirit or essential features thereof. Therefore, the above-described embodiments are to be understood as illustrative in all respects and not as restrictive.

The scope of the present invention is shown by the following claims rather than the detailed description, and all changes or modifications derived from the meaning and scope of the claims and their equivalents should be construed as being included in the scope of the present invention. do.

As described above, the present invention has the effect of having a more stable signal transmission characteristics by designing a circuit to reduce the signal transmission line between the control unit and the driver.

In addition, the manufacturing cost of the image display device is further reduced due to the reduction of the signal transmission line.

Claims (10)

An image display panel including an electrode; A controller configured to generate a first signal to display an image signal supplied from an external device on the image display panel; A first stage electrically connected to the controller and a second stage receiving a first voltage from a voltage source, and supplied to the first stage and the second stage; A voltage drop forming a difference between the reference voltages; And A driver configured to receive a difference between the first signal formed by the voltage drop unit and the reference voltage, convert the signal into a digital logic signal, and form a second signal to supply the electrode to the electrode; Image display device comprising a. The method of claim 1, The first signal swings in a voltage range of 100 [mV] or more and 400 [mV] or less The video display device characterized in that. The method of claim 1, The first signal is Any one of data signal, control signal or clock signal The video display device characterized in that. The method of claim 1, The voltage drop unit includes a resistor element electrically connected between the first stage and the second stage. The video display device characterized in that. The method of claim 1, The electrode is Any one of an address electrode, a scan electrode and a sustain electrode The video display device characterized in that. The method of claim 1, The driver is any one of a data driver, a scan driver, and a sustain driver. The video display device characterized in that. The method of claim 1, When the driver is a data driver and the electrode is an address electrode, The first signal includes a data signal, a control signal, a clock signal, The second signal is a data signal including a data voltage supplied to the address electrode in an address period The video display device characterized in that. The method of claim 1, When the driver is a scan driver, the electrode is a scan electrode, The first signal includes a control signal and a clock signal for controlling the switching element included in the scan driver, The second signal is a scan electrode driving signal supplied to the scan electrode in a reset period, an address period, and a sustain period; The video display device characterized in that. A transmitter for transmitting a first signal supplied from the outside; A first stage electrically connected to the transmitter and a second stage to receive a reference voltage from a voltage source, the first signal being supplied to the first stage and to the second stage; A voltage drop forming a difference between the reference voltages; And A receiver which receives a difference between the first signal formed by the voltage drop unit and the reference voltage and converts the difference into a digital logic signal; Image display device comprising a. The method of claim 9, The first signal swings in a voltage range of 100 [mV] or more and 400 [mV] or less The video display device characterized in that.

Images